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5191 serge 1
/* ARM COFF support for BFD.
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   Copyright 1998, 1999, 2000, 2002, 2003, 2010, 2013
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   Free Software Foundation, Inc.
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   This file is part of BFD, the Binary File Descriptor library.
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   This program is free software; you can redistribute it and/or modify
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   it under the terms of the GNU General Public License as published by
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   the Free Software Foundation; either version 3 of the License, or
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   (at your option) any later version.
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   This program is distributed in the hope that it will be useful,
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   but WITHOUT ANY WARRANTY; without even the implied warranty of
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   MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
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   GNU General Public License for more details.
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   You should have received a copy of the GNU General Public License
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   along with this program; if not, write to the Free Software Foundation,
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   Inc., 51 Franklin Street - Fifth Floor, Boston, MA 02110-1301, USA.  */
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#define COFFARM 1
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#define L_LNNO_SIZE 2
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#define INCLUDE_COMDAT_FIELDS_IN_AUXENT
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#include "coff/external.h"
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/* Bits for f_flags:
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 	F_RELFLG	relocation info stripped from file
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 	F_EXEC		file is executable (no unresolved external references)
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 	F_LNNO		line numbers stripped from file
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 	F_LSYMS		local symbols stripped from file
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        F_INTERWORK     file supports switching between ARM and Thumb instruction sets
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        F_INTERWORK_SET the F_INTERWORK bit is valid
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 	F_APCS_FLOAT	code passes float arguments in float registers
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 	F_PIC		code is reentrant/position-independent
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 	F_AR32WR	file has byte ordering of an AR32WR machine (e.g. vax)
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 	F_APCS_26	file uses 26 bit ARM Procedure Calling Standard
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 	F_APCS_SET	the F_APCS_26, F_APCS_FLOAT and F_PIC bits have been initialised
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 	F_SOFT_FLOAT	code does not use floating point instructions.  */
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#define F_RELFLG	(0x0001)
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#define F_EXEC		(0x0002)
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#define F_LNNO		(0x0004)
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#define F_LSYMS		(0x0008)
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#define F_INTERWORK	(0x0010)
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#define F_INTERWORK_SET	(0x0020)
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#define F_APCS_FLOAT	(0x0040)
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#undef  F_AR16WR
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#define F_PIC		(0x0080)
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#define	F_AR32WR	(0x0100)
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#define F_APCS_26	(0x0400)
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#define F_APCS_SET	(0x0800)
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#define F_SOFT_FLOAT	(0x2000)
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#define F_VFP_FLOAT	(0x4000)
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/* Bits stored in flags field of the internal_f structure */
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#define F_INTERWORK	(0x0010)
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#define F_APCS_FLOAT	(0x0040)
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#define F_PIC		(0x0080)
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#define F_APCS26	(0x1000)
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#define F_ARM_ARCHITECTURE_MASK (0x4000+0x0800+0x0400)
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#define F_ARM_2		(0x0400)
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#define F_ARM_2a	(0x0800)
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#define F_ARM_3		(0x0c00)
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#define F_ARM_3M	(0x4000)
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#define F_ARM_4		(0x4400)
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#define F_ARM_4T	(0x4800)
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#define F_ARM_5		(0x4c00)
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/*
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  ARMMAGIC ought to encoded the procesor type,
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  but it is too late to change it now, instead
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  the flags field of the internal_f structure
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  is used as shown above.
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  XXX - NC 5/6/97.  */
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#define	ARMMAGIC	0xa00  /* I just made this up */
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#define ARMBADMAG(x) (((x).f_magic != ARMMAGIC))
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#define	ARMPEMAGIC	0x1c0
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#define	THUMBPEMAGIC	0x1c2
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#define	ARMV7PEMAGIC	0x1c4
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#undef  ARMBADMAG
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#define ARMBADMAG(x) (((x).f_magic != ARMMAGIC) && ((x).f_magic != ARMPEMAGIC) && ((x).f_magic != THUMBPEMAGIC) && ((x).f_magic != ARMV7PEMAGIC))
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#define OMAGIC          0404    /* object files, eg as output */
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#define ZMAGIC          0413    /* demand load format, eg normal ld output */
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#define STMAGIC		0401	/* target shlib */
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#define SHMAGIC		0443	/* host   shlib */
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/* define some NT default values */
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/*  #define NT_IMAGE_BASE        0x400000 moved to internal.h */
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#define NT_SECTION_ALIGNMENT 0x1000
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#define NT_FILE_ALIGNMENT    0x200
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#define NT_DEF_RESERVE       0x100000
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#define NT_DEF_COMMIT        0x1000
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/* We use the .rdata section to hold read only data.  */
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#define _LIT	".rdata"
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/********************** RELOCATION DIRECTIVES **********************/
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#ifdef ARM_WINCE
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struct external_reloc
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{
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  char r_vaddr[4];
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  char r_symndx[4];
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  char r_type[2];
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};
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#define RELOC struct external_reloc
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#define RELSZ 10
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#else
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struct external_reloc
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{
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  char r_vaddr[4];
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  char r_symndx[4];
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  char r_type[2];
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  char r_offset[4];
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};
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#define RELOC struct external_reloc
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#define RELSZ 14
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#endif
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#define ARM_NOTE_SECTION ".note"