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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 6146 | serge | 1 | /* |
| 2 | * Copyright © <2010>, Intel Corporation. |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the |
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| 6 | * "Software"), to deal in the Software without restriction, including |
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| 7 | * without limitation the rights to use, copy, modify, merge, publish, |
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| 8 | * distribute, sub license, and/or sell copies of the Software, and to |
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| 9 | * permit persons to whom the Software is furnished to do so, subject to |
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| 10 | * the following conditions: |
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| 11 | * |
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| 12 | * The above copyright notice and this permission notice (including the |
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| 13 | * next paragraph) shall be included in all copies or substantial portions |
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| 14 | * of the Software. |
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| 15 | * |
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| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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| 17 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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| 19 | * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR |
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| 20 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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| 21 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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| 22 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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| 23 | * |
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| 24 | */ |
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| 25 | // Modual name: IntraFrame.asm |
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| 26 | // |
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| 27 | // Make intra predition estimation for Intra frame |
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| 28 | // |
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| 29 | |||
| 30 | // |
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| 31 | // Now, begin source code.... |
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| 32 | // |
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| 33 | |||
| 34 | /* |
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| 35 | * __START |
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| 36 | */ |
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| 37 | __INTRA_START: |
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| 38 | mov (16) tmp_reg0.0<1>:UD 0x0:UD {align1}; |
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| 39 | mov (16) tmp_reg2.0<1>:UD 0x0:UD {align1}; |
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| 40 | mov (16) tmp_reg4.0<1>:UD 0x0:UD {align1} ; |
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| 41 | mov (16) tmp_reg6.0<1>:UD 0x0:UD {align1} ; |
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| 42 | |||
| 43 | shl (2) read0_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ |
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| 44 | add (1) read0_header.0<1>:D read0_header.0<0,1,0>:D -8:W {align1}; /* X offset */ |
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| 45 | add (1) read0_header.4<1>:D read0_header.4<0,1,0>:D -1:W {align1}; /* Y offset */ |
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| 46 | mov (1) read0_header.8<1>:UD BLOCK_32X1 {align1}; |
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| 47 | mov (1) read0_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ |
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| 48 | |||
| 49 | shl (2) read1_header.0<1>:D orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ |
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| 50 | add (1) read1_header.0<1>:D read1_header.0<0,1,0>:D -4:W {align1}; /* X offset */ |
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| 51 | mov (1) read1_header.8<1>:UD BLOCK_4X16 {align1}; |
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| 52 | mov (1) read1_header.20<1>:UB thread_id_ub {align1}; /* dispatch id */ |
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| 53 | |||
| 54 | shl (2) vme_m0.8<1>:UW orig_xy_ub<2,2,1>:UB 4:UW {align1}; /* (x, y) * 16 */ |
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| 55 | mov (1) vme_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ |
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| 56 | |||
| 57 | mul (1) obw_m0.8<1>:UD w_in_mb_uw<0,1,0>:UW orig_y_ub<0,1,0>:UB {align1}; |
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| 58 | add (1) obw_m0.8<1>:UD obw_m0.8<0,1,0>:UD orig_x_ub<0,1,0>:UB {align1}; |
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| 59 | mov (1) obw_m0.20<1>:UB thread_id_ub {align1}; /* dispatch id */ |
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| 60 | |||
| 61 | /* |
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| 62 | * Media Read Message -- fetch Luma neighbor edge pixels |
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| 63 | */ |
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| 64 | /* ROW */ |
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| 65 | mov (8) msg_reg0.0<1>:UD read0_header.0<8,8,1>:UD {align1}; |
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| 66 | send (8) msg_ind INEP_ROW<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 1 {align1}; |
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| 67 | |||
| 68 | /* COL */ |
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| 69 | mov (8) msg_reg0.0<1>:UD read1_header.0<8,8,1>:UD {align1}; |
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| 70 | send (8) msg_ind INEP_COL0<1>:UB null read(BIND_IDX_INEP, 0, 0, 4) mlen 1 rlen 2 {align1}; |
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| 71 | |||
| 72 | /* m0 */ |
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| 73 | mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; |
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| 74 | |||
| 75 | /* m2 */ |
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| 76 | mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; |
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| 77 | |||
| 78 | /* |
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| 79 | * VME message |
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| 80 | */ |
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| 81 | /* m0 */ |
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| 82 | mov (8) vme_msg_0.0<1>:UD vme_m0.0<8,8,1>:UD {align1}; |
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| 83 | |||
| 84 | /* m1 */ |
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| 85 | mov (8) vme_m1.0<1>:ud 0x0:ud {align1}; |
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| 86 | and.z.f0.0 (1) null<1>:UW transform_8x8_ub<0,1,0>:UB 1:UW {align1}; |
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| 87 | (f0.0) mov (1) intra_part_mask_ub<1>:UB LUMA_INTRA_8x8_DISABLE:uw {align1}; |
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| 88 | |||
| 89 | /* assign MB intra struct from the thread payload*/ |
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| 90 | mov (1) mb_intra_struct_ub<1>:UB input_mb_intra_ub<0,1,0>:UB {align1}; |
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| 91 | |||
| 92 | mov (8) vme_msg_1<1>:UD vme_m1.0<8,8,1>:UD {align1}; |
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| 93 | |||
| 94 | /* m2 */ |
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| 95 | mov (8) vme_msg_2<1>:UD 0x0:UD {align1}; |
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| 96 | |||
| 97 | /* m3 */ |
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| 98 | mov (1) INEP_ROW.0<1>:UD 0x0:UD {align1}; |
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| 99 | and (1) INEP_ROW.4<1>:UD INEP_ROW.4<0,1,0>:UD 0xFF000000:UD {align1}; |
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| 100 | mov (8) vme_msg_3<1>:UD INEP_ROW.0<8,8,1>:UD {align1}; |
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| 101 | |||
| 102 | /* m4 */ |
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| 103 | mov (8) vme_msg_4<1>:UD 0x0 {align1}; |
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| 104 | mov (16) vme_msg_4.0<1>:UB INEP_COL0.3<32,8,4>:UB {align1}; |
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| 105 | mov (1) vme_msg_4.16<1>:UD INTRA_PREDICTORE_MODE {align1}; |
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| 106 | |||
| 107 | send (8) |
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| 108 | vme_msg_ind |
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| 109 | vme_wb |
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| 110 | null |
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| 111 | vme( |
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| 112 | BIND_IDX_VME, |
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| 113 | 0, |
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| 114 | 0, |
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| 115 | VME_MESSAGE_TYPE_INTRA |
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| 116 | ) |
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| 117 | mlen vme_msg_length |
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| 118 | rlen vme_intra_wb_length |
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| 119 | {align1}; |
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| 120 | |||
| 121 | |||
| 122 | /* |
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| 123 | * Oword Block Write message |
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| 124 | */ |
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| 125 | mov (8) msg_reg0.0<1>:UD obw_m0<8,8,1>:UD {align1}; |
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| 126 | |||
| 127 | mov (1) msg_reg1.0<1>:UD vme_wb.0<0,1,0>:UD {align1}; |
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| 128 | mov (1) msg_reg1.4<1>:UD vme_wb.16<0,1,0>:UD {align1}; |
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| 129 | mov (1) msg_reg1.8<1>:UD vme_wb.20<0,1,0>:UD {align1}; |
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| 130 | mov (1) msg_reg1.12<1>:UD vme_wb.24<0,1,0>:UD {align1}; |
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| 131 | |||
| 132 | /* bind index 3, write 2 oword (32bytes), msg type: 8(OWord Block Write) */ |
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| 133 | send (16) |
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| 134 | msg_ind |
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| 135 | obw_wb |
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| 136 | null |
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| 137 | data_port( |
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| 138 | OBW_CACHE_TYPE, |
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| 139 | OBW_MESSAGE_TYPE, |
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| 140 | OBW_CONTROL_0, |
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| 141 | OBW_BIND_IDX, |
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| 142 | OBW_WRITE_COMMIT_CATEGORY, |
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| 143 | OBW_HEADER_PRESENT |
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| 144 | ) |
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| 145 | mlen 2 |
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| 146 | rlen obw_wb_length |
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| 147 | {align1}; |
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| 148 | |||
| 149 | __EXIT: |
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| 150 | /* |
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| 151 | * kill thread |
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| 152 | */ |
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| 153 | mov (8) ts_msg_reg0<1>:UD r0<8,8,1>:UD {align1}; |
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| 154 | send (16) ts_msg_ind acc0<1>UW null thread_spawner(0, 0, 1) mlen 1 rlen 0 {align1 EOT}; |