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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 6146 | serge | 1 | /* |
| 2 | * Copyright 2000-2011 Intel Corporation All Rights Reserved |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the |
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| 6 | * "Software"), to deal in the Software without restriction, including |
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| 7 | * without limitation the rights to use, copy, modify, merge, publish, |
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| 8 | * distribute, sub license, and/or sell copies of the Software, and to |
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| 9 | * permit persons to whom the Software is furnished to do so, subject to |
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| 10 | * the following conditions: |
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| 11 | * |
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| 12 | * The above copyright notice and this permission notice (including the |
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| 13 | * next paragraph) shall be included in all copies or substantial portions |
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| 14 | * of the Software. |
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| 15 | * |
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| 16 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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| 17 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 18 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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| 19 | * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR |
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| 20 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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| 21 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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| 22 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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| 23 | * |
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| 24 | * This file was originally licensed under the following license |
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| 25 | * |
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| 26 | * Licensed under the Apache License, Version 2.0 (the "License"); |
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| 27 | * you may not use this file except in compliance with the License. |
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| 28 | * You may obtain a copy of the License at |
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| 29 | * |
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| 30 | * http://www.apache.org/licenses/LICENSE-2.0 |
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| 31 | * |
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| 32 | * Unless required by applicable law or agreed to in writing, software |
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| 33 | * distributed under the License is distributed on an "AS IS" BASIS, |
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| 34 | * WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied. |
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| 35 | * See the License for the specific language governing permissions and |
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| 36 | * limitations under the License. |
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| 37 | */ |
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| 38 | // 47 // Total instruction count |
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| 39 | // 1 // Total kernel count |
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| 40 | |||
| 41 | |||
| 42 | |||
| 43 | // Module name: common.inc |
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| 44 | // |
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| 45 | // Common header file for all Video-Processing kernels |
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| 46 | // |
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| 47 | |||
| 48 | .default_execution_size (16) |
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| 49 | .default_register_type :ub |
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| 50 | |||
| 51 | .reg_count_total 128 |
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| 52 | .reg_count_payload 7 |
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| 53 | |||
| 54 | //========== Common constants ========== |
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| 55 | |||
| 56 | |||
| 57 | //========== Macros ========== |
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| 58 | |||
| 59 | |||
| 60 | //Fast Jump, For more details see "Set_Layer_N.asm" |
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| 61 | |||
| 62 | |||
| 63 | //========== Defines ==================== |
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| 64 | |||
| 65 | //========== Static Parameters (Common To All) ========== |
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| 66 | //r1 |
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| 67 | |||
| 68 | |||
| 69 | //r2 |
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| 70 | |||
| 71 | // e.g. byte0 byte1 byte2 |
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| 72 | // YUYV 0 1 3 |
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| 73 | // YVYU 0 3 1 |
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| 74 | |||
| 75 | //Color Pipe (IECP) parameters |
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| 76 | |||
| 77 | |||
| 78 | //ByteCopy |
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| 79 | |||
| 80 | |||
| 81 | //r4 |
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| 82 | |||
| 83 | // e.g. byte0 byte1 byte2 |
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| 84 | // YUYV 0 1 3 |
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| 85 | // YVYU 0 3 1 |
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| 86 | |||
| 87 | |||
| 88 | //========== Inline parameters (Common To All) =========== |
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| 89 | |||
| 90 | |||
| 91 | //============== Binding Index Table=========== |
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| 92 | //Common between DNDI and DNUV |
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| 93 | |||
| 94 | |||
| 95 | //================= Common Message Descriptor ===== |
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| 96 | // Message descriptor for thread spawning |
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| 97 | // Message Descriptors |
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| 98 | // = 000 0001 (min message len 1 ) 0,0000 (resp len 0 -add later) |
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| 99 | // 0000,0000,0000 |
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| 100 | // 0001(Spawn a root thread),0001 (Root thread spawn thread) |
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| 101 | // = 0x02000011 |
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| 102 | // Thread Spawner Message Descriptor |
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| 103 | |||
| 104 | |||
| 105 | // Message descriptor for atomic operation add |
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| 106 | // Message Descriptors |
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| 107 | // = 000 0110 (min message len 6 ) 0,0000 (resp len 0 -add later) |
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| 108 | // 1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add) |
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| 109 | // 0000,0000 (Binding table index, added later) |
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| 110 | // = 0x02000011 |
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| 111 | |||
| 112 | // Atomic Operation Add Message Descriptor |
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| 113 | |||
| 114 | |||
| 115 | // Message descriptor for dataport media write |
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| 116 | // Message Descriptors |
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| 117 | // = 000 0001 (min message len 1 - add later) 00000 (resp len 0) |
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| 118 | // 1 (header present 1) 0 1010 (media block write) 000000 |
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| 119 | // 00000000 (binding table index - set later) |
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| 120 | // = 0x020A8000 |
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| 121 | |||
| 122 | |||
| 123 | // Message Length defines |
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| 124 | |||
| 125 | |||
| 126 | // Response Length defines |
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| 127 | |||
| 128 | |||
| 129 | // Block Width and Height Size defines |
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| 130 | |||
| 131 | |||
| 132 | // Extended Message Descriptors |
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| 133 | |||
| 134 | |||
| 135 | // Common message descriptors: |
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| 136 | |||
| 137 | |||
| 138 | //===================== Math Function Control =================================== |
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| 139 | |||
| 140 | |||
| 141 | //============ Message Registers =============== |
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| 142 | // buf4 starts from r28 |
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| 143 | |||
| 144 | |||
| 145 | //#define mMSGHDR_EOT r43 // Dummy Message Register for EOT |
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| 146 | |||
| 147 | |||
| 148 | .declare mubMSGPAYLOAD Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub |
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| 149 | .declare muwMSGPAYLOAD Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw |
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| 150 | .declare mudMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud |
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| 151 | .declare mfMSGPAYLOAD Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f |
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| 152 | |||
| 153 | //=================== End of thread instruction =========================== |
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| 154 | |||
| 155 | |||
| 156 | //=====================Pointers Used===================================== |
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| 157 | |||
| 158 | |||
| 159 | //======================================================================= |
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| 160 | |||
| 161 | |||
| 162 | //r11-r17 |
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| 163 | // Define temp space for any usages |
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| 164 | |||
| 165 | |||
| 166 | // Common Buffers |
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| 167 | |||
| 168 | |||
| 169 | // temp space for rotation |
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| 170 | |||
| 171 | .declare fROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 172 | |||
| 173 | .declare udROBUF Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 174 | |||
| 175 | .declare uwROBUF Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 176 | |||
| 177 | .declare ubROBUF Base=r11.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 178 | |||
| 179 | .declare ub4ROBUF Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 180 | |||
| 181 | |||
| 182 | // End of common.inc |
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| 183 | |||
| 184 | |||
| 185 | // FileName: PL3_AVS_Buf_0.asm |
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| 186 | // Author: Tatiya, Rupesh |
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| 187 | // Description: Loads 8x8 AVS/IEF PL3 data into Buffer 0 |
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| 188 | |||
| 189 | |||
| 190 | |||
| 191 | // FileName : PL3_AVS_Buf.asm |
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| 192 | // Author : Tatiya, Rupesh |
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| 193 | // Description : Loads 8x8 AVS/IEF PL3 data into Buffer N |
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| 194 | |||
| 195 | |||
| 196 | |||
| 197 | // Module name: Scaling.inc |
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| 198 | |||
| 199 | |||
| 200 | |||
| 201 | |||
| 202 | // Description: Includes all definitions explicit to Fast Composite. |
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| 203 | |||
| 204 | |||
| 205 | |||
| 206 | |||
| 207 | // End of common.inc |
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| 208 | |||
| 209 | |||
| 210 | //========== GRF partition ========== |
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| 211 | // r0 header : r0 (1 GRF) |
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| 212 | // Static parameters : r1 - r6 (6 GRFS) |
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| 213 | // Inline parameters : r7 - r8 (2 GRFs) |
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| 214 | // MSGSRC : r27 (1 GRF) |
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| 215 | //=================================== |
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| 216 | |||
| 217 | //Interface: |
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| 218 | //========== Static Parameters (Explicit To Fast Composite) ========== |
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| 219 | //r1 |
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| 220 | //CSC Set 0 |
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| 221 | |||
| 222 | |||
| 223 | .declare udCSC_CURBE Base=r1.0 ElementSize=4 Type=ud |
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| 224 | |||
| 225 | //Constant alpha |
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| 226 | |||
| 227 | |||
| 228 | //r2 |
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| 229 | |||
| 230 | |||
| 231 | // Gen7 AVS WA |
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| 232 | |||
| 233 | |||
| 234 | // WiDi Definitions |
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| 235 | |||
| 236 | |||
| 237 | //Colorfill |
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| 238 | |||
| 239 | |||
| 240 | // 0: 0-degree, 1: 90, 2: 180, 3: 270-degree, clockwise. |
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| 241 | |||
| 242 | .declare ubCOLOR_PIXEL_VAL Base=r2.20 ElementSize=1 SrcRegion=<0;1,0> DstRegion=<1> Type=ub |
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| 243 | |||
| 244 | //r3 |
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| 245 | //Normalised Ratio of Horizontal step size with main video for all layers |
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| 246 | |||
| 247 | |||
| 248 | //Normalised Ratio of Horizontal step size with main video for all layers becomes |
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| 249 | //Normalised Horizontal step size for all layers in VP_Setup.asm |
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| 250 | |||
| 251 | |||
| 252 | //r4 |
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| 253 | //Normalised Vertical step size for all layers |
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| 254 | |||
| 255 | |||
| 256 | //r5 |
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| 257 | //Normalised Vertical Frame Origin for all layers |
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| 258 | |||
| 259 | |||
| 260 | //r6 |
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| 261 | //Normalised Horizontal Frame Origin for all layers |
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| 262 | |||
| 263 | |||
| 264 | //========== Inline Parameters (Explicit To Fast Composite) ========== |
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| 265 | |||
| 266 | |||
| 267 | //Main video Step X |
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| 268 | |||
| 269 | |||
| 270 | //====================== Binding table (Explicit To Fast Composite)========================================= |
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| 271 | |||
| 272 | |||
| 273 | //Used by Interlaced Scaling Kernels |
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| 274 | |||
| 275 | |||
| 276 | //========== Sampler State Table Index (Explicit To Fast Composite)========== |
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| 277 | //Sampler Index for AVS/IEF messages |
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| 278 | |||
| 279 | |||
| 280 | //Sampler Index for SIMD16 sampler messages |
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| 281 | |||
| 282 | |||
| 283 | //============================================================================= |
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| 284 | |||
| 285 | .declare fBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 286 | .declare fBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 287 | .declare fBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 288 | .declare fBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 289 | .declare fBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 290 | .declare fBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 291 | |||
| 292 | .declare udBUFFER_0 Base=r64.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 293 | .declare udBUFFER_1 Base=r80.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 294 | .declare udBUFFER_2 Base=r96.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 295 | .declare udBUFFER_3 Base=r112.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 296 | .declare udBUFFER_4 Base=r28.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 297 | .declare udBUFFER_5 Base=r46.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 298 | |||
| 299 | .declare uwBUFFER_0 Base=r64.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 300 | .declare uwBUFFER_1 Base=r80.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 301 | .declare uwBUFFER_2 Base=r96.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 302 | .declare uwBUFFER_3 Base=r112.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 303 | .declare uwBUFFER_4 Base=r28.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 304 | .declare uwBUFFER_5 Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 305 | |||
| 306 | .declare ubBUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 307 | .declare ubBUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 308 | .declare ubBUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 309 | .declare ubBUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 310 | .declare ubBUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 311 | .declare ubBUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub |
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| 312 | |||
| 313 | .declare ub4BUFFER_0 Base=r64.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 314 | .declare ub4BUFFER_1 Base=r80.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 315 | .declare ub4BUFFER_2 Base=r96.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 316 | .declare ub4BUFFER_3 Base=r112.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 317 | .declare ub4BUFFER_4 Base=r28.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 318 | .declare ub4BUFFER_5 Base=r46.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<4> Type=ub |
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| 319 | |||
| 320 | //Pointer to mask reg |
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| 321 | |||
| 322 | |||
| 323 | //r18 |
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| 324 | |||
| 325 | |||
| 326 | //Always keep Cannel Pointers and Offsets in same GRF, so that we can use |
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| 327 | // NODDCLR, NODDCHK flags. -rT |
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| 328 | |||
| 329 | |||
| 330 | .declare udCSC_COEFF_0 Base=r18.0 ElementSize=4 Type=ud // 1 GRF |
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| 331 | |||
| 332 | //r19 |
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| 333 | |||
| 334 | |||
| 335 | .declare udCSC_COEFF_1 Base=r19.0 ElementSize=4 Type=ud // 1 GRF |
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| 336 | |||
| 337 | |||
| 338 | //r20 |
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| 339 | |||
| 340 | .declare uwALPHA_MASK_REG_TEMP Base=r20.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF |
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| 341 | |||
| 342 | //r21 |
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| 343 | |||
| 344 | .declare uwALPHA_MASK_REG Base=r21.0 ElementSize=2 SrcRegion=<16;16,1> Type=uw // 1 GRF |
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| 345 | |||
| 346 | //r22 |
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| 347 | |||
| 348 | |||
| 349 | //Always keep Cannel Pointers and Offsets in same GRF, so that we can use |
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| 350 | // NODDCLR, NODDCHK flags. -rT |
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| 351 | |||
| 352 | |||
| 353 | //Keep fORIGIN_X_NLAS, fY_OFFSET_2ND_BLOCK, fSTEP_X_NLAS, pMSGDSC_COPY, ubCONST_ALPHA_COPY as |
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| 354 | //sub registers of same GRF to enable using NODDCLR NODDCHK. -rT |
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| 355 | |||
| 356 | //r23 |
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| 357 | |||
| 358 | |||
| 359 | //Lumakey |
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| 360 | |||
| 361 | |||
| 362 | //r24 |
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| 363 | |||
| 364 | |||
| 365 | //r25 |
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| 366 | |||
| 367 | |||
| 368 | //r26 |
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| 369 | |||
| 370 | |||
| 371 | //defines to generate LABELS during compile time. |
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| 372 | |||
| 373 | |||
| 374 | // Message Header |
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| 375 | // m0.7 31:0 Debug |
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| 376 | // m0.6 31:0 Debug |
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| 377 | // m0.5 31:0 Ignored |
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| 378 | // m0.4 31:0 Ignored |
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| 379 | // m0.3 31:0 Ignored |
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| 380 | // m0.2 31:16 Ignored |
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| 381 | // 15 Alpha Write Channel Mask enable=0, disable=1 |
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| 382 | // 14 Blue Write Channel Mask (U) |
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| 383 | // 13 Green Write Channel Mask (Y) |
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| 384 | // 12 Red Write Channel Mask (V) |
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| 385 | // 11:0 Ignored |
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| 386 | // m0.1 Ignored |
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| 387 | // m0.0 Ignored |
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| 388 | |||
| 389 | |||
| 390 | // AVS payload |
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| 391 | // m1.7 Group ID Number |
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| 392 | // m1.6 U 2nd Derivative ---> NLAS dx |
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| 393 | // m1.5 Delta V ---> Step Y |
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| 394 | // m1.4 Delta U ---> Step X |
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| 395 | // m1.3 Pixel 0 V Address ---> ORIY (Y0) |
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| 396 | // m1.2 Pixel 0 U Address ---> ORIX (X0) |
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| 397 | // m1.1 Vertical Block Number |
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| 398 | // m1.0 Reserved |
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| 399 | |||
| 400 | // Sampler Message Descriptor |
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| 401 | // 31:29 Reserved 000 |
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| 402 | // 28:25 Message length 0010 |
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| 403 | // 24:20 Response length xxxxx ---> 4GRFs for each enabled channel (AVS), 2GRFs for each enabled channel (sample unorm) |
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| 404 | // 19 Header Present 1 |
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| 405 | // 18:17 SIMD Mode 11 ---> SIMD32/64 |
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| 406 | // 16:12 Message Type xxxxx ---> 01011 sample_8x8, 01100 (sample_unorm), 01010 (sample_unorm+killpix) |
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| 407 | // 11:8 Sampler Index xxxx |
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| 408 | // 7:0 Binding Table Index xxxxxxxx |
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| 409 | |||
| 410 | |||
| 411 | // Msg Header M0.2 |
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| 412 | // 15:15 Alpha Write Channel Mask, 0: written back, 1: not written back |
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| 413 | // 14:14 Blue Write Channel Mask |
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| 414 | // 13:13 Green Write Channel Mask |
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| 415 | // 12:12 Red Write Channel Mask |
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| 416 | |||
| 417 | |||
| 418 | //By design, Buffer 0,1,2,3 always have Layer 0 and Buffer 4,5 always have L1-L7 |
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| 419 | |||
| 420 | |||
| 421 | //used to generate LABELS at compile time. |
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| 422 | |||
| 423 | |||
| 424 | // 18:17 SIMD Mode 10 ---> SIMD16 |
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| 425 | // 16:12 Message Type xxxxx ---> 00000 (SIMD16) |
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| 426 | |||
| 427 | |||
| 428 | //r10-17 - 8 GRFs to load SIMD16 data (upto 4 channels) |
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| 429 | //r18-19 - 2 GRFs to store sampler ramp. |
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| 430 | |||
| 431 | .declare mfSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 432 | .declare muwSCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 433 | .declare mudCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 434 | .declare mubCALING_0X_34X_PAYLOAD Base=r14.0 ElementSize=1 SrcRegion=<32;32,1> DstRegion=<1> Type=ub |
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| 435 | |||
| 436 | |||
| 437 | .declare fSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=f |
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| 438 | .declare udSCALING_0X_34X_TEMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> DstRegion=<1> Type=ud |
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| 439 | .declare ub4SCALING_0X_34X_TEMP Base=r11.0 ElementSize=1 SrcRegion=<32;8,4> DstRegion=<1> Type=ub |
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| 440 | .declare uwSCALING_0X_34X_TEMP Base=r11.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw |
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| 441 | |||
| 442 | // Sampler ramp is used for Scaling 0X_0.34X |
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| 443 | .declare fSAMPLER_RAMP Base=r11.0 ElementSize=4 SrcRegion=<8;8,1> Type=f // 1 GRFs, 8 elements |
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| 444 | |||
| 445 | |||
| 446 | //#define rMSGDSC_UV r23.0 |
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| 447 | |||
| 448 | |||
| 449 | //End of _SCALING_ |
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| 450 | |||
| 451 | |||
| 452 | //NOTE: We need offsets for second halfof LAYER 0 - even if we do not load it. |
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| 453 | //Update the channel offset in the buffers for the lower 8x4 data for BUFFER_0. |
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| 454 | mov (1) r22.4<1>:ud 0x400040:ud |
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| 455 | |||
| 456 | |||
| 457 | //Check if layer is to be skipped |
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| 458 | |||
| 459 | |||
| 460 | // f0.1 pre-computed in Set_Layer_0 |
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| 461 | (-f0.1) jmpi (1) SKIP_AVS_LOAD_L0_0_ |
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| 462 | |||
| 463 | |||
| 464 | //AVS_PAYLOAD already has all the data loaded at this point |
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| 465 | add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB400:ud //msg desc |
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| 466 | |||
| 467 | mov (1) r16.2:ud 0x0000D000:ud // Enable Red channel |
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| 468 | |||
| 469 | |||
| 470 | mov (1) r25.7<1>:ud r9.7:ud { NoDDClr } |
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| 471 | mov (1) r25.1<1>:ud r9.12:uw { NoDDChk } |
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| 472 | |||
| 473 | |||
| 474 | // set the vertical block number |
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| 475 | |||
| 476 | |||
| 477 | mov (8) r17.0:ud r25.0<8;8,1>:ud // Copy msg payload mirrors to MRFs |
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| 478 | |||
| 479 | // Gen7 AVS WA Only for YUV packed surfaces, NV12 and Y-channel only for Planar surfaces |
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| 480 | // if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) |
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| 481 | // { |
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| 482 | // modified_u_coord = u_coord – 5.0/(256*width); //floating point |
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| 483 | // } |
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| 484 | // else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) |
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| 485 | // { |
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| 486 | // modified_u_coord = u_coord + 1.0/(256*width); //floating point |
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| 487 | // } |
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| 488 | // else{ |
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| 489 | // modified_u_coord = u_coord; |
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| 490 | // } |
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| 491 | // Where u_left = u – 2*du + 3*ddu for IEF On |
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| 492 | // And u_left = u for IEF Off case |
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| 493 | // |
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| 494 | |||
| 495 | // check whether Gen7 AVS WA is enabled, |
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| 496 | mov (1) r14.8:uw f0.0:uw // save f0.0 |
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| 497 | mov (1) r14.5:f r17.2<0;1,0>:f // save pixel 0 U for chroma |
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| 498 | |||
| 499 | and.nz.f0.0 (1) null<1>:uw r2.3:uw 0x2:uw |
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| 500 | (-f0.0)jmpi (1) GEN7_PL3_AVS_WA_DONE_L0_0_ |
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| 501 | |||
| 502 | // Gen7 AVS WA, check if IEF is ON for choosing Gen7 AVS WA formula |
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| 503 | |||
| 504 | and.nz.f0.0 (8) null<1>:uw r2.3<0;1,0>:uw 0x4:uw |
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| 505 | (f0.0)mov (8) acc0.0:f r17.2<0;1,0>:f |
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| 506 | (f0.0)mac (8) acc0.0:f r17.4<0;1,0>:f -2.0:f |
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| 507 | (f0.0)mac (8) acc0.0:f r17.6<0;1,0>:f 3.0:f |
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| 508 | (f0.0)mov (1) r14.2:f acc0:f // IEF ON, rTEMP3.2 = u_left |
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| 509 | (-f0.0)mov (1) r14.2:f r17.2<0;1,0>:f // IEF OFF, rTEMP3.2 = u_left |
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| 510 | |||
| 511 | and (1) r14.1:ud r2.3:uw 0xFFF8:uw |
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| 512 | asr (1) r14.1:ud r14.1:ud 3:d |
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| 513 | mov (1) r14.1:f r14.1:ud |
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| 514 | |||
| 515 | // Gen7 AVS WA, if (int)(u_left*width + 5.0/256) > (int)(u_left*width) |
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| 516 | mul (1) r14.0:f r14.2:f r14.1:f // rTEMP3.0 = u_left*width |
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| 517 | add (1) r14.2:f r14.0:f 0.01953125:f // rTEMP3.2 = u_left*width + 5.0/256 |
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| 518 | add (1) r14.3:f r14.0:f 0.99609375:f // rTEMP3.3 = u_left*width + 255.0/256 |
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| 519 | |||
| 520 | //Check if the values are < 0 and account for (int) cast of negative numbers |
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| 521 | |||
| 522 | //(int)(u_left*width) |
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| 523 | cmp.l.f0.0 (1) null<1>:f r14.0:f 0.00000000:f |
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| 524 | mov (1) r14.0:d r14.0:f |
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| 525 | (f0.0)add (1) r14.0:d r14.0<0;1,0>:d -1:d |
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| 526 | |||
| 527 | //(int)(u_left*width + 5.0/256) |
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| 528 | cmp.l.f0.0 (1) null<1>:f r14.2:f 0.00000000:f |
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| 529 | mov (1) r14.2:d r14.2:f |
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| 530 | (f0.0)add (1) r14.2:d r14.2<0;1,0>:d -1:d |
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| 531 | |||
| 532 | //(int)(u_left*width + 255.0/256) |
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| 533 | cmp.l.f0.0 (1) null<1>:f r14.3:f 0.00000000:f |
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| 534 | mov (1) r14.3:d r14.3:f |
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| 535 | (f0.0)add (1) r14.3:d r14.3<0;1,0>:d -1:d |
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| 536 | |||
| 537 | mov (1) f0.0:uw 0:uw // clear flag |
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| 538 | //if (((int)(u_left*width + 5.0/256) > (int)(u_left*width)) |
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| 539 | cmp.g.f1.0 (1) null<1>:d r14.2:d r14.0:d |
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| 540 | // modified_u_coord = u_coord – 5.0/(256*width); //floating point |
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| 541 | (f1.0) add (1) r17.2:f r17.2<0;1,0>:f -r2.3:f |
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| 542 | //else if(((int)(u_left*width + 255.0/256) == (int)(u_left*width)) |
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| 543 | (-f1.0) cmp.e.f0.0 (1) null<1>:d r14.3:d r14.0:d |
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| 544 | // modified_u_coord = u_coord + 1.0/(256*width); //floating point |
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| 545 | (f0.0) add (1) r17.2:f r17.2<0;1,0>:f r2.2:f |
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| 546 | |||
| 547 | GEN7_PL3_AVS_WA_DONE_L0_0_: |
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| 548 | mov (1) f0.0:uw r14.8:uw // restore f0.0 |
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| 549 | |||
| 550 | |||
| 551 | send (1) uwBUFFER_0(0)<1> r16 0x2 a0.0:ud |
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| 552 | // Returns Y data in 4 GRFs in scrambled order |
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| 553 | |||
| 554 | mov (1) r17.2:f r14.5:f // restore pixel 0 U for chroma, No AVS WA for chroma |
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| 555 | |||
| 556 | add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EB801:ud // msg desc; 1 is added to change BI to UV |
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| 557 | mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel |
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| 558 | |||
| 559 | send (1) uwBUFFER_0(4)<1> r16 0x2 a0.0:ud |
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| 560 | // Returns U data in 4 GRFs in scrambled order |
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| 561 | |||
| 562 | add (1) a0.0:ud r23.5<0;1,0>:ud 0x44EBC02:ud // msg desc; 1 is added to change BI to UV |
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| 563 | mov (1) r16.2:ud 0x0000E000:ud // Enable Red channel |
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| 564 | |||
| 565 | send (1) uwBUFFER_0(8)<1> r16 0x2 a0.0:ud |
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| 566 | // Returns V data in 4 GRFs in scrambled order |
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| 567 | |||
| 568 | SKIP_AVS_LOAD_L0_0_: |
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| 569 | nop |
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| 570 |