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6146 serge 1
/*
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 *  Copyright 2000-2011 Intel Corporation All Rights Reserved
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the
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 * "Software"), to deal in the Software without restriction, including
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 * without limitation the rights to use, copy, modify, merge, publish,
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 * distribute, sub license, and/or sell copies of the Software, and to
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 * permit persons to whom the Software is furnished to do so, subject to
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 * the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the
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 * next paragraph) shall be included in all copies or substantial portions
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 * of the Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
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 * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
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 * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT.
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 * IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR
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 * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT,
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 * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE
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 * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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 *
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 * This file was originally licensed under the following license
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 *
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 *  Licensed under the Apache License, Version 2.0 (the "License");
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 *  you may not use this file except in compliance with the License.
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 *  You may obtain a copy of the License at
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 *
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 *      http://www.apache.org/licenses/LICENSE-2.0
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 *
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 *  Unless required by applicable law or agreed to in writing, software
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 *  distributed under the License is distributed on an "AS IS" BASIS,
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 *  WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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 *  See the License for the specific language governing permissions and
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 *  limitations under the License.
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 */
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//   87    // Total instruction count
39
//    1    // Total kernel count
40
 
41
.kernel PA_DI_422CP
42
.code
43
 
44
 
45
 
46
// FileName:	DI.asm
47
// Author:		Vivek Kumar
48
// Description:	Tasks for DI only case (16x4 block)
49
 
50
 
51
 
52
 
53
// Module name: common.inc
54
//
55
// Common header file for all Video-Processing kernels
56
//
57
 
58
.default_execution_size (16)
59
.default_register_type  :ub
60
 
61
.reg_count_total        128
62
.reg_count_payload      7
63
 
64
//========== Common constants ==========
65
 
66
 
67
//========== Macros ==========
68
 
69
 
70
//Fast Jump, For more details see "Set_Layer_N.asm"
71
 
72
 
73
//========== Defines ====================
74
 
75
//========== Static Parameters (Common To All) ==========
76
//r1
77
 
78
 
79
//r2
80
 
81
                                    //  e.g.            byte0   byte1  byte2
82
                                    // YUYV               0       1      3
83
                                    // YVYU               0       3      1
84
 
85
//Color Pipe (IECP) parameters
86
 
87
 
88
//ByteCopy
89
 
90
 
91
//r4
92
 
93
                                    //  e.g.              byte0           byte1           byte2
94
                                    // YUYV                 0               1               3
95
                                    // YVYU                 0               3               1
96
 
97
 
98
//========== Inline parameters (Common To All) ===========
99
 
100
 
101
//============== Binding Index Table===========
102
//Common between DNDI and DNUV
103
 
104
 
105
//================= Common Message Descriptor =====
106
// Message descriptor for thread spawning
107
// Message Descriptors
108
//                = 000 0001 (min message len 1 ) 0,0000 (resp len 0   -add later)
109
//                  0000,0000,0000
110
//                  0001(Spawn a root thread),0001 (Root thread spawn thread)
111
//                = 0x02000011
112
// Thread Spawner Message Descriptor
113
 
114
 
115
// Message descriptor for atomic operation add
116
// Message Descriptors
117
//                = 000 0110 (min message len 6 ) 0,0000 (resp len 0   -add later)
118
//                  1(header present)001,10(typed atomic operation)0(return enabled)0(slot group, low 8 bits),0111 (AOP_Add)
119
//                  0000,0000 (Binding table index, added later)
120
//                = 0x02000011
121
 
122
// Atomic Operation Add Message Descriptor
123
 
124
 
125
// Message descriptor for dataport media write
126
        // Message Descriptors
127
                //                = 000 0001 (min message len 1 - add later) 00000 (resp len 0)
128
                //                  1 (header present 1) 0 1010 (media block write) 000000
129
                //                  00000000 (binding table index - set later)
130
                //                = 0x020A8000
131
 
132
 
133
// Message Length defines
134
 
135
 
136
// Response Length defines
137
 
138
 
139
// Block Width and Height Size defines
140
 
141
 
142
// Extended Message Descriptors
143
 
144
 
145
// Common message descriptors:
146
 
147
 
148
//===================== Math Function Control ===================================
149
 
150
 
151
//============ Message Registers ===============
152
                             // buf4 starts from r28
153
 
154
 
155
//#define mMSGHDR_EOT  r43    // Dummy Message Register for EOT
156
 
157
 
158
.declare    mubMSGPAYLOAD  Base=r30 ElementSize=1 SrcRegion=<16;16,1> Type=ub
159
.declare    muwMSGPAYLOAD  Base=r30 ElementSize=2 SrcRegion=<16;16,1> Type=uw
160
.declare    mudMSGPAYLOAD  Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=ud
161
.declare    mfMSGPAYLOAD   Base=r30 ElementSize=4 SrcRegion=<8;8,1> Type=f
162
 
163
//=================== End of thread instruction ===========================
164
 
165
 
166
//=====================Pointers Used=====================================
167
 
168
 
169
//=======================================================================
170
 
171
 
172
//r11-r17
173
// Define temp space for any usages
174
 
175
 
176
// Common Buffers
177
 
178
 
179
// temp space for rotation
180
 
181
.declare fROBUF		  Base=r11.0		ElementSize=4		SrcRegion=<8;8,1>		  DstRegion=<1>		Type=f
182
 
183
.declare udROBUF		Base=r11.0		ElementSize=4		SrcRegion=<8;8,1>		  DstRegion=<1>		Type=ud
184
 
185
.declare uwROBUF		Base=r11.0		ElementSize=2		SrcRegion=<16;16,1>		DstRegion=<1>		Type=uw
186
 
187
.declare ubROBUF		Base=r11.0		ElementSize=1		SrcRegion=<16;16,1>		DstRegion=<1>		Type=ub
188
 
189
.declare ub4ROBUF 	Base=r11.0		ElementSize=1		SrcRegion=<32;8,4>		DstRegion=<4>		Type=ub
190
 
191
 
192
// End of common.inc
193
 
194
 
195
// FileName:    DNDI.inc
196
// Author:      Vivek Kumar
197
// Description: Include file for DN, DI and DNDI
198
// Inputs:      DI_ENABLE, DN_ENABLE, DN_PLANAR, DN_PACKED
199
 
200
 
201
 
202
 
203
// End of common.inc
204
 
205
 
206
//Interface:
207
//Static Parameters:
208
//r1
209
 
210
 
211
//====================== Binding table (Explicit To DNDI)=========================================
212
 
213
 
214
.declare mudMSGHDR_DNDI     Base=r18      ElementSize=4    Type=ud
215
.declare mdMSGHDR_DNDI      Base=r18      ElementSize=4    Type=d
216
.declare mwMSGHDR_DNDI      Base=r18      ElementSize=2    Type=w
217
 
218
 
219
.declare mudMSGHDR_STMM     Base=r20      ElementSize=4    Type=ud
220
 
221
 
222
.declare mudMSGHDR_HIST     Base=r22      ElementSize=4    Type=ud
223
 
224
 
225
.declare mudMSGHDR_ENC_STATS Base=r24 ElementSize=4   Type=ud
226
.declare muwMSGHDR_ENC_STATS Base=r24 ElementSize=2   Type=uw
227
.declare mubMSGHDR_ENC_STATS Base=r24 ElementSize=1   Type=ub
228
 
229
 
230
.declare mudMSGHDR_DN_OUT   Base=r31.0      ElementSize=4  Type=ud
231
.declare mdMSGHDR_DN_OUT    Base=r31.0      ElementSize=4  Type=d
232
.declare mubMSGHDR_DN_OUT   Base=r31.0      ElementSize=1  Type=ub
233
 
234
 
235
.declare mudMSGHDR_UVCOPY   Base=r36      ElementSize=4  Type=ud
236
.declare mdMSGHDR_UVCOPY    Base=r36      ElementSize=4  Type=d
237
.declare mudMSGHDR_UCOPY    Base=r36       ElementSize=4  Type=ud
238
.declare mudMSGHDR_VCOPY    Base=r38       ElementSize=4  Type=ud
239
 
240
 
241
.declare mudMSGHDR_DI_OUT1  Base=r18.0      ElementSize=4     Type=ud
242
.declare mubMSGHDR_DI_OUT1  Base=r18.0      ElementSize=1     Type=ub
243
 
244
 
245
.declare mudMSGHDR_DI_OUT2  Base=r23.0      ElementSize=4     Type=ud
246
.declare mubMSGHDR_DI_OUT2  Base=r23.0      ElementSize=1     Type=ub
247
 
248
//r45
249
//Use r45 as message header, so no need to "mov" the data.
250
 
251
.declare mudDN_Y_OUT        Base=r45.0 ElementSize=4 SrcRegion=<8;8,1>   DstRegion=<1> Type=ud
252
 
253
// Message response (Denoised & DI-ed pixels & statistics); Use buffer 5
254
.declare udDNDI_RESP        Base=r46.0 ElementSize=4 SrcRegion=<8;8,1>   DstRegion=<1> Type=ud
255
.declare uwDNDI_RESP        Base=r46.0 ElementSize=2 SrcRegion=<16;16,1> DstRegion=<1> Type=uw
256
.declare ubDNDI_RESP        Base=r46.0 ElementSize=1 SrcRegion=<16;16,1> DstRegion=<1> Type=ub
257
 
258
// Message response (UV Copy); Use buffer 5
259
.declare udDNDI_UV_RESP     Base=r58.0 ElementSize=4 SrcRegion=<8;8,1>  DstRegion=<1> Type=ud
260
.declare ubDNDI_UV_RESP     Base=r58.0 ElementSize=1 SrcRegion=<16;16,1>    DstRegion=<1> Type=ub
261
 
262
//Temp GRFs: For 42X to 422 Conversion
263
.declare uwDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=2 SrcRegion=<16;16,1>    DstRegion=<1> Type=uw       //8 GRFs
264
.declare ubDNDI_UVCOPY_TEMP Base=r10.0 ElementSize=1 SrcRegion=<16;16,1>    DstRegion=<1> Type=ub       //8 GRFs
265
//---------------------------------------------------------------------------
266
// Message descriptors
267
//---------------------------------------------------------------------------
268
// Extended message descriptor
269
    // Message descriptor   for sampler read
270
    //                    = 000 0010 (message len 2) 00000 (resp len - set later, 12 or 5 or 11)
271
    //                      1 (header present 1) 0 11 (SIMD32/64 mode)
272
    //                      1000 (message type) 0000 (DI state index)
273
    //                      00000000 (binding table index - set later)
274
    //                    = 0x040b8000
275
 
276
 
277
// Attention: The Message Length is The Number of GRFs with Data Only, without the Header
278
 
279
 
280
//---------------------------------------------------------------------------
281
// VDI Return Data format
282
//---------------------------------------------------------------------------
283
// Defines for DI enabled
284
 
285
 
286
// Defines for DI disabled
287
 
288
 
289
 
290
// FileName:	DNDI_Command.asm
291
// Author:		Vivek Kumar
292
// Description:	Sends a message to the VDI to process one DN (16x8) or DNDI (16x4) block
293
 
294
// Prepare the DNDI send command
295
mov (8)		mudMSGHDR_DNDI(0)<1>			r0.0<8;8,1>:ud					// message header
296
mov (1)		mwMSGHDR_DNDI(1,4)<1>			r9.0<0;1,0>:w		{ NoDDClr }		// horizontal origin	// Do we need to add offset here? -vK
297
mov (1)		mwMSGHDR_DNDI(1,12)<1>			r9.1<0;1,0>:w		{ NoDDChk }		// vertical origin		// Can these 2 be combined? - vK
298
 
299
send (8)	udDNDI_RESP(0)<1>	r18	0x2	0x4AE8003:ud
300
 
301
// On Gen6, with VDI walker, use the XY pair returned rather than programmed above
302
// VDI_RETURNED_XY is ordered XY in case of walker enables and the same as programmed in case of walker disabled
303
mov (2) 	r9.0<1>:w     uwDNDI_RESP(9,14)<2;2,1>	// horizontal/Vertial origin in W.14 and W.15
304
 
305
 
306
 
307
// FileName:	DI_STMM_Save.asm
308
// Author:		Vivek Kumar
309
// Description:	Saves DI STMM Data to statistics surface in case of DI enabled (for 16x4 block)
310
 
311
// Write STMM to memory
312
mov (8)     mudMSGHDR_STMM(0)<1>	r0.0<8;8,1>:ud               							// message header
313
mov (8)     mudMSGHDR_STMM(1)<1>   	udDNDI_RESP(8,0)         					// Move STMM to MRF
314
 
315
shr (1)     mudMSGHDR_STMM(0,0)<1>	r9.0<0;1,0>:w            1:w     { NoDDClr } 		// X origin / 2
316
mov (1)     mudMSGHDR_STMM(0,1)<1>	r9.1<0;1,0>:w                    { NoDDClr, NoDDChk }  	// Y origin
317
mov (1)     mudMSGHDR_STMM(0,2)<1>	0x30007:ud           { NoDDChk } 		// block width and height (8x4)
318
 
319
send (8)	null<1>:d	r20	0x5		0x40A8021:ud
320
 
321
 
322
 
323
// FileName:	DNDI_Enc_Stats_Save.asm
324
// Author:		Vivek Kumar
325
// Description:	Saves Encoder Statistics data to statistics surface in case of DI enabled (for 16x4 block)
326
 
327
// Write encoder statistics to memory
328
//Currently enable this only on Gen6 validation
329
mov (8)		mudMSGHDR_ENC_STATS(1)<1>	0x0:ud						// Init payload MRF
330
mov (8)		mudMSGHDR_ENC_STATS(0)<1>	r0.0<8;8,1>:ud				// message header
331
 
332
shr (1)		mudMSGHDR_ENC_STATS(0,0)<1>		r9.0<0;1,0>:w            	1:w  	{ NoDDClr }			//enable the flag after testing on si           			{ NoDDClr }	// X origin / 2
333
mul (1)		acc0.1<1>:ud					r9.1<0;1,0>:w				3:w																							// Y origin * 3
334
shr (1)		mudMSGHDR_ENC_STATS(0,1)<1>		acc0.1<0;1,0>:ud			2:w		{ NoDDClr, NoDDChk }		//enable the flag after testing on si			   { NoDDClr, NoDDChk } // Y origin * 3/4
335
mov (1)		mudMSGHDR_ENC_STATS(0,2)<1>		0x20007:ud				{ NoDDChk }			//enable the flag after testing on si						{ NoDDChk } // block width and height (8x3)
336
add (2)		mudMSGHDR_ENC_STATS(0,0)<1>		mudMSGHDR_ENC_STATS(0,0)<2;2,1>       	r1.12<2;2,1>:uw					// Add pitch to X,Y origin
337
 
338
 
339
	//Data block for Encoder Statistics
340
	//----------------------------------------------------
341
	//|  0  |   1  |   2   |  3  |  4  |  5  |  6  |  7  | Bytes
342
	//----------------------------------------------------
343
	//| BNE | MCNT | FCNT | TCNT |  X  |  X  |  X  |  X  |
344
	//----------------------------------------------------
345
	//|   DcTpT    |     SVCM    |   DcBpT   |   DcTpB   |
346
	//----------------------------------------------------
347
	//|   SHCM     |     STAD    |   DcTcB   |   DcBpB   |
348
	//----------------------------------------------------
349
	mov (1)		mudMSGHDR_ENC_STATS(1,0)<1>		udDNDI_RESP(9,1)<0;1,0>    		{ NoDDClr }			// Move encoder statistics to MRF
350
	mov (2)		mudMSGHDR_ENC_STATS(1,3)<2>		udDNDI_RESP(9,3)<2;2,1>    		{ NoDDClr, NoDDChk }		// Move encoder statistics to MRF
351
	mov (2)		mudMSGHDR_ENC_STATS(1,2)<2>		udDNDI_RESP(9,5)<2;2,1>    		{ NoDDChk }			// Move encoder statistics to MRF
352
 
353
 
354
send (8)   null<1>:d    r24    0x5    0x40A8021:ud
355
 
356
 
357
 
358
// FileName:    DI_Save_422CP_16x4.asm
359
// Author:      Vivek Kumar
360
// Description: Save two 16x4 blocks of DI output in 422 format to Color Pipe (IECP)
361
 
362
 
363
.declare mubMSGHDR_DI_OUT1_1  Base=r18.0      ElementSize=1  Type=ub
364
 
365
 
366
.declare mubMSGHDR_DI_OUT1_2  Base=r21.0      ElementSize=1  Type=ub
367
 
368
 
369
.declare mubMSGHDR_DI_OUT2_1  Base=r24.0      ElementSize=1  Type=ub
370
 
371
 
372
.declare mubMSGHDR_DI_OUT2_2  Base=r27.0      ElementSize=1  Type=ub
373
 
374
 
375
mov (8) r27.0<1>:ud     r0.0<8;8,1>:ud
376
shl (1) r27.0<1>:ud     r9.0<0;1,0>:w            1:w  { NoDDClr }          // H. block origin need to be doubled
377
mov (1) r27.1<1>:ud     r9.1<0;1,0>:w                 { NoDDClr, NoDDChk }       // Block origin
378
mov (1) r27.2<1>:ud     0x3000F:ud        { NoDDClr, NoDDChk }       // Block width and height (16x8)
379
 
380
//M0.3  - 0 - CP Enable, 1 - Area of Interest, 3:2 Message Format(TBD), 4:3 - Ignored, 31:5 CP state pointer
381
//Compose area-of-interest bit + color pipe state pointer
382
or (1)  r27.3<1>:ud     r2.4<0;1,0>:ud     r9.26<0;1,0>:b     { NoDDChk }
383
 
384
//prepare the message headers
385
mov (8) r18.0<1>:ud       r27<8;8,1>:ud
386
mov (8) r24.0<1>:ud       r27<8;8,1>:ud
387
 
388
 
389
// Pack 2nd field Y; First 8x4 block
390
	mov (8)		mubMSGHDR_DI_OUT1_1(1)<2>			ubDNDI_RESP(0,0)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
391
	mov (8)		mubMSGHDR_DI_OUT1_1(1,16)<2>		ubDNDI_RESP(0,16)<8;8,1>			{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
392
	mov (8)		mubMSGHDR_DI_OUT1_1(2)<2>			ubDNDI_RESP(0,32)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
393
	mov (8)		mubMSGHDR_DI_OUT1_1(2,16)<2>		ubDNDI_RESP(0,48)<8;8,1>			{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
394
 
395
// Pack 2nd field U, V; First 8x4 block
396
	mov (4)     mubMSGHDR_DI_OUT1_1(1,1)<4>   		ubDNDI_RESP(2,1)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
397
	mov (4)     mubMSGHDR_DI_OUT1_1(1,17)<4>   	ubDNDI_RESP(2,17)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
398
 
399
	mov (4)     mubMSGHDR_DI_OUT1_1(1,3)<4>	  	ubDNDI_RESP(2,0)<8;4,2>			{ NoDDChk }    	// copy line of V directly to memory as optimization
400
	mov (4)     mubMSGHDR_DI_OUT1_1(1,19)<4>   	ubDNDI_RESP(2,16)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
401
	mov (4)     mubMSGHDR_DI_OUT1_1(2,1)<4>   		ubDNDI_RESP(2,33)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
402
	mov (4)     mubMSGHDR_DI_OUT1_1(2,17)<4>   	ubDNDI_RESP(2,49)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
403
 
404
	mov (4)     mubMSGHDR_DI_OUT1_1(2,3)<4>	  	ubDNDI_RESP(2,32)<8;4,2>			{ NoDDChk }    	// copy line of V directly to memory as optimization
405
	mov (4)     mubMSGHDR_DI_OUT1_1(2,19)<4>   	ubDNDI_RESP(2,48)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
406
 
407
 
408
// Pack 2nd field Y; Second 8x4 block
409
mov	(8)	r21.0<1>:ud		r18.0<8;8,1>:ud
410
add	(1)	r21.0<1>:ud		r21.0<0;1,0>:w		0x10:w
411
 
412
	mov (8)		mubMSGHDR_DI_OUT1_2(1)<2>			ubDNDI_RESP(0,8)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
413
	mov (8)		mubMSGHDR_DI_OUT1_2(1,16)<2>		ubDNDI_RESP(0,24)<8;8,1>		{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
414
	mov (8)		mubMSGHDR_DI_OUT1_2(2)<2>			ubDNDI_RESP(0,40)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
415
	mov (8)		mubMSGHDR_DI_OUT1_2(2,16)<2>		ubDNDI_RESP(0,56)<8;8,1>		{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
416
 
417
// Pack 2nd field U, V; Second 8x4 block
418
	mov (4)     mubMSGHDR_DI_OUT1_2(1,1)<4>   		ubDNDI_RESP(2,9)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
419
	mov (4)     mubMSGHDR_DI_OUT1_2(1,17)<4>		ubDNDI_RESP(2,25)<8;4,2>	{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
420
 
421
	mov (4)     mubMSGHDR_DI_OUT1_2(1,3)<4>   		ubDNDI_RESP(2,8)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
422
	mov (4)     mubMSGHDR_DI_OUT1_2(1,19)<4>		ubDNDI_RESP(2,24)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
423
	mov (4)     mubMSGHDR_DI_OUT1_2(2,1)<4>   		ubDNDI_RESP(2,41)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
424
	mov (4)     mubMSGHDR_DI_OUT1_2(2,17)<4>		ubDNDI_RESP(2,57)<8;4,2>	{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
425
 
426
	mov (4)     mubMSGHDR_DI_OUT1_2(2,3)<4>   		ubDNDI_RESP(2,40)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
427
	mov (4)     mubMSGHDR_DI_OUT1_2(2,19)<4>		ubDNDI_RESP(2,56)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
428
 
429
send (8)    null<1>:d    r18.0   0x5     0x60A801B:ud
430
send (8)    null<1>:d    r21.0   0x5     0x60A801B:ud
431
 
432
// Pack 1st field Y; 1st 8x4 block
433
	mov (8)		mubMSGHDR_DI_OUT2_1(1)<2>			ubDNDI_RESP(4,0)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
434
	mov (8)		mubMSGHDR_DI_OUT2_1(1,16)<2>		ubDNDI_RESP(4,16)<8;8,1>			{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
435
	mov (8)		mubMSGHDR_DI_OUT2_1(2)<2>			ubDNDI_RESP(4,32)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
436
	mov (8)		mubMSGHDR_DI_OUT2_1(2,16)<2>		ubDNDI_RESP(4,48)<8;8,1>			{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
437
 
438
// Pack 1st field U,V; 1st 8x4 block
439
	mov (4)     mubMSGHDR_DI_OUT2_1(1,1)<4>   		ubDNDI_RESP(6,1)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
440
	mov (4)     mubMSGHDR_DI_OUT2_1(1,17)<4>   	ubDNDI_RESP(6,17)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
441
 
442
	mov (4)     mubMSGHDR_DI_OUT2_1(1,3)<4>	  	ubDNDI_RESP(6,0)<8;4,2>		    { NoDDChk }    	// copy line of V directly to memory as optimization
443
	mov (4)     mubMSGHDR_DI_OUT2_1(1,19)<4>   	ubDNDI_RESP(6,16)<8;4,2>	    { NoDDChk }    	// copy line of V directly to memory as optimization
444
	mov (4)     mubMSGHDR_DI_OUT2_1(2,1)<4>   		ubDNDI_RESP(6,33)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
445
	mov (4)     mubMSGHDR_DI_OUT2_1(2,17)<4>   	ubDNDI_RESP(6,49)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
446
 
447
	mov (4)     mubMSGHDR_DI_OUT2_1(2,3)<4>	  	ubDNDI_RESP(6,32)<8;4,2>		    { NoDDChk }    	// copy line of V directly to memory as optimization
448
	mov (4)     mubMSGHDR_DI_OUT2_1(2,19)<4>   	ubDNDI_RESP(6,48)<8;4,2>	    { NoDDChk }    	// copy line of V directly to memory as optimization
449
 
450
// Pack 1st field Y; 2nd 8x4 block
451
mov	(8)	r27.0<1>:ud		r24.0<8;8,1>:ud
452
add	(1)	r27.0<1>:ud		r27.0<0;1,0>:w		0x10:w
453
 
454
	mov (8)		mubMSGHDR_DI_OUT2_2(1)<2>			ubDNDI_RESP(4,8)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
455
	mov (8)		mubMSGHDR_DI_OUT2_2(1,16)<2>		ubDNDI_RESP(4,24)<8;8,1>		{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
456
	mov (8)		mubMSGHDR_DI_OUT2_2(2)<2>			ubDNDI_RESP(4,40)<8;8,1>			{ NoDDClr } 	// copy line of Y directly to memory as optimization
457
	mov (8)		mubMSGHDR_DI_OUT2_2(2,16)<2>		ubDNDI_RESP(4,56)<8;8,1>		{ NoDDClr, NoDDChk } 	// copy line of Y directly to memory as optimization
458
 
459
// Pack 1st field U, V; 2nd 8x4 block
460
	mov (4)     mubMSGHDR_DI_OUT2_2(1,1)<4>   		ubDNDI_RESP(6,9)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
461
	mov (4)     mubMSGHDR_DI_OUT2_2(1,17)<4>		ubDNDI_RESP(6,25)<8;4,2>	{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
462
 
463
	mov (4)     mubMSGHDR_DI_OUT2_2(1,3)<4>   		ubDNDI_RESP(6,8)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
464
	mov (4)     mubMSGHDR_DI_OUT2_2(1,19)<4>		ubDNDI_RESP(6,24)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
465
	mov (4)     mubMSGHDR_DI_OUT2_2(2,1)<4>   		ubDNDI_RESP(6,41)<8;4,2>		{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
466
	mov (4)     mubMSGHDR_DI_OUT2_2(2,17)<4>		ubDNDI_RESP(6,57)<8;4,2>	{ NoDDClr, NoDDChk } 	// copy line of U directly to memory as optimization
467
 
468
	mov (4)     mubMSGHDR_DI_OUT2_2(2,3)<4>   		ubDNDI_RESP(6,40)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
469
	mov (4)     mubMSGHDR_DI_OUT2_2(2,19)<4>		ubDNDI_RESP(6,56)<8;4,2>		{ NoDDChk }    	// copy line of V directly to memory as optimization
470
 
471
send (8)    null<1>:d    r24.0     0x5     0x60A801E:ud
472
send (8)    null<1>:d    r27.0     0x5     0x60A801E:ud
473
 
474
 
475
 
476
//End of Thread message
477
 
478
mov (8) r127<1>:ud r0.0<8;8,1>:ud
479
 send (1) null<1>:d r127 0x27 0x02000010
480
 
481
 
482
.end_code
483
.end_kernel