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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5361 | serge | 1 | /* |
| 2 | * Copyright © 2012 Intel Corporation |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice (including the next |
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| 12 | * paragraph) shall be included in all copies or substantial portions of the |
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| 13 | * Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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| 21 | * IN THE SOFTWARE. |
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| 22 | * |
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| 23 | * Authors: |
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| 24 | * Xiang Haihao |
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| 25 | */ |
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| 26 | |||
| 27 | __PAK_OBJECT: |
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| 28 | mul (1) tmp_offset.0<1>:ud width_in_mb<0,1,0>:uw mb_y<0,1,0>:ub {align1}; |
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| 29 | add (1) tmp_offset.0<1>:ud tmp_offset.0<0,1,0>:ud mb_x<0,1,0>:ub {align1}; |
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| 30 | /* |
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| 31 | * The layout of VME output |
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| 32 | * ++++++++++++++++++++++++++++++++++++++++++++++ |
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| 33 | * | MV(128bytes) | other info (32bytes) | |
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| 34 | * ++++++++++++++++++++++++++++++++++++++++++++++ |
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| 35 | */ |
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| 36 | mul (1) tmp_vme_output.8<1>:ud tmp_offset.0<0,1,0>:ud INTER_VME_OUTPUT_IN_OWS:ud {align1} ; /* point to output buffer */ |
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| 37 | add (1) tmp_vme_output.8<1>:ud tmp_vme_output.8<0,1,0>:ud INTER_VME_OUTPUT_MV_IN_OWS:uw {align1}; /* point to other info */ |
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| 38 | |||
| 39 | __PAK_OBJECT_LOOP: |
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| 40 | /* |
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| 41 | * Read other info |
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| 42 | */ |
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| 43 | mov (8) msg_reg0.0<1>:ud tmp_vme_output<8,8,1>:ud {align1} ; |
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| 44 | |||
| 45 | send (16) |
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| 46 | msg_ind |
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| 47 | ob_read_wb |
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| 48 | null |
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| 49 | data_port( |
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| 50 | OB_CACHE_TYPE, |
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| 51 | OB_READ, |
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| 52 | OB_CONTROL_2, |
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| 53 | BIND_IDX_VME_OUTPUT, |
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| 54 | OB_WRITE_COMMIT_CATEGORY, |
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| 55 | OB_HEADER_PRESENT |
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| 56 | ) |
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| 57 | mlen 1 |
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| 58 | rlen ob_read_wb_len_vme_inter |
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| 59 | {align1}; |
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| 60 | |||
| 61 | |||
| 62 | /* |
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| 63 | * Fill the command |
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| 64 | */ |
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| 65 | mov (16) pak_object_ud<1>:ud 0x0:ud {align1} ; |
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| 66 | |||
| 67 | and.z.f0.1 (1) null<1>:uw flags<0,1,0>:uw FLAG_MASK_LAST_OBJECT {align1}; |
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| 68 | |||
| 69 | and.z.f0.0 (1) null<1>:ud ob_read_wb0.0<0,1,0>:ud INTRAMBFLAG_MASK:ud {align1} ; |
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| 70 | |||
| 71 | (-f0.0)jmpi (1) __FILL_INTRA_PAK_COMMAND ; |
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| 72 | |||
| 73 | __FILL_INTER_PAK_COMMAND: |
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| 74 | /* DW0 */ |
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| 75 | mov (1) pak_object0_ud<1>:ud MFC_AVC_PAK_OBJECT_INTER_DW0 ; |
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| 76 | |||
| 77 | /* DW2 */ |
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| 78 | mul (1) pak_object2_ud<1>:ud tmp_offset.0<0,1,0>:ud INTER_VME_OUTPUT_IN_BYTES:ud {align1} ; |
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| 79 | |||
| 80 | /* DW5 */ |
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| 81 | mov (1) pak_object5_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW5 ; |
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| 82 | |||
| 83 | /* DW1 must be 32 for 8 MVs and 128 for 32 MVs !!! */ |
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| 84 | mov (1) pak_object1_ud<1>:ud ob_read_wb0.8<0,1,0>:ud {align1} ; |
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| 85 | |||
| 86 | /* DW3 */ |
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| 87 | mov (1) pak_object3_ud<1>:ud ob_read_wb0.0<0,1,0>:ud {align1} ; |
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| 88 | |||
| 89 | /* DW4 */ |
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| 90 | add (1) pak_object4_ud<1>:ud mb_xy<0,1,0>:uw MFC_AVC_PAK_OBJECT_INTER_DW4 {align1} ; |
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| 91 | add (1) mb_x<1>:ub mb_x<0,1,0>:ub 1:uw {align1}; |
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| 92 | cmp.e.f0.0 (1) null<1>:uw width_in_mb<0,1,0>:uw mb_x<0,1,0>:ub {align1}; |
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| 93 | (f0.0)mov (1) mb_x<1>:ub 0:uw {align1} ; |
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| 94 | (f0.0)add (1) mb_y<1>:ub mb_y<0,1,0>:ub 1:uw {align1} ; |
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| 95 | |||
| 96 | /* DW6 */ |
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| 97 | mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; |
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| 98 | (-f0.1)mov (1) pak_object6_ud<1>:ud MFC_AVC_PAK_OBJECT_INTER_DW6 {align1} ; |
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| 99 | cmp.e.f0.0 (1) null<1>:uw total_mbs<0,1,0>:uw 1:uw {align1}; |
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| 100 | (-f0.0)mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; |
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| 101 | add (1) pak_object6_ud<1>:ud pak_object6_ud<0,1,0>:ud qp<0,1,0>:ub {align1} ; |
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| 102 | |||
| 103 | /* DW7 */ |
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| 104 | mov (1) pak_object7_ud<1>:ud ob_read_wb0.4<0,1,0>:ud {align1} ; |
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| 105 | |||
| 106 | /* DW8 */ |
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| 107 | mov (1) pak_object8_ud<1>:ud ref_idx0<0,1,0>:ud {align1} ; |
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| 108 | |||
| 109 | /* DW9 */ |
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| 110 | mov (1) pak_object9_ud<1>:ud ref_idx1<0,1,0>:ud {align1} ; |
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| 111 | |||
| 112 | jmpi (1) __OUTPUT_PAK_COMMAND ; |
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| 113 | |||
| 114 | __FILL_INTRA_PAK_COMMAND: |
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| 115 | /* DW0 */ |
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| 116 | mov (1) pak_object0_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW0 ; |
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| 117 | |||
| 118 | /* DW5 */ |
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| 119 | mov (1) pak_object5_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW5 ; |
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| 120 | |||
| 121 | /* DW4 */ |
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| 122 | add (1) pak_object4_ud<1>:ud mb_xy<0,1,0>:uw MFC_AVC_PAK_OBJECT_INTRA_DW4 {align1} ; |
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| 123 | add (1) mb_x<1>:ub mb_x<0,1,0>:ub 1:uw {align1}; |
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| 124 | cmp.e.f0.0 (1) null<1>:uw width_in_mb<0,1,0>:uw mb_x<0,1,0>:ub {align1}; |
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| 125 | (f0.0)mov (1) mb_x<1>:ub 0:uw {align1} ; |
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| 126 | (f0.0)add (1) mb_y<1>:ub mb_y<0,1,0>:ub 1:uw {align1} ; |
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| 127 | |||
| 128 | /* DW6 */ |
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| 129 | mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; |
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| 130 | (-f0.1)mov (1) pak_object6_ud<1>:ud MFC_AVC_PAK_OBJECT_INTRA_DW6 {align1} ; |
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| 131 | cmp.e.f0.0 (1) null<1>:uw total_mbs<0,1,0>:uw 1:uw {align1}; |
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| 132 | (-f0.0)mov (1) pak_object6_ud<1>:ud 0x0:ud {align1} ; |
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| 133 | add (1) pak_object6_ud<1>:ud pak_object6_ud<0,1,0>:ud qp<0,1,0>:ub {align1} ; |
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| 134 | |||
| 135 | /* DW3 */ |
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| 136 | and (1) pak_object3_ud<1>:ud ob_read_wb0.0<0,1,0>:ud 0xFFFF {align1} ; |
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| 137 | add (1) pak_object3_ud<1>:ud pak_object3_ud<0,1,0>:ud MFC_AVC_PAK_OBJECT_INTRA_DW3 {align1} ; |
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| 138 | |||
| 139 | /* DW7 */ |
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| 140 | mov (1) pak_object7_ud<1>:ud ob_read_wb0.4<0,1,0>:ud {align1} ; |
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| 141 | |||
| 142 | /* DW8 */ |
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| 143 | mov (1) pak_object8_ud<1>:ud ob_read_wb0.8<0,1,0>:ud {align1} ; |
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| 144 | |||
| 145 | /* DW9 */ |
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| 146 | and (1) pak_object9_ud<1>:ud ob_read_wb0.12<0,1,0>:ud 0xFC:ud {align1} ; |
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| 147 | |||
| 148 | __OUTPUT_PAK_COMMAND: |
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| 149 | mov (8) msg_reg0.0<1>:ud tmp_mfc_batchbuffer<8,8,1>:ud {align1} ; |
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| 150 | mov (8) msg_reg1.0<1>:ud pak_object_ud<8,8,1>:ud {align1} ; |
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| 151 | mov (8) msg_reg2.0<1>:ud pak_object8_ud<8,8,1>:ud {align1} ; |
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| 152 | |||
| 153 | /* point to the next other info block */ |
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| 154 | add (1) tmp_vme_output.8<1>:ud tmp_vme_output.8<0,1,0>:ud INTER_VME_OUTPUT_IN_OWS:ud {align1} ; |
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| 155 | |||
| 156 | send (16) |
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| 157 | msg_ind |
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| 158 | ob_write_wb |
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| 159 | null |
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| 160 | data_port( |
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| 161 | OB_CACHE_TYPE, |
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| 162 | OB_WRITE, |
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| 163 | OB_CONTROL_3, |
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| 164 | BIND_IDX_MFC_BATCHBUFFER, |
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| 165 | OB_WRITE_COMMIT_CATEGORY, |
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| 166 | OB_HEADER_PRESENT |
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| 167 | ) |
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| 168 | mlen 3 |
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| 169 | rlen ob_write_wb_length |
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| 170 | {align1}; |
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| 171 | |||
| 172 | /* the new offset */ |
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| 173 | add (1) tmp_mfc_batchbuffer.8<1>:ud tmp_mfc_batchbuffer.8<0,1,0>:ud 4:ud {align1} ; |
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| 174 | add (1) tmp_offset.0<1>:ud tmp_offset.0<0,1,0>:ud 1:ud {align1}; |
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| 175 | |||
| 176 | add.z.f0.0 (1) total_mbs<1>:w total_mbs<0,1,0>:w -1:w {align1}; |
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| 177 | (-f0.0)jmpi (1) __PAK_OBJECT_LOOP ; |
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| 178 |