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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4349 | Serge | 1 | import swresample-0, \ |
| 2 | ff_float_to_int16_a_sse2,'ff_float_to_int16_a_sse2',\,'ff_float_to_int16_a_sse2',\ |
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| 3 | ff_float_to_int16_u_sse2,'ff_float_to_int16_u_sse2',\,'ff_float_to_int16_u_sse2',\ |
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| 4 | ff_float_to_int32_a_sse2,'ff_float_to_int32_a_sse2',\,'ff_float_to_int32_a_sse2',\ |
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| 5 | ff_float_to_int32_u_sse2,'ff_float_to_int32_u_sse2',\,'ff_float_to_int32_u_sse2',\ |
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| 6 | ff_int16_to_float_a_sse2,'ff_int16_to_float_a_sse2',\,'ff_int16_to_float_a_sse2',\ |
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| 7 | ff_int16_to_float_u_sse2,'ff_int16_to_float_u_sse2',\,'ff_int16_to_float_u_sse2',\ |
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| 8 | ff_int16_to_int32_a_mmx,'ff_int16_to_int32_a_mmx',\,'ff_int16_to_int32_a_mmx',\ |
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| 9 | ff_int16_to_int32_a_sse2,'ff_int16_to_int32_a_sse2',\,'ff_int16_to_int32_a_sse2',\ |
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| 10 | ff_int16_to_int32_u_mmx,'ff_int16_to_int32_u_mmx',\,'ff_int16_to_int32_u_mmx',\ |
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| 11 | ff_int16_to_int32_u_sse2,'ff_int16_to_int32_u_sse2',\,'ff_int16_to_int32_u_sse2',\ |
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| 12 | ff_int32_to_float_a_sse2,'ff_int32_to_float_a_sse2',\,'ff_int32_to_float_a_sse2',\ |
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| 13 | ff_int32_to_float_u_sse2,'ff_int32_to_float_u_sse2',\,'ff_int32_to_float_u_sse2',\ |
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| 14 | ff_int32_to_int16_a_mmx,'ff_int32_to_int16_a_mmx',\,'ff_int32_to_int16_a_mmx',\ |
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| 15 | ff_int32_to_int16_a_sse2,'ff_int32_to_int16_a_sse2',\,'ff_int32_to_int16_a_sse2',\ |
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| 16 | ff_int32_to_int16_u_mmx,'ff_int32_to_int16_u_mmx',\,'ff_int32_to_int16_u_mmx',\ |
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| 17 | ff_int32_to_int16_u_sse2,'ff_int32_to_int16_u_sse2',\,'ff_int32_to_int16_u_sse2',\ |
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| 18 | ff_log2_tab,'ff_log2_tab',\,'ff_log2_tab',\ |
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| 19 | ff_mix_1_1_a_float_sse,'ff_mix_1_1_a_float_sse',\,'ff_mix_1_1_a_float_sse',\ |
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| 20 | ff_mix_1_1_a_int16_mmx,'ff_mix_1_1_a_int16_mmx',\,'ff_mix_1_1_a_int16_mmx',\ |
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| 21 | ff_mix_1_1_a_int16_sse2,'ff_mix_1_1_a_int16_sse2',\,'ff_mix_1_1_a_int16_sse2',\ |
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| 22 | ff_mix_1_1_u_float_sse,'ff_mix_1_1_u_float_sse',\,'ff_mix_1_1_u_float_sse',\ |
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| 23 | ff_mix_1_1_u_int16_mmx,'ff_mix_1_1_u_int16_mmx',\,'ff_mix_1_1_u_int16_mmx',\ |
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| 24 | ff_mix_1_1_u_int16_sse2,'ff_mix_1_1_u_int16_sse2',\,'ff_mix_1_1_u_int16_sse2',\ |
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| 25 | ff_mix_2_1_a_float_sse,'ff_mix_2_1_a_float_sse',\,'ff_mix_2_1_a_float_sse',\ |
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| 26 | ff_mix_2_1_a_int16_mmx,'ff_mix_2_1_a_int16_mmx',\,'ff_mix_2_1_a_int16_mmx',\ |
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| 27 | ff_mix_2_1_a_int16_sse2,'ff_mix_2_1_a_int16_sse2',\,'ff_mix_2_1_a_int16_sse2',\ |
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| 28 | ff_mix_2_1_u_float_sse,'ff_mix_2_1_u_float_sse',\,'ff_mix_2_1_u_float_sse',\ |
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| 29 | ff_mix_2_1_u_int16_mmx,'ff_mix_2_1_u_int16_mmx',\,'ff_mix_2_1_u_int16_mmx',\ |
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| 30 | ff_mix_2_1_u_int16_sse2,'ff_mix_2_1_u_int16_sse2',\,'ff_mix_2_1_u_int16_sse2',\ |
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| 31 | ff_pack_2ch_float_to_int16_a_sse2,'ff_pack_2ch_float_to_int16_a_sse2',\,'ff_pack_2ch_float_to_int16_a_sse2',\ |
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| 32 | ff_pack_2ch_float_to_int16_u_sse2,'ff_pack_2ch_float_to_int16_u_sse2',\,'ff_pack_2ch_float_to_int16_u_sse2',\ |
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| 33 | ff_pack_2ch_float_to_int32_a_sse2,'ff_pack_2ch_float_to_int32_a_sse2',\,'ff_pack_2ch_float_to_int32_a_sse2',\ |
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| 34 | ff_pack_2ch_float_to_int32_u_sse2,'ff_pack_2ch_float_to_int32_u_sse2',\,'ff_pack_2ch_float_to_int32_u_sse2',\ |
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| 35 | ff_pack_2ch_int16_to_float_a_sse2,'ff_pack_2ch_int16_to_float_a_sse2',\,'ff_pack_2ch_int16_to_float_a_sse2',\ |
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| 36 | ff_pack_2ch_int16_to_float_u_sse2,'ff_pack_2ch_int16_to_float_u_sse2',\,'ff_pack_2ch_int16_to_float_u_sse2',\ |
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| 37 | ff_pack_2ch_int16_to_int16_a_sse2,'ff_pack_2ch_int16_to_int16_a_sse2',\,'ff_pack_2ch_int16_to_int16_a_sse2',\ |
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| 38 | ff_pack_2ch_int16_to_int16_u_sse2,'ff_pack_2ch_int16_to_int16_u_sse2',\,'ff_pack_2ch_int16_to_int16_u_sse2',\ |
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| 39 | ff_pack_2ch_int16_to_int32_a_sse2,'ff_pack_2ch_int16_to_int32_a_sse2',\,'ff_pack_2ch_int16_to_int32_a_sse2',\ |
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| 40 | ff_pack_2ch_int16_to_int32_u_sse2,'ff_pack_2ch_int16_to_int32_u_sse2',\,'ff_pack_2ch_int16_to_int32_u_sse2',\ |
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| 41 | ff_pack_2ch_int32_to_float_a_sse2,'ff_pack_2ch_int32_to_float_a_sse2',\,'ff_pack_2ch_int32_to_float_a_sse2',\ |
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| 42 | ff_pack_2ch_int32_to_float_u_sse2,'ff_pack_2ch_int32_to_float_u_sse2',\,'ff_pack_2ch_int32_to_float_u_sse2',\ |
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| 43 | ff_pack_2ch_int32_to_int16_a_sse2,'ff_pack_2ch_int32_to_int16_a_sse2',\,'ff_pack_2ch_int32_to_int16_a_sse2',\ |
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| 44 | ff_pack_2ch_int32_to_int16_u_sse2,'ff_pack_2ch_int32_to_int16_u_sse2',\,'ff_pack_2ch_int32_to_int16_u_sse2',\ |
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| 45 | ff_pack_2ch_int32_to_int32_a_sse2,'ff_pack_2ch_int32_to_int32_a_sse2',\,'ff_pack_2ch_int32_to_int32_a_sse2',\ |
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| 46 | ff_pack_2ch_int32_to_int32_u_sse2,'ff_pack_2ch_int32_to_int32_u_sse2',\,'ff_pack_2ch_int32_to_int32_u_sse2',\ |
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| 47 | ff_pack_6ch_float_to_float_a_mmx,'ff_pack_6ch_float_to_float_a_mmx',\,'ff_pack_6ch_float_to_float_a_mmx',\ |
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| 48 | ff_pack_6ch_float_to_float_a_sse4,'ff_pack_6ch_float_to_float_a_sse4',\,'ff_pack_6ch_float_to_float_a_sse4',\ |
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| 49 | ff_pack_6ch_float_to_float_u_mmx,'ff_pack_6ch_float_to_float_u_mmx',\,'ff_pack_6ch_float_to_float_u_mmx',\ |
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| 50 | ff_pack_6ch_float_to_float_u_sse4,'ff_pack_6ch_float_to_float_u_sse4',\,'ff_pack_6ch_float_to_float_u_sse4',\ |
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| 51 | ff_pack_6ch_float_to_int32_a_sse4,'ff_pack_6ch_float_to_int32_a_sse4',\,'ff_pack_6ch_float_to_int32_a_sse4',\ |
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| 52 | ff_pack_6ch_float_to_int32_u_sse4,'ff_pack_6ch_float_to_int32_u_sse4',\,'ff_pack_6ch_float_to_int32_u_sse4',\ |
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| 53 | ff_pack_6ch_int32_to_float_a_sse4,'ff_pack_6ch_int32_to_float_a_sse4',\,'ff_pack_6ch_int32_to_float_a_sse4',\ |
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| 54 | ff_pack_6ch_int32_to_float_u_sse4,'ff_pack_6ch_int32_to_float_u_sse4',\,'ff_pack_6ch_int32_to_float_u_sse4',\ |
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| 55 | ff_resample_int16_rounder,'ff_resample_int16_rounder',\,'ff_resample_int16_rounder',\ |
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| 56 | ff_unpack_2ch_float_to_int16_a_sse2,'ff_unpack_2ch_float_to_int16_a_sse2',\,'ff_unpack_2ch_float_to_int16_a_sse2',\ |
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| 57 | ff_unpack_2ch_float_to_int16_u_sse2,'ff_unpack_2ch_float_to_int16_u_sse2',\,'ff_unpack_2ch_float_to_int16_u_sse2',\ |
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| 58 | ff_unpack_2ch_float_to_int32_a_sse2,'ff_unpack_2ch_float_to_int32_a_sse2',\,'ff_unpack_2ch_float_to_int32_a_sse2',\ |
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| 59 | ff_unpack_2ch_float_to_int32_u_sse2,'ff_unpack_2ch_float_to_int32_u_sse2',\,'ff_unpack_2ch_float_to_int32_u_sse2',\ |
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| 60 | ff_unpack_2ch_int16_to_float_a_sse2,'ff_unpack_2ch_int16_to_float_a_sse2',\,'ff_unpack_2ch_int16_to_float_a_sse2',\ |
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| 61 | ff_unpack_2ch_int16_to_float_a_ssse3,'ff_unpack_2ch_int16_to_float_a_ssse3',\,'ff_unpack_2ch_int16_to_float_a_ssse3',\ |
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| 62 | ff_unpack_2ch_int16_to_float_u_sse2,'ff_unpack_2ch_int16_to_float_u_sse2',\,'ff_unpack_2ch_int16_to_float_u_sse2',\ |
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| 63 | ff_unpack_2ch_int16_to_float_u_ssse3,'ff_unpack_2ch_int16_to_float_u_ssse3',\,'ff_unpack_2ch_int16_to_float_u_ssse3',\ |
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| 64 | ff_unpack_2ch_int16_to_int16_a_sse2,'ff_unpack_2ch_int16_to_int16_a_sse2',\,'ff_unpack_2ch_int16_to_int16_a_sse2',\ |
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| 65 | ff_unpack_2ch_int16_to_int16_a_ssse3,'ff_unpack_2ch_int16_to_int16_a_ssse3',\,'ff_unpack_2ch_int16_to_int16_a_ssse3',\ |
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| 66 | ff_unpack_2ch_int16_to_int16_u_sse2,'ff_unpack_2ch_int16_to_int16_u_sse2',\,'ff_unpack_2ch_int16_to_int16_u_sse2',\ |
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| 67 | ff_unpack_2ch_int16_to_int16_u_ssse3,'ff_unpack_2ch_int16_to_int16_u_ssse3',\,'ff_unpack_2ch_int16_to_int16_u_ssse3',\ |
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| 68 | ff_unpack_2ch_int16_to_int32_a_sse2,'ff_unpack_2ch_int16_to_int32_a_sse2',\,'ff_unpack_2ch_int16_to_int32_a_sse2',\ |
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| 69 | ff_unpack_2ch_int16_to_int32_a_ssse3,'ff_unpack_2ch_int16_to_int32_a_ssse3',\,'ff_unpack_2ch_int16_to_int32_a_ssse3',\ |
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| 70 | ff_unpack_2ch_int16_to_int32_u_sse2,'ff_unpack_2ch_int16_to_int32_u_sse2',\,'ff_unpack_2ch_int16_to_int32_u_sse2',\ |
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| 71 | ff_unpack_2ch_int16_to_int32_u_ssse3,'ff_unpack_2ch_int16_to_int32_u_ssse3',\,'ff_unpack_2ch_int16_to_int32_u_ssse3',\ |
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| 72 | ff_unpack_2ch_int32_to_float_a_sse2,'ff_unpack_2ch_int32_to_float_a_sse2',\,'ff_unpack_2ch_int32_to_float_a_sse2',\ |
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| 73 | ff_unpack_2ch_int32_to_float_u_sse2,'ff_unpack_2ch_int32_to_float_u_sse2',\,'ff_unpack_2ch_int32_to_float_u_sse2',\ |
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| 74 | ff_unpack_2ch_int32_to_int16_a_sse2,'ff_unpack_2ch_int32_to_int16_a_sse2',\,'ff_unpack_2ch_int32_to_int16_a_sse2',\ |
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| 75 | ff_unpack_2ch_int32_to_int16_u_sse2,'ff_unpack_2ch_int32_to_int16_u_sse2',\,'ff_unpack_2ch_int32_to_int16_u_sse2',\ |
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| 76 | ff_unpack_2ch_int32_to_int32_a_sse2,'ff_unpack_2ch_int32_to_int32_a_sse2',\,'ff_unpack_2ch_int32_to_int32_a_sse2',\ |
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| 77 | ff_unpack_2ch_int32_to_int32_u_sse2,'ff_unpack_2ch_int32_to_int32_u_sse2',\,'ff_unpack_2ch_int32_to_int32_u_sse2',\ |
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| 78 | swr_alloc,'swr_alloc',\,'swr_alloc',\ |
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| 79 | swr_alloc_set_opts,'swr_alloc_set_opts',\,'swr_alloc_set_opts',\ |
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| 80 | swr_convert,'swr_convert',\,'swr_convert',\ |
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| 81 | swr_drop_output,'swr_drop_output',\,'swr_drop_output',\ |
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| 82 | swr_free,'swr_free',\,'swr_free',\ |
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| 83 | swr_get_class,'swr_get_class',\,'swr_get_class',\ |
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| 84 | swr_get_delay,'swr_get_delay',\,'swr_get_delay',\ |
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| 85 | swr_init,'swr_init',\,'swr_init',\ |
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| 86 | swr_inject_silence,'swr_inject_silence',\,'swr_inject_silence',\ |
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| 87 | swr_next_pts,'swr_next_pts',\,'swr_next_pts',\ |
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| 88 | swr_set_channel_mapping,'swr_set_channel_mapping',\,'swr_set_channel_mapping',\ |
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| 89 | swr_set_compensation,'swr_set_compensation',\,'swr_set_compensation',\ |
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| 90 | swr_set_matrix,'swr_set_matrix',\,'swr_set_matrix',\ |
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| 91 | swresample_configuration,'swresample_configuration',\,'swresample_configuration',\ |
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| 92 | swresample_license,'swresample_license',\,'swresample_license',\ |
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| 93 | swresample_version,'swresample_version',\,'swresample_version' |