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4363 Serge 1
/*
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 * Copyright © 2008 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Eric Anholt 
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 *
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 */
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28
/**
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 * @file intel_bufmgr_priv.h
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 *
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 * Private definitions of Intel-specific bufmgr functions and structures.
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 */
33
 
34
#ifndef INTEL_BUFMGR_PRIV_H
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#define INTEL_BUFMGR_PRIV_H
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37
/**
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 * Context for a buffer manager instance.
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 *
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 * Contains public methods followed by private storage for the buffer manager.
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 */
42
struct _drm_intel_bufmgr {
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	/**
44
	 * Allocate a buffer object.
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	 *
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	 * Buffer objects are not necessarily initially mapped into CPU virtual
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	 * address space or graphics device aperture.  They must be mapped
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	 * using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU.
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	 */
50
	drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name,
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				   unsigned long size, unsigned int alignment);
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53
	/**
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	 * Allocate a buffer object, hinting that it will be used as a
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	 * render target.
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	 *
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	 * This is otherwise the same as bo_alloc.
58
	 */
5068 serge 59
	drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr,
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					      const char *name,
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					      unsigned long size,
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					      unsigned int alignment);
4363 Serge 63
 
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	/**
6110 serge 65
	 * Allocate a buffer object from an existing user accessible
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	 * address malloc'd with the provided size.
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	 * Alignment is used when mapping to the gtt.
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	 * Flags may be I915_VMAP_READ_ONLY or I915_USERPTR_UNSYNCHRONIZED
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	 */
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	drm_intel_bo *(*bo_alloc_userptr)(drm_intel_bufmgr *bufmgr,
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					  const char *name, void *addr,
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					  uint32_t tiling_mode, uint32_t stride,
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					  unsigned long size,
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					  unsigned long flags);
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76
	/**
4363 Serge 77
	 * Allocate a tiled buffer object.
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	 *
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	 * Alignment for tiled objects is set automatically; the 'flags'
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	 * argument provides a hint about how the object will be used initially.
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	 *
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	 * Valid tiling formats are:
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	 *  I915_TILING_NONE
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	 *  I915_TILING_X
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	 *  I915_TILING_Y
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	 *
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	 * Note the tiling format may be rejected; callers should check the
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	 * 'tiling_mode' field on return, as well as the pitch value, which
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	 * may have been rounded up to accommodate for tiling restrictions.
90
	 */
91
	drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr,
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					 const char *name,
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					 int x, int y, int cpp,
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					 uint32_t *tiling_mode,
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					 unsigned long *pitch,
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					 unsigned long flags);
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98
	/** Takes a reference on a buffer object */
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	void (*bo_reference) (drm_intel_bo *bo);
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	/**
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	 * Releases a reference on a buffer object, freeing the data if
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	 * no references remain.
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	 */
105
	void (*bo_unreference) (drm_intel_bo *bo);
106
 
107
	/**
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	 * Maps the buffer into userspace.
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	 *
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	 * This function will block waiting for any existing execution on the
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	 * buffer to complete, first.  The resulting mapping is available at
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	 * buf->virtual.
113
	 */
114
	int (*bo_map) (drm_intel_bo *bo, int write_enable);
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116
	/**
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	 * Reduces the refcount on the userspace mapping of the buffer
118
	 * object.
119
	 */
120
	int (*bo_unmap) (drm_intel_bo *bo);
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122
	/**
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	 * Write data into an object.
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	 *
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	 * This is an optional function, if missing,
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	 * drm_intel_bo will map/memcpy/unmap.
127
	 */
128
	int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset,
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			   unsigned long size, const void *data);
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131
	/**
132
	 * Read data from an object
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	 *
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	 * This is an optional function, if missing,
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	 * drm_intel_bo will map/memcpy/unmap.
136
	 */
6110 serge 137
	int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset,
138
			       unsigned long size, void *data);
4363 Serge 139
 
140
	/**
141
	 * Waits for rendering to an object by the GPU to have completed.
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	 *
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	 * This is not required for any access to the BO by bo_map,
144
	 * bo_subdata, etc.  It is merely a way for the driver to implement
145
	 * glFinish.
146
	 */
147
	void (*bo_wait_rendering) (drm_intel_bo *bo);
148
 
149
	/**
150
	 * Tears down the buffer manager instance.
151
	 */
152
	void (*destroy) (drm_intel_bufmgr *bufmgr);
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154
	/**
6110 serge 155
	 * Indicate if the buffer can be placed anywhere in the full ppgtt
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	 * address range (2^48).
157
	 *
158
	 * Any resource used with flat/heapless (0x00000000-0xfffff000)
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	 * General State Heap (GSH) or Intructions State Heap (ISH) must
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	 * be in a 32-bit range. 48-bit range will only be used when explicitly
161
	 * requested.
162
	 *
163
	 * \param bo Buffer to set the use_48b_address_range flag.
164
	 * \param enable The flag value.
165
	 */
166
	void (*bo_use_48b_address_range) (drm_intel_bo *bo, uint32_t enable);
167
 
168
	/**
4363 Serge 169
	 * Add relocation entry in reloc_buf, which will be updated with the
170
	 * target buffer's real offset on on command submission.
171
	 *
172
	 * Relocations remain in place for the lifetime of the buffer object.
173
	 *
174
	 * \param bo Buffer to write the relocation into.
175
	 * \param offset Byte offset within reloc_bo of the pointer to
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	 *			target_bo.
177
	 * \param target_bo Buffer whose offset should be written into the
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	 *                  relocation entry.
179
	 * \param target_offset Constant value to be added to target_bo's
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	 *			offset in relocation entry.
181
	 * \param read_domains GEM read domains which the buffer will be
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	 *			read into by the command that this relocation
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	 *			is part of.
184
	 * \param write_domains GEM read domains which the buffer will be
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	 *			dirtied in by the command that this
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	 *			relocation is part of.
187
	 */
188
	int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset,
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			      drm_intel_bo *target_bo, uint32_t target_offset,
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			      uint32_t read_domains, uint32_t write_domain);
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	int (*bo_emit_reloc_fence)(drm_intel_bo *bo, uint32_t offset,
192
				   drm_intel_bo *target_bo,
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				   uint32_t target_offset,
194
				   uint32_t read_domains,
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				   uint32_t write_domain);
196
 
197
	/** Executes the command buffer pointed to by bo. */
198
	int (*bo_exec) (drm_intel_bo *bo, int used,
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			drm_clip_rect_t *cliprects, int num_cliprects,
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			int DR4);
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202
	/** Executes the command buffer pointed to by bo on the selected
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	 * ring buffer
204
	 */
205
	int (*bo_mrb_exec) (drm_intel_bo *bo, int used,
206
			    drm_clip_rect_t *cliprects, int num_cliprects,
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			    int DR4, unsigned flags);
208
 
209
	/**
210
	 * Pin a buffer to the aperture and fix the offset until unpinned
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	 *
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	 * \param buf Buffer to pin
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	 * \param alignment Required alignment for aperture, in bytes
214
	 */
215
	int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment);
216
 
217
	/**
218
	 * Unpin a buffer from the aperture, allowing it to be removed
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	 *
220
	 * \param buf Buffer to unpin
221
	 */
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	int (*bo_unpin) (drm_intel_bo *bo);
223
 
224
	/**
225
	 * Ask that the buffer be placed in tiling mode
226
	 *
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	 * \param buf Buffer to set tiling mode for
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	 * \param tiling_mode desired, and returned tiling mode
229
	 */
230
	int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
231
			      uint32_t stride);
232
 
233
	/**
234
	 * Get the current tiling (and resulting swizzling) mode for the bo.
235
	 *
236
	 * \param buf Buffer to get tiling mode for
237
	 * \param tiling_mode returned tiling mode
238
	 * \param swizzle_mode returned swizzling mode
239
	 */
240
	int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode,
241
			      uint32_t * swizzle_mode);
242
 
243
	/**
6110 serge 244
	 * Set the offset at which this buffer will be softpinned
245
	 * \param bo Buffer to set the softpin offset for
246
	 * \param offset Softpin offset
247
	 */
248
	int (*bo_set_softpin_offset) (drm_intel_bo *bo, uint64_t offset);
249
 
250
	/**
4363 Serge 251
	 * Create a visible name for a buffer which can be used by other apps
252
	 *
253
	 * \param buf Buffer to create a name for
254
	 * \param name Returned name
255
	 */
256
	int (*bo_flink) (drm_intel_bo *bo, uint32_t * name);
257
 
258
	/**
259
	 * Returns 1 if mapping the buffer for write could cause the process
260
	 * to block, due to the object being active in the GPU.
261
	 */
262
	int (*bo_busy) (drm_intel_bo *bo);
263
 
264
	/**
265
	 * Specify the volatility of the buffer.
266
	 * \param bo Buffer to create a name for
267
	 * \param madv The purgeable status
268
	 *
269
	 * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be
270
	 * reclaimed under memory pressure. If you subsequently require the buffer,
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	 * then you must pass I915_MADV_WILLNEED to mark the buffer as required.
272
	 *
273
	 * Returns 1 if the buffer was retained, or 0 if it was discarded whilst
274
	 * marked as I915_MADV_DONTNEED.
275
	 */
276
	int (*bo_madvise) (drm_intel_bo *bo, int madv);
277
 
278
	int (*check_aperture_space) (drm_intel_bo ** bo_array, int count);
279
 
280
	/**
281
	 * Disable buffer reuse for buffers which will be shared in some way,
282
	 * as with scanout buffers. When the buffer reference count goes to
283
	 * zero, it will be freed and not placed in the reuse list.
284
	 *
285
	 * \param bo Buffer to disable reuse for
286
	 */
287
	int (*bo_disable_reuse) (drm_intel_bo *bo);
288
 
289
	/**
290
	 * Query whether a buffer is reusable.
291
	 *
292
	 * \param bo Buffer to query
293
	 */
294
	int (*bo_is_reusable) (drm_intel_bo *bo);
295
 
296
	/**
297
	 *
298
	 * Return the pipe associated with a crtc_id so that vblank
299
	 * synchronization can use the correct data in the request.
300
	 * This is only supported for KMS and gem at this point, when
301
	 * unsupported, this function returns -1 and leaves the decision
302
	 * of what to do in that case to the caller
303
	 *
304
	 * \param bufmgr the associated buffer manager
305
	 * \param crtc_id the crtc identifier
306
	 */
307
//	int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id);
308
 
309
	/** Returns true if target_bo is in the relocation tree rooted at bo. */
310
	int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo);
311
 
312
	/**< Enables verbose debugging printouts */
313
	int debug;
314
};
315
 
316
struct _drm_intel_context {
317
	unsigned int ctx_id;
318
	struct _drm_intel_bufmgr *bufmgr;
319
};
320
 
321
#define ALIGN(value, alignment)	((value + alignment - 1) & ~(alignment - 1))
322
#define ROUND_UP_TO(x, y)	(((x) + (y) - 1) / (y) * (y))
323
#define ROUND_UP_TO_MB(x)	ROUND_UP_TO((x), 1024*1024)
324
 
325
#endif /* INTEL_BUFMGR_PRIV_H */