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4363 | Serge | 1 | /* |
2 | * Copyright © 2008 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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21 | * IN THE SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Eric Anholt |
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25 | * |
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26 | */ |
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27 | |||
28 | /** |
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29 | * @file intel_bufmgr_priv.h |
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30 | * |
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31 | * Private definitions of Intel-specific bufmgr functions and structures. |
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32 | */ |
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33 | |||
34 | #ifndef INTEL_BUFMGR_PRIV_H |
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35 | #define INTEL_BUFMGR_PRIV_H |
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36 | |||
37 | /** |
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38 | * Context for a buffer manager instance. |
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39 | * |
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40 | * Contains public methods followed by private storage for the buffer manager. |
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41 | */ |
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42 | struct _drm_intel_bufmgr { |
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43 | /** |
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44 | * Allocate a buffer object. |
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45 | * |
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46 | * Buffer objects are not necessarily initially mapped into CPU virtual |
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47 | * address space or graphics device aperture. They must be mapped |
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48 | * using bo_map() or drm_intel_gem_bo_map_gtt() to be used by the CPU. |
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49 | */ |
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50 | drm_intel_bo *(*bo_alloc) (drm_intel_bufmgr *bufmgr, const char *name, |
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51 | unsigned long size, unsigned int alignment); |
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52 | |||
53 | /** |
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54 | * Allocate a buffer object, hinting that it will be used as a |
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55 | * render target. |
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56 | * |
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57 | * This is otherwise the same as bo_alloc. |
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58 | */ |
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5068 | serge | 59 | drm_intel_bo *(*bo_alloc_for_render) (drm_intel_bufmgr *bufmgr, |
60 | const char *name, |
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61 | unsigned long size, |
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62 | unsigned int alignment); |
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4363 | Serge | 63 | |
64 | /** |
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6110 | serge | 65 | * Allocate a buffer object from an existing user accessible |
66 | * address malloc'd with the provided size. |
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67 | * Alignment is used when mapping to the gtt. |
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68 | * Flags may be I915_VMAP_READ_ONLY or I915_USERPTR_UNSYNCHRONIZED |
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69 | */ |
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70 | drm_intel_bo *(*bo_alloc_userptr)(drm_intel_bufmgr *bufmgr, |
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71 | const char *name, void *addr, |
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72 | uint32_t tiling_mode, uint32_t stride, |
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73 | unsigned long size, |
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74 | unsigned long flags); |
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75 | |||
76 | /** |
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4363 | Serge | 77 | * Allocate a tiled buffer object. |
78 | * |
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79 | * Alignment for tiled objects is set automatically; the 'flags' |
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80 | * argument provides a hint about how the object will be used initially. |
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81 | * |
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82 | * Valid tiling formats are: |
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83 | * I915_TILING_NONE |
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84 | * I915_TILING_X |
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85 | * I915_TILING_Y |
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86 | * |
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87 | * Note the tiling format may be rejected; callers should check the |
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88 | * 'tiling_mode' field on return, as well as the pitch value, which |
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89 | * may have been rounded up to accommodate for tiling restrictions. |
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90 | */ |
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91 | drm_intel_bo *(*bo_alloc_tiled) (drm_intel_bufmgr *bufmgr, |
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92 | const char *name, |
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93 | int x, int y, int cpp, |
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94 | uint32_t *tiling_mode, |
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95 | unsigned long *pitch, |
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96 | unsigned long flags); |
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97 | |||
98 | /** Takes a reference on a buffer object */ |
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99 | void (*bo_reference) (drm_intel_bo *bo); |
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100 | |||
101 | /** |
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102 | * Releases a reference on a buffer object, freeing the data if |
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103 | * no references remain. |
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104 | */ |
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105 | void (*bo_unreference) (drm_intel_bo *bo); |
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106 | |||
107 | /** |
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108 | * Maps the buffer into userspace. |
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109 | * |
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110 | * This function will block waiting for any existing execution on the |
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111 | * buffer to complete, first. The resulting mapping is available at |
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112 | * buf->virtual. |
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113 | */ |
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114 | int (*bo_map) (drm_intel_bo *bo, int write_enable); |
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115 | |||
116 | /** |
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117 | * Reduces the refcount on the userspace mapping of the buffer |
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118 | * object. |
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119 | */ |
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120 | int (*bo_unmap) (drm_intel_bo *bo); |
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121 | |||
122 | /** |
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123 | * Write data into an object. |
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124 | * |
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125 | * This is an optional function, if missing, |
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126 | * drm_intel_bo will map/memcpy/unmap. |
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127 | */ |
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128 | int (*bo_subdata) (drm_intel_bo *bo, unsigned long offset, |
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129 | unsigned long size, const void *data); |
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130 | |||
131 | /** |
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132 | * Read data from an object |
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133 | * |
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134 | * This is an optional function, if missing, |
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135 | * drm_intel_bo will map/memcpy/unmap. |
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136 | */ |
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6110 | serge | 137 | int (*bo_get_subdata) (drm_intel_bo *bo, unsigned long offset, |
138 | unsigned long size, void *data); |
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4363 | Serge | 139 | |
140 | /** |
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141 | * Waits for rendering to an object by the GPU to have completed. |
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142 | * |
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143 | * This is not required for any access to the BO by bo_map, |
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144 | * bo_subdata, etc. It is merely a way for the driver to implement |
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145 | * glFinish. |
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146 | */ |
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147 | void (*bo_wait_rendering) (drm_intel_bo *bo); |
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148 | |||
149 | /** |
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150 | * Tears down the buffer manager instance. |
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151 | */ |
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152 | void (*destroy) (drm_intel_bufmgr *bufmgr); |
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153 | |||
154 | /** |
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6110 | serge | 155 | * Indicate if the buffer can be placed anywhere in the full ppgtt |
156 | * address range (2^48). |
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157 | * |
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158 | * Any resource used with flat/heapless (0x00000000-0xfffff000) |
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159 | * General State Heap (GSH) or Intructions State Heap (ISH) must |
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160 | * be in a 32-bit range. 48-bit range will only be used when explicitly |
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161 | * requested. |
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162 | * |
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163 | * \param bo Buffer to set the use_48b_address_range flag. |
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164 | * \param enable The flag value. |
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165 | */ |
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166 | void (*bo_use_48b_address_range) (drm_intel_bo *bo, uint32_t enable); |
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167 | |||
168 | /** |
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4363 | Serge | 169 | * Add relocation entry in reloc_buf, which will be updated with the |
170 | * target buffer's real offset on on command submission. |
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171 | * |
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172 | * Relocations remain in place for the lifetime of the buffer object. |
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173 | * |
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174 | * \param bo Buffer to write the relocation into. |
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175 | * \param offset Byte offset within reloc_bo of the pointer to |
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176 | * target_bo. |
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177 | * \param target_bo Buffer whose offset should be written into the |
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178 | * relocation entry. |
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179 | * \param target_offset Constant value to be added to target_bo's |
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180 | * offset in relocation entry. |
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181 | * \param read_domains GEM read domains which the buffer will be |
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182 | * read into by the command that this relocation |
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183 | * is part of. |
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184 | * \param write_domains GEM read domains which the buffer will be |
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185 | * dirtied in by the command that this |
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186 | * relocation is part of. |
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187 | */ |
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188 | int (*bo_emit_reloc) (drm_intel_bo *bo, uint32_t offset, |
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189 | drm_intel_bo *target_bo, uint32_t target_offset, |
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190 | uint32_t read_domains, uint32_t write_domain); |
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191 | int (*bo_emit_reloc_fence)(drm_intel_bo *bo, uint32_t offset, |
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192 | drm_intel_bo *target_bo, |
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193 | uint32_t target_offset, |
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194 | uint32_t read_domains, |
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195 | uint32_t write_domain); |
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196 | |||
197 | /** Executes the command buffer pointed to by bo. */ |
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198 | int (*bo_exec) (drm_intel_bo *bo, int used, |
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199 | drm_clip_rect_t *cliprects, int num_cliprects, |
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200 | int DR4); |
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201 | |||
202 | /** Executes the command buffer pointed to by bo on the selected |
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203 | * ring buffer |
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204 | */ |
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205 | int (*bo_mrb_exec) (drm_intel_bo *bo, int used, |
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206 | drm_clip_rect_t *cliprects, int num_cliprects, |
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207 | int DR4, unsigned flags); |
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208 | |||
209 | /** |
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210 | * Pin a buffer to the aperture and fix the offset until unpinned |
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211 | * |
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212 | * \param buf Buffer to pin |
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213 | * \param alignment Required alignment for aperture, in bytes |
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214 | */ |
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215 | int (*bo_pin) (drm_intel_bo *bo, uint32_t alignment); |
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216 | |||
217 | /** |
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218 | * Unpin a buffer from the aperture, allowing it to be removed |
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219 | * |
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220 | * \param buf Buffer to unpin |
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221 | */ |
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222 | int (*bo_unpin) (drm_intel_bo *bo); |
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223 | |||
224 | /** |
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225 | * Ask that the buffer be placed in tiling mode |
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226 | * |
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227 | * \param buf Buffer to set tiling mode for |
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228 | * \param tiling_mode desired, and returned tiling mode |
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229 | */ |
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230 | int (*bo_set_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode, |
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231 | uint32_t stride); |
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232 | |||
233 | /** |
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234 | * Get the current tiling (and resulting swizzling) mode for the bo. |
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235 | * |
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236 | * \param buf Buffer to get tiling mode for |
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237 | * \param tiling_mode returned tiling mode |
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238 | * \param swizzle_mode returned swizzling mode |
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239 | */ |
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240 | int (*bo_get_tiling) (drm_intel_bo *bo, uint32_t * tiling_mode, |
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241 | uint32_t * swizzle_mode); |
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242 | |||
243 | /** |
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6110 | serge | 244 | * Set the offset at which this buffer will be softpinned |
245 | * \param bo Buffer to set the softpin offset for |
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246 | * \param offset Softpin offset |
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247 | */ |
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248 | int (*bo_set_softpin_offset) (drm_intel_bo *bo, uint64_t offset); |
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249 | |||
250 | /** |
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4363 | Serge | 251 | * Create a visible name for a buffer which can be used by other apps |
252 | * |
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253 | * \param buf Buffer to create a name for |
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254 | * \param name Returned name |
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255 | */ |
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256 | int (*bo_flink) (drm_intel_bo *bo, uint32_t * name); |
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257 | |||
258 | /** |
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259 | * Returns 1 if mapping the buffer for write could cause the process |
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260 | * to block, due to the object being active in the GPU. |
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261 | */ |
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262 | int (*bo_busy) (drm_intel_bo *bo); |
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263 | |||
264 | /** |
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265 | * Specify the volatility of the buffer. |
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266 | * \param bo Buffer to create a name for |
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267 | * \param madv The purgeable status |
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268 | * |
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269 | * Use I915_MADV_DONTNEED to mark the buffer as purgeable, and it will be |
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270 | * reclaimed under memory pressure. If you subsequently require the buffer, |
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271 | * then you must pass I915_MADV_WILLNEED to mark the buffer as required. |
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272 | * |
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273 | * Returns 1 if the buffer was retained, or 0 if it was discarded whilst |
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274 | * marked as I915_MADV_DONTNEED. |
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275 | */ |
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276 | int (*bo_madvise) (drm_intel_bo *bo, int madv); |
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277 | |||
278 | int (*check_aperture_space) (drm_intel_bo ** bo_array, int count); |
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279 | |||
280 | /** |
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281 | * Disable buffer reuse for buffers which will be shared in some way, |
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282 | * as with scanout buffers. When the buffer reference count goes to |
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283 | * zero, it will be freed and not placed in the reuse list. |
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284 | * |
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285 | * \param bo Buffer to disable reuse for |
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286 | */ |
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287 | int (*bo_disable_reuse) (drm_intel_bo *bo); |
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288 | |||
289 | /** |
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290 | * Query whether a buffer is reusable. |
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291 | * |
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292 | * \param bo Buffer to query |
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293 | */ |
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294 | int (*bo_is_reusable) (drm_intel_bo *bo); |
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295 | |||
296 | /** |
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297 | * |
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298 | * Return the pipe associated with a crtc_id so that vblank |
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299 | * synchronization can use the correct data in the request. |
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300 | * This is only supported for KMS and gem at this point, when |
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301 | * unsupported, this function returns -1 and leaves the decision |
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302 | * of what to do in that case to the caller |
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303 | * |
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304 | * \param bufmgr the associated buffer manager |
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305 | * \param crtc_id the crtc identifier |
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306 | */ |
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307 | // int (*get_pipe_from_crtc_id) (drm_intel_bufmgr *bufmgr, int crtc_id); |
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308 | |||
309 | /** Returns true if target_bo is in the relocation tree rooted at bo. */ |
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310 | int (*bo_references) (drm_intel_bo *bo, drm_intel_bo *target_bo); |
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311 | |||
312 | /**< Enables verbose debugging printouts */ |
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313 | int debug; |
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314 | }; |
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315 | |||
316 | struct _drm_intel_context { |
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317 | unsigned int ctx_id; |
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318 | struct _drm_intel_bufmgr *bufmgr; |
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319 | }; |
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320 | |||
321 | #define ALIGN(value, alignment) ((value + alignment - 1) & ~(alignment - 1)) |
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322 | #define ROUND_UP_TO(x, y) (((x) + (y) - 1) / (y) * (y)) |
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323 | #define ROUND_UP_TO_MB(x) ROUND_UP_TO((x), 1024*1024) |
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324 | |||
325 | #endif /* INTEL_BUFMGR_PRIV_H */> |