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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 4349 | Serge | 1 | /* |
| 2 | * Copyright (c) 2009 David Conrad |
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| 3 | * |
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| 4 | * This file is part of FFmpeg. |
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| 5 | * |
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| 6 | * FFmpeg is free software; you can redistribute it and/or |
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| 7 | * modify it under the terms of the GNU Lesser General Public |
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| 8 | * License as published by the Free Software Foundation; either |
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| 9 | * version 2.1 of the License, or (at your option) any later version. |
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| 10 | * |
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| 11 | * FFmpeg is distributed in the hope that it will be useful, |
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| 12 | * but WITHOUT ANY WARRANTY; without even the implied warranty of |
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| 13 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU |
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| 14 | * Lesser General Public License for more details. |
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| 15 | * |
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| 16 | * You should have received a copy of the GNU Lesser General Public |
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| 17 | * License along with FFmpeg; if not, write to the Free Software |
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| 18 | * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA |
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| 19 | */ |
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| 20 | |||
| 21 | #include "libavutil/arm/asm.S" |
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| 22 | |||
| 23 | const vp3_idct_constants, align=4 |
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| 24 | .short 64277, 60547, 54491, 46341, 36410, 25080, 12785 |
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| 25 | endconst |
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| 26 | |||
| 27 | #define xC1S7 d0[0] |
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| 28 | #define xC2S6 d0[1] |
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| 29 | #define xC3S5 d0[2] |
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| 30 | #define xC4S4 d0[3] |
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| 31 | #define xC5S3 d1[0] |
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| 32 | #define xC6S2 d1[1] |
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| 33 | #define xC7S1 d1[2] |
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| 34 | |||
| 35 | .macro vp3_loop_filter |
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| 36 | vsubl.u8 q3, d18, d17 |
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| 37 | vsubl.u8 q2, d16, d19 |
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| 38 | vadd.i16 q1, q3, q3 |
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| 39 | vadd.i16 q2, q2, q3 |
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| 40 | vadd.i16 q0, q1, q2 |
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| 41 | vrshr.s16 q0, q0, #3 |
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| 42 | vmovl.u8 q9, d18 |
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| 43 | vdup.u16 q15, r2 |
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| 44 | |||
| 45 | vabs.s16 q1, q0 |
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| 46 | vshr.s16 q0, q0, #15 |
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| 47 | vqsub.u16 q2, q15, q1 |
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| 48 | vqsub.u16 q3, q2, q1 |
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| 49 | vsub.i16 q1, q2, q3 |
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| 50 | veor q1, q1, q0 |
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| 51 | vsub.i16 q0, q1, q0 |
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| 52 | |||
| 53 | vaddw.u8 q2, q0, d17 |
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| 54 | vsub.i16 q3, q9, q0 |
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| 55 | vqmovun.s16 d0, q2 |
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| 56 | vqmovun.s16 d1, q3 |
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| 57 | .endm |
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| 58 | |||
| 59 | function ff_vp3_v_loop_filter_neon, export=1 |
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| 60 | sub ip, r0, r1 |
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| 61 | sub r0, r0, r1, lsl #1 |
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| 62 | vld1.64 {d16}, [r0,:64], r1 |
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| 63 | vld1.64 {d17}, [r0,:64], r1 |
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| 64 | vld1.64 {d18}, [r0,:64], r1 |
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| 65 | vld1.64 {d19}, [r0,:64], r1 |
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| 66 | ldrb r2, [r2, #129*4] |
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| 67 | |||
| 68 | vp3_loop_filter |
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| 69 | |||
| 70 | vst1.64 {d0}, [ip,:64], r1 |
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| 71 | vst1.64 {d1}, [ip,:64], r1 |
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| 72 | bx lr |
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| 73 | endfunc |
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| 74 | |||
| 75 | function ff_vp3_h_loop_filter_neon, export=1 |
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| 76 | sub ip, r0, #1 |
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| 77 | sub r0, r0, #2 |
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| 78 | vld1.32 {d16[]}, [r0], r1 |
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| 79 | vld1.32 {d17[]}, [r0], r1 |
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| 80 | vld1.32 {d18[]}, [r0], r1 |
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| 81 | vld1.32 {d19[]}, [r0], r1 |
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| 82 | vld1.32 {d16[1]}, [r0], r1 |
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| 83 | vld1.32 {d17[1]}, [r0], r1 |
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| 84 | vld1.32 {d18[1]}, [r0], r1 |
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| 85 | vld1.32 {d19[1]}, [r0], r1 |
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| 86 | ldrb r2, [r2, #129*4] |
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| 87 | |||
| 88 | vtrn.8 d16, d17 |
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| 89 | vtrn.8 d18, d19 |
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| 90 | vtrn.16 d16, d18 |
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| 91 | vtrn.16 d17, d19 |
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| 92 | |||
| 93 | vp3_loop_filter |
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| 94 | |||
| 95 | vtrn.8 d0, d1 |
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| 96 | |||
| 97 | vst1.16 {d0[0]}, [ip], r1 |
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| 98 | vst1.16 {d1[0]}, [ip], r1 |
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| 99 | vst1.16 {d0[1]}, [ip], r1 |
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| 100 | vst1.16 {d1[1]}, [ip], r1 |
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| 101 | vst1.16 {d0[2]}, [ip], r1 |
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| 102 | vst1.16 {d1[2]}, [ip], r1 |
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| 103 | vst1.16 {d0[3]}, [ip], r1 |
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| 104 | vst1.16 {d1[3]}, [ip], r1 |
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| 105 | bx lr |
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| 106 | endfunc |
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| 107 | |||
| 108 | |||
| 109 | function vp3_idct_start_neon |
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| 110 | vpush {d8-d15} |
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| 111 | vmov.i16 q4, #0 |
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| 112 | vmov.i16 q5, #0 |
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| 113 | movrel r3, vp3_idct_constants |
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| 114 | vld1.64 {d0-d1}, [r3,:128] |
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| 115 | vld1.64 {d16-d19}, [r2,:128] |
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| 116 | vst1.64 {q4-q5}, [r2,:128]! |
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| 117 | vld1.64 {d20-d23}, [r2,:128] |
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| 118 | vst1.64 {q4-q5}, [r2,:128]! |
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| 119 | vld1.64 {d24-d27}, [r2,:128] |
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| 120 | vst1.64 {q4-q5}, [r2,:128]! |
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| 121 | vadd.s16 q1, q8, q12 |
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| 122 | vsub.s16 q8, q8, q12 |
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| 123 | vld1.64 {d28-d31}, [r2,:128] |
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| 124 | vst1.64 {q4-q5}, [r2,:128]! |
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| 125 | |||
| 126 | vp3_idct_core_neon: |
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| 127 | vmull.s16 q2, d18, xC1S7 // (ip[1] * C1) << 16 |
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| 128 | vmull.s16 q3, d19, xC1S7 |
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| 129 | vmull.s16 q4, d2, xC4S4 // ((ip[0] + ip[4]) * C4) << 16 |
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| 130 | vmull.s16 q5, d3, xC4S4 |
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| 131 | vmull.s16 q6, d16, xC4S4 // ((ip[0] - ip[4]) * C4) << 16 |
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| 132 | vmull.s16 q7, d17, xC4S4 |
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| 133 | vshrn.s32 d4, q2, #16 |
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| 134 | vshrn.s32 d5, q3, #16 |
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| 135 | vshrn.s32 d6, q4, #16 |
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| 136 | vshrn.s32 d7, q5, #16 |
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| 137 | vshrn.s32 d8, q6, #16 |
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| 138 | vshrn.s32 d9, q7, #16 |
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| 139 | vadd.s16 q12, q1, q3 // E = (ip[0] + ip[4]) * C4 |
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| 140 | vadd.s16 q8, q8, q4 // F = (ip[0] - ip[4]) * C4 |
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| 141 | vadd.s16 q1, q2, q9 // ip[1] * C1 |
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| 142 | |||
| 143 | vmull.s16 q2, d30, xC1S7 // (ip[7] * C1) << 16 |
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| 144 | vmull.s16 q3, d31, xC1S7 |
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| 145 | vmull.s16 q4, d30, xC7S1 // (ip[7] * C7) << 16 |
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| 146 | vmull.s16 q5, d31, xC7S1 |
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| 147 | vmull.s16 q6, d18, xC7S1 // (ip[1] * C7) << 16 |
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| 148 | vmull.s16 q7, d19, xC7S1 |
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| 149 | vshrn.s32 d4, q2, #16 |
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| 150 | vshrn.s32 d5, q3, #16 |
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| 151 | vshrn.s32 d6, q4, #16 // ip[7] * C7 |
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| 152 | vshrn.s32 d7, q5, #16 |
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| 153 | vshrn.s32 d8, q6, #16 // ip[1] * C7 |
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| 154 | vshrn.s32 d9, q7, #16 |
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| 155 | vadd.s16 q2, q2, q15 // ip[7] * C1 |
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| 156 | vadd.s16 q9, q1, q3 // A = ip[1] * C1 + ip[7] * C7 |
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| 157 | vsub.s16 q15, q4, q2 // B = ip[1] * C7 - ip[7] * C1 |
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| 158 | |||
| 159 | vmull.s16 q2, d22, xC5S3 // (ip[3] * C5) << 16 |
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| 160 | vmull.s16 q3, d23, xC5S3 |
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| 161 | vmull.s16 q4, d22, xC3S5 // (ip[3] * C3) << 16 |
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| 162 | vmull.s16 q5, d23, xC3S5 |
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| 163 | vmull.s16 q6, d26, xC5S3 // (ip[5] * C5) << 16 |
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| 164 | vmull.s16 q7, d27, xC5S3 |
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| 165 | vshrn.s32 d4, q2, #16 |
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| 166 | vshrn.s32 d5, q3, #16 |
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| 167 | vshrn.s32 d6, q4, #16 |
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| 168 | vshrn.s32 d7, q5, #16 |
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| 169 | vshrn.s32 d8, q6, #16 |
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| 170 | vshrn.s32 d9, q7, #16 |
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| 171 | vadd.s16 q3, q3, q11 // ip[3] * C3 |
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| 172 | vadd.s16 q4, q4, q13 // ip[5] * C5 |
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| 173 | vadd.s16 q1, q2, q11 // ip[3] * C5 |
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| 174 | vadd.s16 q11, q3, q4 // C = ip[3] * C3 + ip[5] * C5 |
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| 175 | |||
| 176 | vmull.s16 q2, d26, xC3S5 // (ip[5] * C3) << 16 |
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| 177 | vmull.s16 q3, d27, xC3S5 |
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| 178 | vmull.s16 q4, d20, xC2S6 // (ip[2] * C2) << 16 |
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| 179 | vmull.s16 q5, d21, xC2S6 |
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| 180 | vmull.s16 q6, d28, xC6S2 // (ip[6] * C6) << 16 |
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| 181 | vmull.s16 q7, d29, xC6S2 |
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| 182 | vshrn.s32 d4, q2, #16 |
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| 183 | vshrn.s32 d5, q3, #16 |
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| 184 | vshrn.s32 d6, q4, #16 |
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| 185 | vshrn.s32 d7, q5, #16 |
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| 186 | vshrn.s32 d8, q6, #16 // ip[6] * C6 |
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| 187 | vshrn.s32 d9, q7, #16 |
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| 188 | vadd.s16 q2, q2, q13 // ip[5] * C3 |
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| 189 | vadd.s16 q3, q3, q10 // ip[2] * C2 |
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| 190 | vsub.s16 q13, q2, q1 // D = ip[5] * C3 - ip[3] * C5 |
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| 191 | vsub.s16 q1, q9, q11 // (A - C) |
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| 192 | vadd.s16 q11, q9, q11 // Cd = A + C |
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| 193 | vsub.s16 q9, q15, q13 // (B - D) |
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| 194 | vadd.s16 q13, q15, q13 // Dd = B + D |
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| 195 | vadd.s16 q15, q3, q4 // G = ip[2] * C2 + ip[6] * C6 |
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| 196 | |||
| 197 | vmull.s16 q2, d2, xC4S4 // ((A - C) * C4) << 16 |
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| 198 | vmull.s16 q3, d3, xC4S4 |
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| 199 | vmull.s16 q4, d28, xC2S6 // (ip[6] * C2) << 16 |
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| 200 | vmull.s16 q5, d29, xC2S6 |
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| 201 | vmull.s16 q6, d20, xC6S2 // (ip[2] * C6) << 16 |
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| 202 | vmull.s16 q7, d21, xC6S2 |
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| 203 | vshrn.s32 d4, q2, #16 |
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| 204 | vshrn.s32 d5, q3, #16 |
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| 205 | vshrn.s32 d6, q4, #16 |
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| 206 | vshrn.s32 d7, q5, #16 |
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| 207 | vshrn.s32 d8, q6, #16 // ip[2] * C6 |
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| 208 | vmull.s16 q5, d18, xC4S4 // ((B - D) * C4) << 16 |
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| 209 | vmull.s16 q6, d19, xC4S4 |
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| 210 | vshrn.s32 d9, q7, #16 |
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| 211 | vadd.s16 q3, q3, q14 // ip[6] * C2 |
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| 212 | vadd.s16 q10, q1, q2 // Ad = (A - C) * C4 |
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| 213 | vsub.s16 q14, q4, q3 // H = ip[2] * C6 - ip[6] * C2 |
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| 214 | bx lr |
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| 215 | endfunc |
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| 216 | |||
| 217 | .macro VP3_IDCT_END type |
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| 218 | function vp3_idct_end_\type\()_neon |
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| 219 | .ifc \type, col |
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| 220 | vdup.16 q0, r3 |
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| 221 | vadd.s16 q12, q12, q0 |
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| 222 | vadd.s16 q8, q8, q0 |
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| 223 | .endif |
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| 224 | |||
| 225 | vshrn.s32 d2, q5, #16 |
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| 226 | vshrn.s32 d3, q6, #16 |
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| 227 | vadd.s16 q2, q12, q15 // Gd = E + G |
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| 228 | vadd.s16 q9, q1, q9 // (B - D) * C4 |
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| 229 | vsub.s16 q12, q12, q15 // Ed = E - G |
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| 230 | vsub.s16 q3, q8, q10 // Fd = F - Ad |
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| 231 | vadd.s16 q10, q8, q10 // Add = F + Ad |
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| 232 | vadd.s16 q4, q9, q14 // Hd = Bd + H |
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| 233 | vsub.s16 q14, q9, q14 // Bdd = Bd - H |
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| 234 | vadd.s16 q8, q2, q11 // [0] = Gd + Cd |
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| 235 | vsub.s16 q15, q2, q11 // [7] = Gd - Cd |
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| 236 | vadd.s16 q9, q10, q4 // [1] = Add + Hd |
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| 237 | vsub.s16 q10, q10, q4 // [2] = Add - Hd |
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| 238 | vadd.s16 q11, q12, q13 // [3] = Ed + Dd |
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| 239 | vsub.s16 q12, q12, q13 // [4] = Ed - Dd |
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| 240 | .ifc \type, row |
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| 241 | vtrn.16 q8, q9 |
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| 242 | .endif |
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| 243 | vadd.s16 q13, q3, q14 // [5] = Fd + Bdd |
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| 244 | vsub.s16 q14, q3, q14 // [6] = Fd - Bdd |
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| 245 | |||
| 246 | .ifc \type, row |
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| 247 | // 8x8 transpose |
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| 248 | vtrn.16 q10, q11 |
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| 249 | vtrn.16 q12, q13 |
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| 250 | vtrn.16 q14, q15 |
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| 251 | vtrn.32 q8, q10 |
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| 252 | vtrn.32 q9, q11 |
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| 253 | vtrn.32 q12, q14 |
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| 254 | vtrn.32 q13, q15 |
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| 255 | vswp d17, d24 |
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| 256 | vswp d19, d26 |
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| 257 | vadd.s16 q1, q8, q12 |
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| 258 | vswp d21, d28 |
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| 259 | vsub.s16 q8, q8, q12 |
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| 260 | vswp d23, d30 |
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| 261 | .endif |
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| 262 | bx lr |
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| 263 | endfunc |
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| 264 | .endm |
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| 265 | |||
| 266 | VP3_IDCT_END row |
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| 267 | VP3_IDCT_END col |
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| 268 | |||
| 269 | function ff_vp3_idct_put_neon, export=1 |
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| 270 | mov ip, lr |
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| 271 | bl vp3_idct_start_neon |
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| 272 | bl vp3_idct_end_row_neon |
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| 273 | mov r3, #8 |
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| 274 | add r3, r3, #2048 // convert signed pixel to unsigned |
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| 275 | bl vp3_idct_core_neon |
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| 276 | bl vp3_idct_end_col_neon |
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| 277 | mov lr, ip |
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| 278 | vpop {d8-d15} |
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| 279 | |||
| 280 | vqshrun.s16 d0, q8, #4 |
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| 281 | vqshrun.s16 d1, q9, #4 |
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| 282 | vqshrun.s16 d2, q10, #4 |
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| 283 | vqshrun.s16 d3, q11, #4 |
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| 284 | vst1.64 {d0}, [r0,:64], r1 |
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| 285 | vqshrun.s16 d4, q12, #4 |
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| 286 | vst1.64 {d1}, [r0,:64], r1 |
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| 287 | vqshrun.s16 d5, q13, #4 |
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| 288 | vst1.64 {d2}, [r0,:64], r1 |
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| 289 | vqshrun.s16 d6, q14, #4 |
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| 290 | vst1.64 {d3}, [r0,:64], r1 |
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| 291 | vqshrun.s16 d7, q15, #4 |
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| 292 | vst1.64 {d4}, [r0,:64], r1 |
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| 293 | vst1.64 {d5}, [r0,:64], r1 |
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| 294 | vst1.64 {d6}, [r0,:64], r1 |
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| 295 | vst1.64 {d7}, [r0,:64], r1 |
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| 296 | bx lr |
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| 297 | endfunc |
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| 298 | |||
| 299 | function ff_vp3_idct_add_neon, export=1 |
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| 300 | mov ip, lr |
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| 301 | bl vp3_idct_start_neon |
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| 302 | bl vp3_idct_end_row_neon |
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| 303 | mov r3, #8 |
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| 304 | bl vp3_idct_core_neon |
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| 305 | bl vp3_idct_end_col_neon |
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| 306 | mov lr, ip |
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| 307 | vpop {d8-d15} |
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| 308 | mov r2, r0 |
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| 309 | |||
| 310 | vld1.64 {d0}, [r0,:64], r1 |
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| 311 | vshr.s16 q8, q8, #4 |
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| 312 | vld1.64 {d1}, [r0,:64], r1 |
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| 313 | vshr.s16 q9, q9, #4 |
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| 314 | vld1.64 {d2}, [r0,:64], r1 |
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| 315 | vaddw.u8 q8, q8, d0 |
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| 316 | vld1.64 {d3}, [r0,:64], r1 |
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| 317 | vaddw.u8 q9, q9, d1 |
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| 318 | vld1.64 {d4}, [r0,:64], r1 |
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| 319 | vshr.s16 q10, q10, #4 |
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| 320 | vld1.64 {d5}, [r0,:64], r1 |
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| 321 | vshr.s16 q11, q11, #4 |
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| 322 | vld1.64 {d6}, [r0,:64], r1 |
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| 323 | vqmovun.s16 d0, q8 |
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| 324 | vld1.64 {d7}, [r0,:64], r1 |
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| 325 | vqmovun.s16 d1, q9 |
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| 326 | vaddw.u8 q10, q10, d2 |
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| 327 | vaddw.u8 q11, q11, d3 |
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| 328 | vshr.s16 q12, q12, #4 |
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| 329 | vshr.s16 q13, q13, #4 |
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| 330 | vqmovun.s16 d2, q10 |
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| 331 | vqmovun.s16 d3, q11 |
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| 332 | vaddw.u8 q12, q12, d4 |
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| 333 | vaddw.u8 q13, q13, d5 |
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| 334 | vshr.s16 q14, q14, #4 |
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| 335 | vshr.s16 q15, q15, #4 |
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| 336 | vst1.64 {d0}, [r2,:64], r1 |
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| 337 | vqmovun.s16 d4, q12 |
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| 338 | vst1.64 {d1}, [r2,:64], r1 |
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| 339 | vqmovun.s16 d5, q13 |
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| 340 | vst1.64 {d2}, [r2,:64], r1 |
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| 341 | vaddw.u8 q14, q14, d6 |
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| 342 | vst1.64 {d3}, [r2,:64], r1 |
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| 343 | vaddw.u8 q15, q15, d7 |
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| 344 | vst1.64 {d4}, [r2,:64], r1 |
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| 345 | vqmovun.s16 d6, q14 |
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| 346 | vst1.64 {d5}, [r2,:64], r1 |
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| 347 | vqmovun.s16 d7, q15 |
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| 348 | vst1.64 {d6}, [r2,:64], r1 |
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| 349 | vst1.64 {d7}, [r2,:64], r1 |
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| 350 | bx lr |
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| 351 | endfunc |
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| 352 | |||
| 353 | function ff_vp3_idct_dc_add_neon, export=1 |
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| 354 | ldrsh r12, [r2] |
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| 355 | mov r3, r0 |
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| 356 | add r12, r12, #15 |
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| 357 | vdup.16 q15, r12 |
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| 358 | mov r12, 0 |
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| 359 | strh r12, [r2] |
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| 360 | vshr.s16 q15, q15, #5 |
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| 361 | |||
| 362 | vld1.8 {d0}, [r0,:64], r1 |
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| 363 | vld1.8 {d1}, [r0,:64], r1 |
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| 364 | vld1.8 {d2}, [r0,:64], r1 |
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| 365 | vaddw.u8 q8, q15, d0 |
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| 366 | vld1.8 {d3}, [r0,:64], r1 |
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| 367 | vaddw.u8 q9, q15, d1 |
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| 368 | vld1.8 {d4}, [r0,:64], r1 |
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| 369 | vaddw.u8 q10, q15, d2 |
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| 370 | vld1.8 {d5}, [r0,:64], r1 |
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| 371 | vaddw.u8 q11, q15, d3 |
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| 372 | vld1.8 {d6}, [r0,:64], r1 |
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| 373 | vaddw.u8 q12, q15, d4 |
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| 374 | vld1.8 {d7}, [r0,:64], r1 |
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| 375 | vaddw.u8 q13, q15, d5 |
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| 376 | vqmovun.s16 d0, q8 |
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| 377 | vaddw.u8 q14, q15, d6 |
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| 378 | vqmovun.s16 d1, q9 |
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| 379 | vaddw.u8 q15, q15, d7 |
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| 380 | vqmovun.s16 d2, q10 |
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| 381 | vst1.8 {d0}, [r3,:64], r1 |
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| 382 | vqmovun.s16 d3, q11 |
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| 383 | vst1.8 {d1}, [r3,:64], r1 |
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| 384 | vqmovun.s16 d4, q12 |
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| 385 | vst1.8 {d2}, [r3,:64], r1 |
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| 386 | vqmovun.s16 d5, q13 |
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| 387 | vst1.8 {d3}, [r3,:64], r1 |
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| 388 | vqmovun.s16 d6, q14 |
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| 389 | vst1.8 {d4}, [r3,:64], r1 |
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| 390 | vqmovun.s16 d7, q15 |
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| 391 | vst1.8 {d5}, [r3,:64], r1 |
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| 392 | vst1.8 {d6}, [r3,:64], r1 |
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| 393 | vst1.8 {d7}, [r3,:64], r1 |
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| 394 | bx lr |
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| 395 | endfunc |