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4358 | Serge | 1 | /* |
2 | Copyright (C) Intel Corp. 2006. All Rights Reserved. |
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3 | Intel funded Tungsten Graphics (http://www.tungstengraphics.com) to |
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4 | develop this 3D driver. |
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5 | |||
6 | Permission is hereby granted, free of charge, to any person obtaining |
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7 | a copy of this software and associated documentation files (the |
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8 | "Software"), to deal in the Software without restriction, including |
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9 | without limitation the rights to use, copy, modify, merge, publish, |
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10 | distribute, sublicense, and/or sell copies of the Software, and to |
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11 | permit persons to whom the Software is furnished to do so, subject to |
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12 | the following conditions: |
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13 | |||
14 | The above copyright notice and this permission notice (including the |
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15 | next paragraph) shall be included in all copies or substantial |
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16 | portions of the Software. |
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17 | |||
18 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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19 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
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21 | IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
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22 | LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
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23 | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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24 | WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | |||
26 | **********************************************************************/ |
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27 | /* |
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28 | * Authors: |
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29 | * Keith Whitwell |
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30 | */ |
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31 | |||
32 | |||
33 | #include "brw_context.h" |
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34 | #include "brw_state.h" |
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35 | #include "brw_defines.h" |
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36 | #include "brw_util.h" |
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37 | #include "main/macros.h" |
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38 | #include "main/stencil.h" |
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39 | #include "intel_batchbuffer.h" |
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40 | |||
41 | static void |
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42 | brw_upload_cc_vp(struct brw_context *brw) |
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43 | { |
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44 | struct gl_context *ctx = &brw->ctx; |
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45 | struct brw_cc_viewport *ccv; |
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46 | |||
47 | ccv = brw_state_batch(brw, AUB_TRACE_CC_VP_STATE, |
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48 | sizeof(*ccv), 32, &brw->cc.vp_offset); |
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49 | |||
50 | /* _NEW_TRANSFORM */ |
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51 | if (ctx->Transform.DepthClamp) { |
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52 | /* _NEW_VIEWPORT */ |
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53 | ccv->min_depth = MIN2(ctx->Viewport.Near, ctx->Viewport.Far); |
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54 | ccv->max_depth = MAX2(ctx->Viewport.Near, ctx->Viewport.Far); |
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55 | } else { |
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56 | ccv->min_depth = 0.0; |
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57 | ccv->max_depth = 1.0; |
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58 | } |
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59 | |||
60 | brw->state.dirty.cache |= CACHE_NEW_CC_VP; |
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61 | } |
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62 | |||
63 | const struct brw_tracked_state brw_cc_vp = { |
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64 | .dirty = { |
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65 | .mesa = _NEW_VIEWPORT | _NEW_TRANSFORM, |
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66 | .brw = BRW_NEW_BATCH, |
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67 | .cache = 0 |
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68 | }, |
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69 | .emit = brw_upload_cc_vp |
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70 | }; |
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71 | |||
72 | /** |
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73 | * Modify blend function to force destination alpha to 1.0 |
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74 | * |
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75 | * If \c function specifies a blend function that uses destination alpha, |
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76 | * replace it with a function that hard-wires destination alpha to 1.0. This |
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77 | * is used when rendering to xRGB targets. |
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78 | */ |
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79 | GLenum |
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80 | brw_fix_xRGB_alpha(GLenum function) |
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81 | { |
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82 | switch (function) { |
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83 | case GL_DST_ALPHA: |
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84 | return GL_ONE; |
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85 | |||
86 | case GL_ONE_MINUS_DST_ALPHA: |
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87 | case GL_SRC_ALPHA_SATURATE: |
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88 | return GL_ZERO; |
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89 | } |
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90 | |||
91 | return function; |
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92 | } |
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93 | |||
94 | /** |
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95 | * Creates the state cache entry for the given CC unit key. |
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96 | */ |
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97 | static void upload_cc_unit(struct brw_context *brw) |
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98 | { |
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99 | struct gl_context *ctx = &brw->ctx; |
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100 | struct brw_cc_unit_state *cc; |
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101 | |||
102 | cc = brw_state_batch(brw, AUB_TRACE_CC_STATE, |
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103 | sizeof(*cc), 64, &brw->cc.state_offset); |
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104 | memset(cc, 0, sizeof(*cc)); |
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105 | |||
106 | /* _NEW_STENCIL | _NEW_BUFFERS */ |
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107 | if (ctx->Stencil._Enabled) { |
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108 | const unsigned back = ctx->Stencil._BackFace; |
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109 | |||
110 | cc->cc0.stencil_enable = 1; |
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111 | cc->cc0.stencil_func = |
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112 | intel_translate_compare_func(ctx->Stencil.Function[0]); |
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113 | cc->cc0.stencil_fail_op = |
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114 | intel_translate_stencil_op(ctx->Stencil.FailFunc[0]); |
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115 | cc->cc0.stencil_pass_depth_fail_op = |
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116 | intel_translate_stencil_op(ctx->Stencil.ZFailFunc[0]); |
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117 | cc->cc0.stencil_pass_depth_pass_op = |
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118 | intel_translate_stencil_op(ctx->Stencil.ZPassFunc[0]); |
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119 | cc->cc1.stencil_ref = _mesa_get_stencil_ref(ctx, 0); |
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120 | cc->cc1.stencil_write_mask = ctx->Stencil.WriteMask[0]; |
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121 | cc->cc1.stencil_test_mask = ctx->Stencil.ValueMask[0]; |
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122 | |||
123 | if (ctx->Stencil._TestTwoSide) { |
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124 | cc->cc0.bf_stencil_enable = 1; |
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125 | cc->cc0.bf_stencil_func = |
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126 | intel_translate_compare_func(ctx->Stencil.Function[back]); |
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127 | cc->cc0.bf_stencil_fail_op = |
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128 | intel_translate_stencil_op(ctx->Stencil.FailFunc[back]); |
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129 | cc->cc0.bf_stencil_pass_depth_fail_op = |
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130 | intel_translate_stencil_op(ctx->Stencil.ZFailFunc[back]); |
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131 | cc->cc0.bf_stencil_pass_depth_pass_op = |
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132 | intel_translate_stencil_op(ctx->Stencil.ZPassFunc[back]); |
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133 | cc->cc1.bf_stencil_ref = _mesa_get_stencil_ref(ctx, back); |
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134 | cc->cc2.bf_stencil_write_mask = ctx->Stencil.WriteMask[back]; |
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135 | cc->cc2.bf_stencil_test_mask = ctx->Stencil.ValueMask[back]; |
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136 | } |
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137 | |||
138 | /* Not really sure about this: |
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139 | */ |
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140 | if (ctx->Stencil.WriteMask[0] || |
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141 | (ctx->Stencil._TestTwoSide && ctx->Stencil.WriteMask[back])) |
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142 | cc->cc0.stencil_write_enable = 1; |
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143 | } |
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144 | |||
145 | /* _NEW_COLOR */ |
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146 | if (ctx->Color.ColorLogicOpEnabled && ctx->Color.LogicOp != GL_COPY) { |
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147 | cc->cc2.logicop_enable = 1; |
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148 | cc->cc5.logicop_func = intel_translate_logic_op(ctx->Color.LogicOp); |
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149 | } else if (ctx->Color.BlendEnabled) { |
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150 | GLenum eqRGB = ctx->Color.Blend[0].EquationRGB; |
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151 | GLenum eqA = ctx->Color.Blend[0].EquationA; |
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152 | GLenum srcRGB = ctx->Color.Blend[0].SrcRGB; |
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153 | GLenum dstRGB = ctx->Color.Blend[0].DstRGB; |
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154 | GLenum srcA = ctx->Color.Blend[0].SrcA; |
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155 | GLenum dstA = ctx->Color.Blend[0].DstA; |
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156 | |||
157 | /* If the renderbuffer is XRGB, we have to frob the blend function to |
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158 | * force the destination alpha to 1.0. This means replacing GL_DST_ALPHA |
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159 | * with GL_ONE and GL_ONE_MINUS_DST_ALPHA with GL_ZERO. |
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160 | */ |
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161 | if (ctx->DrawBuffer->Visual.alphaBits == 0) { |
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162 | srcRGB = brw_fix_xRGB_alpha(srcRGB); |
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163 | srcA = brw_fix_xRGB_alpha(srcA); |
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164 | dstRGB = brw_fix_xRGB_alpha(dstRGB); |
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165 | dstA = brw_fix_xRGB_alpha(dstA); |
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166 | } |
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167 | |||
168 | if (eqRGB == GL_MIN || eqRGB == GL_MAX) { |
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169 | srcRGB = dstRGB = GL_ONE; |
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170 | } |
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171 | |||
172 | if (eqA == GL_MIN || eqA == GL_MAX) { |
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173 | srcA = dstA = GL_ONE; |
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174 | } |
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175 | |||
176 | cc->cc6.dest_blend_factor = brw_translate_blend_factor(dstRGB); |
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177 | cc->cc6.src_blend_factor = brw_translate_blend_factor(srcRGB); |
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178 | cc->cc6.blend_function = brw_translate_blend_equation(eqRGB); |
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179 | |||
180 | cc->cc5.ia_dest_blend_factor = brw_translate_blend_factor(dstA); |
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181 | cc->cc5.ia_src_blend_factor = brw_translate_blend_factor(srcA); |
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182 | cc->cc5.ia_blend_function = brw_translate_blend_equation(eqA); |
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183 | |||
184 | cc->cc3.blend_enable = 1; |
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185 | cc->cc3.ia_blend_enable = (srcA != srcRGB || |
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186 | dstA != dstRGB || |
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187 | eqA != eqRGB); |
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188 | } |
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189 | |||
4401 | Serge | 190 | /* _NEW_BUFFERS */ |
191 | if (ctx->Color.AlphaEnabled && ctx->DrawBuffer->_NumColorDrawBuffers <= 1) { |
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4358 | Serge | 192 | cc->cc3.alpha_test = 1; |
193 | cc->cc3.alpha_test_func = |
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194 | intel_translate_compare_func(ctx->Color.AlphaFunc); |
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195 | cc->cc3.alpha_test_format = BRW_ALPHATEST_FORMAT_UNORM8; |
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196 | |||
197 | UNCLAMPED_FLOAT_TO_UBYTE(cc->cc7.alpha_ref.ub[0], ctx->Color.AlphaRef); |
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198 | } |
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199 | |||
200 | if (ctx->Color.DitherFlag) { |
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201 | cc->cc5.dither_enable = 1; |
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202 | cc->cc6.y_dither_offset = 0; |
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203 | cc->cc6.x_dither_offset = 0; |
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204 | } |
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205 | |||
206 | /* _NEW_DEPTH */ |
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207 | if (ctx->Depth.Test) { |
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208 | cc->cc2.depth_test = 1; |
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209 | cc->cc2.depth_test_function = |
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210 | intel_translate_compare_func(ctx->Depth.Func); |
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211 | cc->cc2.depth_write_enable = ctx->Depth.Mask; |
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212 | } |
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213 | |||
214 | if (brw->stats_wm || unlikely(INTEL_DEBUG & DEBUG_STATS)) |
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215 | cc->cc5.statistics_enable = 1; |
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216 | |||
217 | /* CACHE_NEW_CC_VP */ |
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218 | cc->cc4.cc_viewport_state_offset = (brw->batch.bo->offset + |
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219 | brw->cc.vp_offset) >> 5; /* reloc */ |
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220 | |||
221 | brw->state.dirty.cache |= CACHE_NEW_CC_UNIT; |
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222 | |||
223 | /* Emit CC viewport relocation */ |
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224 | drm_intel_bo_emit_reloc(brw->batch.bo, |
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225 | (brw->cc.state_offset + |
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226 | offsetof(struct brw_cc_unit_state, cc4)), |
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227 | brw->batch.bo, brw->cc.vp_offset, |
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228 | I915_GEM_DOMAIN_INSTRUCTION, 0); |
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229 | } |
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230 | |||
231 | const struct brw_tracked_state brw_cc_unit = { |
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232 | .dirty = { |
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233 | .mesa = _NEW_STENCIL | _NEW_COLOR | _NEW_DEPTH | _NEW_BUFFERS, |
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234 | .brw = BRW_NEW_BATCH | BRW_NEW_STATS_WM, |
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235 | .cache = CACHE_NEW_CC_VP |
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236 | }, |
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237 | .emit = upload_cc_unit, |
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238 | }; |
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239 | |||
240 | static void upload_blend_constant_color(struct brw_context *brw) |
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241 | { |
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242 | struct gl_context *ctx = &brw->ctx; |
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243 | |||
244 | BEGIN_BATCH(5); |
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245 | OUT_BATCH(_3DSTATE_BLEND_CONSTANT_COLOR << 16 | (5-2)); |
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246 | OUT_BATCH_F(ctx->Color.BlendColorUnclamped[0]); |
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247 | OUT_BATCH_F(ctx->Color.BlendColorUnclamped[1]); |
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248 | OUT_BATCH_F(ctx->Color.BlendColorUnclamped[2]); |
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249 | OUT_BATCH_F(ctx->Color.BlendColorUnclamped[3]); |
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250 | CACHED_BATCH(); |
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251 | } |
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252 | |||
253 | const struct brw_tracked_state brw_blend_constant_color = { |
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254 | .dirty = { |
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255 | .mesa = _NEW_COLOR, |
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256 | .brw = BRW_NEW_CONTEXT, |
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257 | .cache = 0 |
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258 | }, |
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259 | .emit = upload_blend_constant_color |
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260 | };><>=> |