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4358 | Serge | 1 | /************************************************************************** |
2 | * |
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3 | * Copyright 2011 Advanced Micro Devices, Inc. |
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4 | * All Rights Reserved. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the |
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8 | * "Software"), to deal in the Software without restriction, including |
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9 | * without limitation the rights to use, copy, modify, merge, publish, |
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10 | * distribute, sub license, and/or sell copies of the Software, and to |
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11 | * permit persons to whom the Software is furnished to do so, subject to |
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12 | * the following conditions: |
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13 | * |
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14 | * The above copyright notice and this permission notice (including the |
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15 | * next paragraph) shall be included in all copies or substantial portions |
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16 | * of the Software. |
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17 | * |
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18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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21 | * IN NO EVENT SHALL THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR |
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22 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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23 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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24 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | * |
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26 | **************************************************************************/ |
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27 | |||
28 | /* |
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29 | * Authors: |
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30 | * Christian König |
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31 | * |
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32 | */ |
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33 | |||
34 | #include |
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35 | #include |
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36 | #include |
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37 | #include |
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38 | |||
39 | #include "pipe/p_video_decoder.h" |
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40 | |||
41 | #include "util/u_memory.h" |
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42 | #include "util/u_video.h" |
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43 | |||
44 | #include "vl/vl_defines.h" |
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45 | #include "vl/vl_mpeg12_decoder.h" |
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46 | |||
47 | #include "radeonsi_pipe.h" |
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48 | #include "radeon/radeon_uvd.h" |
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49 | #include "sid.h" |
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50 | |||
51 | /** |
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52 | * creates an video buffer with an UVD compatible memory layout |
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53 | */ |
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54 | struct pipe_video_buffer *radeonsi_video_buffer_create(struct pipe_context *pipe, |
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55 | const struct pipe_video_buffer *tmpl) |
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56 | { |
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57 | struct r600_context *ctx = (struct r600_context *)pipe; |
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58 | struct r600_resource_texture *resources[VL_NUM_COMPONENTS] = {}; |
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59 | struct radeon_surface *surfaces[VL_NUM_COMPONENTS] = {}; |
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60 | struct pb_buffer **pbs[VL_NUM_COMPONENTS] = {}; |
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61 | const enum pipe_format *resource_formats; |
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62 | struct pipe_video_buffer template; |
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63 | struct pipe_resource templ; |
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64 | unsigned i, array_size; |
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65 | |||
66 | assert(pipe); |
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67 | |||
68 | /* first create the needed resources as "normal" textures */ |
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69 | resource_formats = vl_video_buffer_formats(pipe->screen, tmpl->buffer_format); |
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70 | if (!resource_formats) |
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71 | return NULL; |
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72 | |||
73 | array_size = tmpl->interlaced ? 2 : 1; |
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74 | template = *tmpl; |
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75 | template.width = align(tmpl->width, VL_MACROBLOCK_WIDTH); |
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76 | template.height = align(tmpl->height / array_size, VL_MACROBLOCK_HEIGHT); |
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77 | |||
78 | vl_video_buffer_template(&templ, &template, resource_formats[0], 1, array_size, PIPE_USAGE_STATIC, 0); |
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79 | /* TODO: Setting the transfer flag is only a workaround till we get tiling working */ |
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80 | templ.flags = R600_RESOURCE_FLAG_TRANSFER; |
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81 | resources[0] = (struct r600_resource_texture *) |
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82 | pipe->screen->resource_create(pipe->screen, &templ); |
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83 | if (!resources[0]) |
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84 | goto error; |
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85 | |||
86 | if (resource_formats[1] != PIPE_FORMAT_NONE) { |
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87 | vl_video_buffer_template(&templ, &template, resource_formats[1], 1, array_size, PIPE_USAGE_STATIC, 1); |
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88 | templ.flags = R600_RESOURCE_FLAG_TRANSFER; |
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89 | resources[1] = (struct r600_resource_texture *) |
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90 | pipe->screen->resource_create(pipe->screen, &templ); |
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91 | if (!resources[1]) |
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92 | goto error; |
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93 | } |
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94 | |||
95 | if (resource_formats[2] != PIPE_FORMAT_NONE) { |
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96 | vl_video_buffer_template(&templ, &template, resource_formats[2], 1, array_size, PIPE_USAGE_STATIC, 2); |
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97 | templ.flags = R600_RESOURCE_FLAG_TRANSFER; |
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98 | resources[2] = (struct r600_resource_texture *) |
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99 | pipe->screen->resource_create(pipe->screen, &templ); |
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100 | if (!resources[2]) |
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101 | goto error; |
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102 | } |
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103 | |||
104 | for (i = 0; i < VL_NUM_COMPONENTS; ++i) { |
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105 | if (!resources[i]) |
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106 | continue; |
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107 | |||
108 | surfaces[i] = & resources[i]->surface; |
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109 | pbs[i] = &resources[i]->resource.buf; |
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110 | } |
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111 | |||
112 | ruvd_join_surfaces(ctx->ws, templ.bind, pbs, surfaces); |
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113 | |||
114 | for (i = 0; i < VL_NUM_COMPONENTS; ++i) { |
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115 | if (!resources[i]) |
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116 | continue; |
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117 | |||
118 | /* recreate the CS handle */ |
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119 | resources[i]->resource.cs_buf = ctx->ws->buffer_get_cs_handle( |
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120 | resources[i]->resource.buf); |
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121 | } |
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122 | |||
123 | template.height *= array_size; |
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124 | return vl_video_buffer_create_ex2(pipe, &template, (struct pipe_resource **)resources); |
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125 | |||
126 | error: |
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127 | for (i = 0; i < VL_NUM_COMPONENTS; ++i) |
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128 | pipe_resource_reference((struct pipe_resource **)&resources[i], NULL); |
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129 | |||
130 | return NULL; |
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131 | } |
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132 | |||
133 | /* set the decoding target buffer offsets */ |
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134 | static struct radeon_winsys_cs_handle* radeonsi_uvd_set_dtb(struct ruvd_msg *msg, struct vl_video_buffer *buf) |
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135 | { |
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136 | struct r600_resource_texture *luma = (struct r600_resource_texture *)buf->resources[0]; |
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137 | struct r600_resource_texture *chroma = (struct r600_resource_texture *)buf->resources[1]; |
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138 | |||
139 | msg->body.decode.dt_field_mode = buf->base.interlaced; |
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140 | |||
141 | ruvd_set_dt_surfaces(msg, &luma->surface, &chroma->surface); |
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142 | |||
143 | return luma->resource.cs_buf; |
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144 | } |
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145 | |||
146 | /** |
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147 | * creates an UVD compatible decoder |
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148 | */ |
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149 | struct pipe_video_decoder *radeonsi_uvd_create_decoder(struct pipe_context *context, |
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150 | enum pipe_video_profile profile, |
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151 | enum pipe_video_entrypoint entrypoint, |
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152 | enum pipe_video_chroma_format chroma_format, |
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153 | unsigned width, unsigned height, |
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154 | unsigned max_references, bool expect_chunked_decode) |
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155 | { |
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156 | struct r600_context *ctx = (struct r600_context *)context; |
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157 | |||
158 | return ruvd_create_decoder(context, profile, entrypoint, chroma_format, |
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159 | width, height, max_references, expect_chunked_decode, |
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160 | ctx->ws, radeonsi_uvd_set_dtb); |
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161 | }>>> |