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4358 | Serge | 1 | /* |
2 | * Copyright (c) 2012 Rob Clark |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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21 | * SOFTWARE. |
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22 | */ |
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23 | |||
24 | #ifndef INSTR_A2XX_H_ |
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25 | #define INSTR_A2XX_H_ |
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26 | |||
27 | #define PACKED __attribute__((__packed__)) |
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28 | |||
29 | #include "util/u_math.h" |
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30 | #include "adreno_common.xml.h" |
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31 | #include "a2xx.xml.h" |
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32 | |||
33 | |||
34 | /* |
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35 | * ALU instructions: |
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36 | */ |
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37 | |||
38 | typedef enum { |
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39 | ADDs = 0, |
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40 | ADD_PREVs = 1, |
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41 | MULs = 2, |
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42 | MUL_PREVs = 3, |
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43 | MUL_PREV2s = 4, |
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44 | MAXs = 5, |
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45 | MINs = 6, |
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46 | SETEs = 7, |
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47 | SETGTs = 8, |
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48 | SETGTEs = 9, |
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49 | SETNEs = 10, |
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50 | FRACs = 11, |
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51 | TRUNCs = 12, |
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52 | FLOORs = 13, |
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53 | EXP_IEEE = 14, |
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54 | LOG_CLAMP = 15, |
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55 | LOG_IEEE = 16, |
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56 | RECIP_CLAMP = 17, |
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57 | RECIP_FF = 18, |
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58 | RECIP_IEEE = 19, |
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59 | RECIPSQ_CLAMP = 20, |
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60 | RECIPSQ_FF = 21, |
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61 | RECIPSQ_IEEE = 22, |
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62 | MOVAs = 23, |
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63 | MOVA_FLOORs = 24, |
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64 | SUBs = 25, |
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65 | SUB_PREVs = 26, |
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66 | PRED_SETEs = 27, |
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67 | PRED_SETNEs = 28, |
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68 | PRED_SETGTs = 29, |
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69 | PRED_SETGTEs = 30, |
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70 | PRED_SET_INVs = 31, |
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71 | PRED_SET_POPs = 32, |
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72 | PRED_SET_CLRs = 33, |
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73 | PRED_SET_RESTOREs = 34, |
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74 | KILLEs = 35, |
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75 | KILLGTs = 36, |
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76 | KILLGTEs = 37, |
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77 | KILLNEs = 38, |
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78 | KILLONEs = 39, |
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79 | SQRT_IEEE = 40, |
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80 | MUL_CONST_0 = 42, |
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81 | MUL_CONST_1 = 43, |
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82 | ADD_CONST_0 = 44, |
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83 | ADD_CONST_1 = 45, |
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84 | SUB_CONST_0 = 46, |
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85 | SUB_CONST_1 = 47, |
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86 | SIN = 48, |
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87 | COS = 49, |
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88 | RETAIN_PREV = 50, |
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89 | } instr_scalar_opc_t; |
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90 | |||
91 | typedef enum { |
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92 | ADDv = 0, |
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93 | MULv = 1, |
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94 | MAXv = 2, |
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95 | MINv = 3, |
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96 | SETEv = 4, |
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97 | SETGTv = 5, |
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98 | SETGTEv = 6, |
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99 | SETNEv = 7, |
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100 | FRACv = 8, |
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101 | TRUNCv = 9, |
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102 | FLOORv = 10, |
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103 | MULADDv = 11, |
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104 | CNDEv = 12, |
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105 | CNDGTEv = 13, |
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106 | CNDGTv = 14, |
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107 | DOT4v = 15, |
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108 | DOT3v = 16, |
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109 | DOT2ADDv = 17, |
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110 | CUBEv = 18, |
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111 | MAX4v = 19, |
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112 | PRED_SETE_PUSHv = 20, |
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113 | PRED_SETNE_PUSHv = 21, |
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114 | PRED_SETGT_PUSHv = 22, |
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115 | PRED_SETGTE_PUSHv = 23, |
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116 | KILLEv = 24, |
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117 | KILLGTv = 25, |
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118 | KILLGTEv = 26, |
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119 | KILLNEv = 27, |
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120 | DSTv = 28, |
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121 | MOVAv = 29, |
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122 | } instr_vector_opc_t; |
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123 | |||
124 | typedef struct PACKED { |
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125 | /* dword0: */ |
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126 | uint8_t vector_dest : 6; |
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127 | uint8_t vector_dest_rel : 1; |
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128 | uint8_t low_precision_16b_fp : 1; |
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129 | uint8_t scalar_dest : 6; |
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130 | uint8_t scalar_dest_rel : 1; |
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131 | uint8_t export_data : 1; |
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132 | uint8_t vector_write_mask : 4; |
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133 | uint8_t scalar_write_mask : 4; |
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134 | uint8_t vector_clamp : 1; |
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135 | uint8_t scalar_clamp : 1; |
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136 | instr_scalar_opc_t scalar_opc : 6; |
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137 | /* dword1: */ |
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138 | uint8_t src3_swiz : 8; |
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139 | uint8_t src2_swiz : 8; |
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140 | uint8_t src1_swiz : 8; |
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141 | uint8_t src3_reg_negate : 1; |
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142 | uint8_t src2_reg_negate : 1; |
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143 | uint8_t src1_reg_negate : 1; |
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144 | uint8_t pred_select : 2; |
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145 | uint8_t relative_addr : 1; |
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146 | uint8_t const_1_rel_abs : 1; |
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147 | uint8_t const_0_rel_abs : 1; |
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148 | /* dword2: */ |
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149 | uint8_t src3_reg : 6; |
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150 | uint8_t src3_reg_select : 1; |
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151 | uint8_t src3_reg_abs : 1; |
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152 | uint8_t src2_reg : 6; |
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153 | uint8_t src2_reg_select : 1; |
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154 | uint8_t src2_reg_abs : 1; |
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155 | uint8_t src1_reg : 6; |
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156 | uint8_t src1_reg_select : 1; |
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157 | uint8_t src1_reg_abs : 1; |
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158 | instr_vector_opc_t vector_opc : 5; |
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159 | uint8_t src3_sel : 1; |
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160 | uint8_t src2_sel : 1; |
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161 | uint8_t src1_sel : 1; |
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162 | } instr_alu_t; |
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163 | |||
164 | |||
165 | |||
166 | /* |
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167 | * CF instructions: |
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168 | */ |
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169 | |||
170 | typedef enum { |
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171 | NOP = 0, |
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172 | EXEC = 1, |
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173 | EXEC_END = 2, |
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174 | COND_EXEC = 3, |
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175 | COND_EXEC_END = 4, |
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176 | COND_PRED_EXEC = 5, |
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177 | COND_PRED_EXEC_END = 6, |
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178 | LOOP_START = 7, |
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179 | LOOP_END = 8, |
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180 | COND_CALL = 9, |
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181 | RETURN = 10, |
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182 | COND_JMP = 11, |
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183 | ALLOC = 12, |
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184 | COND_EXEC_PRED_CLEAN = 13, |
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185 | COND_EXEC_PRED_CLEAN_END = 14, |
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186 | MARK_VS_FETCH_DONE = 15, |
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187 | } instr_cf_opc_t; |
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188 | |||
189 | typedef enum { |
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190 | RELATIVE_ADDR = 0, |
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191 | ABSOLUTE_ADDR = 1, |
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192 | } instr_addr_mode_t; |
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193 | |||
194 | typedef enum { |
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195 | SQ_NO_ALLOC = 0, |
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196 | SQ_POSITION = 1, |
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197 | SQ_PARAMETER_PIXEL = 2, |
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198 | SQ_MEMORY = 3, |
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199 | } instr_alloc_type_t; |
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200 | |||
201 | typedef struct PACKED { |
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202 | uint16_t address : 9; |
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203 | uint8_t reserved0 : 3; |
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204 | uint8_t count : 3; |
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205 | uint8_t yeild : 1; |
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206 | uint16_t serialize : 12; |
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207 | uint8_t vc : 6; /* vertex cache? */ |
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208 | uint8_t bool_addr : 8; |
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209 | uint8_t condition : 1; |
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210 | instr_addr_mode_t address_mode : 1; |
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211 | instr_cf_opc_t opc : 4; |
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212 | } instr_cf_exec_t; |
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213 | |||
214 | typedef struct PACKED { |
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215 | uint16_t address : 10; |
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216 | uint8_t reserved0 : 6; |
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217 | uint8_t loop_id : 5; |
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218 | uint32_t reserved1 : 22; |
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219 | instr_addr_mode_t address_mode : 1; |
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220 | instr_cf_opc_t opc : 4; |
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221 | } instr_cf_loop_t; |
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222 | |||
223 | typedef struct PACKED { |
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224 | uint16_t address : 10; |
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225 | uint8_t reserved0 : 3; |
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226 | uint8_t force_call : 1; |
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227 | uint8_t predicated_jmp : 1; |
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228 | uint32_t reserved1 : 18; |
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229 | uint8_t direction : 1; |
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230 | uint8_t bool_addr : 8; |
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231 | uint8_t condition : 1; |
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232 | instr_addr_mode_t address_mode : 1; |
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233 | instr_cf_opc_t opc : 4; |
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234 | } instr_cf_jmp_call_t; |
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235 | |||
236 | typedef struct PACKED { |
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237 | uint8_t size : 4; |
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238 | uint64_t reserved0 : 36; |
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239 | uint8_t no_serial : 1; |
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240 | instr_alloc_type_t buffer_select : 2; |
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241 | uint8_t alloc_mode : 1; |
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242 | instr_cf_opc_t opc : 4; |
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243 | } instr_cf_alloc_t; |
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244 | |||
245 | typedef union PACKED { |
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246 | instr_cf_exec_t exec; |
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247 | instr_cf_loop_t loop; |
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248 | instr_cf_jmp_call_t jmp_call; |
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249 | instr_cf_alloc_t alloc; |
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250 | struct PACKED { |
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251 | uint64_t dummy : 44; |
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252 | instr_cf_opc_t opc : 4; |
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253 | }; |
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254 | } instr_cf_t; |
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255 | |||
256 | |||
257 | |||
258 | /* |
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259 | * FETCH instructions: |
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260 | */ |
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261 | |||
262 | typedef enum { |
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263 | VTX_FETCH = 0, |
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264 | TEX_FETCH = 1, |
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265 | TEX_GET_BORDER_COLOR_FRAC = 16, |
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266 | TEX_GET_COMP_TEX_LOD = 17, |
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267 | TEX_GET_GRADIENTS = 18, |
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268 | TEX_GET_WEIGHTS = 19, |
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269 | TEX_SET_TEX_LOD = 24, |
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270 | TEX_SET_GRADIENTS_H = 25, |
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271 | TEX_SET_GRADIENTS_V = 26, |
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272 | TEX_RESERVED_4 = 27, |
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273 | } instr_fetch_opc_t; |
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274 | |||
275 | typedef enum { |
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276 | TEX_FILTER_POINT = 0, |
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277 | TEX_FILTER_LINEAR = 1, |
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278 | TEX_FILTER_BASEMAP = 2, /* only applicable for mip-filter */ |
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279 | TEX_FILTER_USE_FETCH_CONST = 3, |
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280 | } instr_tex_filter_t; |
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281 | |||
282 | typedef enum { |
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283 | ANISO_FILTER_DISABLED = 0, |
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284 | ANISO_FILTER_MAX_1_1 = 1, |
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285 | ANISO_FILTER_MAX_2_1 = 2, |
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286 | ANISO_FILTER_MAX_4_1 = 3, |
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287 | ANISO_FILTER_MAX_8_1 = 4, |
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288 | ANISO_FILTER_MAX_16_1 = 5, |
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289 | ANISO_FILTER_USE_FETCH_CONST = 7, |
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290 | } instr_aniso_filter_t; |
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291 | |||
292 | typedef enum { |
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293 | ARBITRARY_FILTER_2X4_SYM = 0, |
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294 | ARBITRARY_FILTER_2X4_ASYM = 1, |
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295 | ARBITRARY_FILTER_4X2_SYM = 2, |
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296 | ARBITRARY_FILTER_4X2_ASYM = 3, |
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297 | ARBITRARY_FILTER_4X4_SYM = 4, |
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298 | ARBITRARY_FILTER_4X4_ASYM = 5, |
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299 | ARBITRARY_FILTER_USE_FETCH_CONST = 7, |
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300 | } instr_arbitrary_filter_t; |
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301 | |||
302 | typedef enum { |
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303 | SAMPLE_CENTROID = 0, |
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304 | SAMPLE_CENTER = 1, |
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305 | } instr_sample_loc_t; |
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306 | |||
307 | typedef enum a2xx_sq_surfaceformat instr_surf_fmt_t; |
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308 | |||
309 | typedef struct PACKED { |
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310 | /* dword0: */ |
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311 | instr_fetch_opc_t opc : 5; |
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312 | uint8_t src_reg : 6; |
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313 | uint8_t src_reg_am : 1; |
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314 | uint8_t dst_reg : 6; |
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315 | uint8_t dst_reg_am : 1; |
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316 | uint8_t fetch_valid_only : 1; |
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317 | uint8_t const_idx : 5; |
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318 | uint8_t tx_coord_denorm : 1; |
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319 | uint8_t src_swiz : 6; |
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320 | /* dword1: */ |
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321 | uint16_t dst_swiz : 12; |
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322 | instr_tex_filter_t mag_filter : 2; |
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323 | instr_tex_filter_t min_filter : 2; |
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324 | instr_tex_filter_t mip_filter : 2; |
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325 | instr_aniso_filter_t aniso_filter : 3; |
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326 | instr_arbitrary_filter_t arbitrary_filter : 3; |
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327 | instr_tex_filter_t vol_mag_filter : 2; |
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328 | instr_tex_filter_t vol_min_filter : 2; |
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329 | uint8_t use_comp_lod : 1; |
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330 | uint8_t use_reg_lod : 2; /* 0 for cube, 1 for 2d */ |
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331 | uint8_t pred_select : 1; |
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332 | /* dword2: */ |
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333 | uint8_t use_reg_gradients : 1; |
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334 | instr_sample_loc_t sample_location : 1; |
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335 | uint8_t lod_bias : 7; |
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336 | uint8_t unused : 7; |
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337 | uint8_t offset_x : 5; |
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338 | uint8_t offset_y : 5; |
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339 | uint8_t offset_z : 5; |
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340 | uint8_t pred_condition : 1; |
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341 | } instr_fetch_tex_t; |
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342 | |||
343 | typedef struct PACKED { |
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344 | /* dword0: */ |
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345 | instr_fetch_opc_t opc : 5; |
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346 | uint8_t src_reg : 6; |
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347 | uint8_t src_reg_am : 1; |
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348 | uint8_t dst_reg : 6; |
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349 | uint8_t dst_reg_am : 1; |
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350 | uint8_t must_be_one : 1; |
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351 | uint8_t const_index : 5; |
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352 | uint8_t const_index_sel : 2; |
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353 | uint8_t reserved0 : 3; |
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354 | uint8_t src_swiz : 2; |
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355 | /* dword1: */ |
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356 | uint16_t dst_swiz : 12; |
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357 | uint8_t format_comp_all : 1; /* '1' for signed, '0' for unsigned? */ |
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358 | uint8_t num_format_all : 1; /* '0' for normalized, '1' for unnormalized */ |
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359 | uint8_t signed_rf_mode_all : 1; |
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360 | uint8_t reserved1 : 1; |
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361 | instr_surf_fmt_t format : 6; |
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362 | uint8_t reserved2 : 1; |
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363 | uint8_t exp_adjust_all : 7; |
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364 | uint8_t reserved3 : 1; |
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365 | uint8_t pred_select : 1; |
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366 | /* dword2: */ |
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367 | uint8_t stride : 8; |
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368 | /* possibly offset and reserved4 are swapped on a200? */ |
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369 | uint8_t offset : 8; |
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370 | uint8_t reserved4 : 8; |
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371 | uint8_t reserved5 : 7; |
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372 | uint8_t pred_condition : 1; |
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373 | } instr_fetch_vtx_t; |
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374 | |||
375 | typedef union PACKED { |
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376 | instr_fetch_tex_t tex; |
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377 | instr_fetch_vtx_t vtx; |
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378 | struct PACKED { |
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379 | /* dword0: */ |
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380 | instr_fetch_opc_t opc : 5; |
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381 | uint32_t dummy0 : 27; |
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382 | /* dword1: */ |
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383 | uint32_t dummy1 : 32; |
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384 | /* dword2: */ |
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385 | uint32_t dummy2 : 32; |
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386 | }; |
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387 | } instr_fetch_t; |
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388 | |||
389 | #endif /* INSTR_H_ */ |