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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5564 | serge | 1 | /************************************************************************** |
| 2 | * |
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| 3 | * Copyright 2014 VMware, Inc. |
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| 4 | * All Rights Reserved. |
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| 5 | * |
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| 6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 7 | * copy of this software and associated documentation files (the |
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| 8 | * "Software"), to deal in the Software without restriction, including |
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| 9 | * without limitation the rights to use, copy, modify, merge, publish, |
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| 10 | * distribute, sub license, and/or sell copies of the Software, and to |
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| 11 | * permit persons to whom the Software is furnished to do so, subject to |
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| 12 | * the following conditions: |
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| 13 | * |
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| 14 | * The above copyright notice and this permission notice (including the |
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| 15 | * next paragraph) shall be included in all copies or substantial portions |
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| 16 | * of the Software. |
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| 17 | * |
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| 18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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| 19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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| 20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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| 21 | * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR |
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| 22 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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| 23 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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| 24 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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| 25 | * |
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| 26 | **************************************************************************/ |
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| 27 | |||
| 28 | |||
| 29 | /* Force assertions, even on debug builds. */ |
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| 30 | #undef NDEBUG |
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| 31 | |||
| 32 | |||
| 33 | #include |
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| 34 | #include |
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| 35 | #include |
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| 36 | |||
| 37 | #include "u_atomic.h" |
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| 38 | |||
| 39 | #ifdef _MSC_VER |
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| 40 | #pragma warning( disable : 28112 ) /* Accessing a local variable via an Interlocked function */ |
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| 41 | #pragma warning( disable : 28113 ) /* A variable which is accessed via an Interlocked function must always be accessed via an Interlocked function */ |
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| 42 | #endif |
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| 43 | |||
| 44 | |||
| 45 | /* Test only assignment-like operations, which are supported on all types */ |
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| 46 | #define test_atomic_assign(type, ones) \ |
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| 47 | static void test_atomic_assign_##type (void) { \ |
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| 48 | type v, r; \ |
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| 49 | \ |
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| 50 | p_atomic_set(&v, ones); \ |
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| 51 | assert(v == ones && "p_atomic_set"); \ |
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| 52 | \ |
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| 53 | r = p_atomic_read(&v); \ |
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| 54 | assert(r == ones && "p_atomic_read"); \ |
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| 55 | \ |
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| 56 | v = ones; \ |
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| 57 | r = p_atomic_cmpxchg(&v, 0, 1); \ |
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| 58 | assert(v == ones && "p_atomic_cmpxchg"); \ |
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| 59 | assert(r == ones && "p_atomic_cmpxchg"); \ |
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| 60 | r = p_atomic_cmpxchg(&v, ones, 0); \ |
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| 61 | assert(v == 0 && "p_atomic_cmpxchg"); \ |
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| 62 | assert(r == ones && "p_atomic_cmpxchg"); \ |
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| 63 | \ |
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| 64 | (void) r; \ |
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| 65 | } |
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| 66 | |||
| 67 | |||
| 68 | /* Test arithmetic operations that are supported on 8 bits integer types */ |
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| 69 | #define test_atomic_8bits(type, ones) \ |
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| 70 | test_atomic_assign(type, ones) \ |
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| 71 | \ |
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| 72 | static void test_atomic_8bits_##type (void) { \ |
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| 73 | type v, r; \ |
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| 74 | \ |
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| 75 | test_atomic_assign_##type(); \ |
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| 76 | \ |
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| 77 | v = 23; \ |
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| 78 | p_atomic_add(&v, 42); \ |
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| 79 | r = p_atomic_read(&v); \ |
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| 80 | assert(r == 65 && "p_atomic_add"); \ |
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| 81 | \ |
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| 82 | (void) r; \ |
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| 83 | } |
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| 84 | |||
| 85 | |||
| 86 | /* Test all operations */ |
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| 87 | #define test_atomic(type, ones) \ |
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| 88 | test_atomic_8bits(type, ones) \ |
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| 89 | \ |
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| 90 | static void test_atomic_##type (void) { \ |
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| 91 | type v, r; \ |
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| 92 | bool b; \ |
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| 93 | \ |
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| 94 | test_atomic_8bits_##type(); \ |
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| 95 | \ |
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| 96 | v = 2; \ |
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| 97 | b = p_atomic_dec_zero(&v); \ |
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| 98 | assert(v == 1 && "p_atomic_dec_zero"); \ |
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| 99 | assert(b == false && "p_atomic_dec_zero"); \ |
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| 100 | b = p_atomic_dec_zero(&v); \ |
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| 101 | assert(v == 0 && "p_atomic_dec_zero"); \ |
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| 102 | assert(b == true && "p_atomic_dec_zero"); \ |
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| 103 | b = p_atomic_dec_zero(&v); \ |
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| 104 | assert(v == ones && "p_atomic_dec_zero"); \ |
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| 105 | assert(b == false && "p_atomic_dec_zero"); \ |
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| 106 | \ |
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| 107 | v = ones; \ |
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| 108 | p_atomic_inc(&v); \ |
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| 109 | assert(v == 0 && "p_atomic_inc"); \ |
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| 110 | \ |
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| 111 | v = ones; \ |
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| 112 | r = p_atomic_inc_return(&v); \ |
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| 113 | assert(v == 0 && "p_atomic_inc_return"); \ |
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| 114 | assert(r == v && "p_atomic_inc_return"); \ |
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| 115 | \ |
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| 116 | v = 0; \ |
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| 117 | p_atomic_dec(&v); \ |
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| 118 | assert(v == ones && "p_atomic_dec"); \ |
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| 119 | \ |
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| 120 | v = 0; \ |
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| 121 | r = p_atomic_dec_return(&v); \ |
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| 122 | assert(v == ones && "p_atomic_dec_return"); \ |
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| 123 | assert(r == v && "p_atomic_dec_return"); \ |
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| 124 | \ |
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| 125 | (void) r; \ |
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| 126 | (void) b; \ |
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| 127 | } |
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| 128 | |||
| 129 | |||
| 130 | test_atomic(int, -1) |
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| 131 | test_atomic(unsigned, ~0U) |
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| 132 | |||
| 133 | test_atomic(int16_t, INT16_C(-1)) |
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| 134 | test_atomic(uint16_t, UINT16_C(0xffff)) |
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| 135 | test_atomic(int32_t, INT32_C(-1)) |
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| 136 | test_atomic(uint32_t, UINT32_C(0xffffffff)) |
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| 137 | test_atomic(int64_t, INT64_C(-1)) |
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| 138 | test_atomic(uint64_t, UINT64_C(0xffffffffffffffff)) |
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| 139 | |||
| 140 | test_atomic_8bits(int8_t, INT8_C(-1)) |
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| 141 | test_atomic_8bits(uint8_t, UINT8_C(0xff)) |
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| 142 | test_atomic_assign(bool, true) |
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| 143 | |||
| 144 | int |
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| 145 | main() |
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| 146 | { |
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| 147 | test_atomic_int(); |
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| 148 | test_atomic_unsigned(); |
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| 149 | |||
| 150 | test_atomic_int16_t(); |
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| 151 | test_atomic_uint16_t(); |
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| 152 | test_atomic_int32_t(); |
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| 153 | test_atomic_uint32_t(); |
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| 154 | test_atomic_int64_t(); |
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| 155 | test_atomic_uint64_t(); |
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| 156 | |||
| 157 | test_atomic_8bits_int8_t(); |
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| 158 | test_atomic_8bits_uint8_t(); |
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| 159 | test_atomic_assign_bool(); |
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| 160 | |||
| 161 | return 0; |
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| 162 | } |