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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5564 | serge | 1 | /* |
| 2 | * Copyright (c) 2013 Rob Clark |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice (including the next |
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| 12 | * paragraph) shall be included in all copies or substantial portions of the |
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| 13 | * Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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| 20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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| 21 | * SOFTWARE. |
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| 22 | */ |
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| 23 | |||
| 24 | #ifndef INSTR_A3XX_H_ |
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| 25 | #define INSTR_A3XX_H_ |
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| 26 | |||
| 27 | #define PACKED __attribute__((__packed__)) |
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| 28 | |||
| 29 | #include |
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| 30 | #include |
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| 31 | |||
| 32 | typedef enum { |
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| 33 | /* category 0: */ |
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| 34 | OPC_NOP = 0, |
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| 35 | OPC_BR = 1, |
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| 36 | OPC_JUMP = 2, |
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| 37 | OPC_CALL = 3, |
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| 38 | OPC_RET = 4, |
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| 39 | OPC_KILL = 5, |
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| 40 | OPC_END = 6, |
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| 41 | OPC_EMIT = 7, |
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| 42 | OPC_CUT = 8, |
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| 43 | OPC_CHMASK = 9, |
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| 44 | OPC_CHSH = 10, |
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| 45 | OPC_FLOW_REV = 11, |
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| 46 | |||
| 47 | /* category 1: */ |
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| 48 | /* no opc.. all category 1 are variants of mov */ |
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| 49 | |||
| 50 | /* category 2: */ |
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| 51 | OPC_ADD_F = 0, |
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| 52 | OPC_MIN_F = 1, |
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| 53 | OPC_MAX_F = 2, |
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| 54 | OPC_MUL_F = 3, |
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| 55 | OPC_SIGN_F = 4, |
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| 56 | OPC_CMPS_F = 5, |
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| 57 | OPC_ABSNEG_F = 6, |
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| 58 | OPC_CMPV_F = 7, |
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| 59 | /* 8 - invalid */ |
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| 60 | OPC_FLOOR_F = 9, |
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| 61 | OPC_CEIL_F = 10, |
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| 62 | OPC_RNDNE_F = 11, |
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| 63 | OPC_RNDAZ_F = 12, |
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| 64 | OPC_TRUNC_F = 13, |
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| 65 | /* 14-15 - invalid */ |
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| 66 | OPC_ADD_U = 16, |
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| 67 | OPC_ADD_S = 17, |
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| 68 | OPC_SUB_U = 18, |
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| 69 | OPC_SUB_S = 19, |
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| 70 | OPC_CMPS_U = 20, |
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| 71 | OPC_CMPS_S = 21, |
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| 72 | OPC_MIN_U = 22, |
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| 73 | OPC_MIN_S = 23, |
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| 74 | OPC_MAX_U = 24, |
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| 75 | OPC_MAX_S = 25, |
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| 76 | OPC_ABSNEG_S = 26, |
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| 77 | /* 27 - invalid */ |
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| 78 | OPC_AND_B = 28, |
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| 79 | OPC_OR_B = 29, |
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| 80 | OPC_NOT_B = 30, |
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| 81 | OPC_XOR_B = 31, |
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| 82 | /* 32 - invalid */ |
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| 83 | OPC_CMPV_U = 33, |
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| 84 | OPC_CMPV_S = 34, |
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| 85 | /* 35-47 - invalid */ |
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| 86 | OPC_MUL_U = 48, |
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| 87 | OPC_MUL_S = 49, |
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| 88 | OPC_MULL_U = 50, |
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| 89 | OPC_BFREV_B = 51, |
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| 90 | OPC_CLZ_S = 52, |
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| 91 | OPC_CLZ_B = 53, |
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| 92 | OPC_SHL_B = 54, |
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| 93 | OPC_SHR_B = 55, |
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| 94 | OPC_ASHR_B = 56, |
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| 95 | OPC_BARY_F = 57, |
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| 96 | OPC_MGEN_B = 58, |
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| 97 | OPC_GETBIT_B = 59, |
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| 98 | OPC_SETRM = 60, |
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| 99 | OPC_CBITS_B = 61, |
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| 100 | OPC_SHB = 62, |
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| 101 | OPC_MSAD = 63, |
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| 102 | |||
| 103 | /* category 3: */ |
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| 104 | OPC_MAD_U16 = 0, |
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| 105 | OPC_MADSH_U16 = 1, |
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| 106 | OPC_MAD_S16 = 2, |
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| 107 | OPC_MADSH_M16 = 3, /* should this be .s16? */ |
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| 108 | OPC_MAD_U24 = 4, |
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| 109 | OPC_MAD_S24 = 5, |
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| 110 | OPC_MAD_F16 = 6, |
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| 111 | OPC_MAD_F32 = 7, |
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| 112 | OPC_SEL_B16 = 8, |
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| 113 | OPC_SEL_B32 = 9, |
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| 114 | OPC_SEL_S16 = 10, |
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| 115 | OPC_SEL_S32 = 11, |
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| 116 | OPC_SEL_F16 = 12, |
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| 117 | OPC_SEL_F32 = 13, |
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| 118 | OPC_SAD_S16 = 14, |
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| 119 | OPC_SAD_S32 = 15, |
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| 120 | |||
| 121 | /* category 4: */ |
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| 122 | OPC_RCP = 0, |
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| 123 | OPC_RSQ = 1, |
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| 124 | OPC_LOG2 = 2, |
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| 125 | OPC_EXP2 = 3, |
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| 126 | OPC_SIN = 4, |
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| 127 | OPC_COS = 5, |
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| 128 | OPC_SQRT = 6, |
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| 129 | // 7-63 - invalid |
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| 130 | |||
| 131 | /* category 5: */ |
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| 132 | OPC_ISAM = 0, |
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| 133 | OPC_ISAML = 1, |
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| 134 | OPC_ISAMM = 2, |
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| 135 | OPC_SAM = 3, |
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| 136 | OPC_SAMB = 4, |
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| 137 | OPC_SAML = 5, |
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| 138 | OPC_SAMGQ = 6, |
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| 139 | OPC_GETLOD = 7, |
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| 140 | OPC_CONV = 8, |
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| 141 | OPC_CONVM = 9, |
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| 142 | OPC_GETSIZE = 10, |
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| 143 | OPC_GETBUF = 11, |
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| 144 | OPC_GETPOS = 12, |
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| 145 | OPC_GETINFO = 13, |
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| 146 | OPC_DSX = 14, |
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| 147 | OPC_DSY = 15, |
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| 148 | OPC_GATHER4R = 16, |
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| 149 | OPC_GATHER4G = 17, |
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| 150 | OPC_GATHER4B = 18, |
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| 151 | OPC_GATHER4A = 19, |
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| 152 | OPC_SAMGP0 = 20, |
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| 153 | OPC_SAMGP1 = 21, |
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| 154 | OPC_SAMGP2 = 22, |
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| 155 | OPC_SAMGP3 = 23, |
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| 156 | OPC_DSXPP_1 = 24, |
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| 157 | OPC_DSYPP_1 = 25, |
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| 158 | OPC_RGETPOS = 26, |
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| 159 | OPC_RGETINFO = 27, |
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| 160 | |||
| 161 | /* category 6: */ |
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| 162 | OPC_LDG = 0, /* load-global */ |
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| 163 | OPC_LDL = 1, |
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| 164 | OPC_LDP = 2, |
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| 165 | OPC_STG = 3, /* store-global */ |
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| 166 | OPC_STL = 4, |
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| 167 | OPC_STP = 5, |
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| 168 | OPC_STI = 6, |
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| 169 | OPC_G2L = 7, |
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| 170 | OPC_L2G = 8, |
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| 171 | OPC_PREFETCH = 9, |
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| 172 | OPC_LDLW = 10, |
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| 173 | OPC_STLW = 11, |
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| 174 | OPC_RESFMT = 14, |
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| 175 | OPC_RESINFO = 15, |
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| 176 | OPC_ATOMIC_ADD_L = 16, |
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| 177 | OPC_ATOMIC_SUB_L = 17, |
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| 178 | OPC_ATOMIC_XCHG_L = 18, |
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| 179 | OPC_ATOMIC_INC_L = 19, |
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| 180 | OPC_ATOMIC_DEC_L = 20, |
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| 181 | OPC_ATOMIC_CMPXCHG_L = 21, |
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| 182 | OPC_ATOMIC_MIN_L = 22, |
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| 183 | OPC_ATOMIC_MAX_L = 23, |
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| 184 | OPC_ATOMIC_AND_L = 24, |
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| 185 | OPC_ATOMIC_OR_L = 25, |
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| 186 | OPC_ATOMIC_XOR_L = 26, |
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| 187 | OPC_LDGB_TYPED_4D = 27, |
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| 188 | OPC_STGB_4D_4 = 28, |
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| 189 | OPC_STIB = 29, |
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| 190 | OPC_LDC_4 = 30, |
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| 191 | OPC_LDLV = 31, |
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| 192 | |||
| 193 | /* meta instructions (category -1): */ |
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| 194 | /* placeholder instr to mark inputs/outputs: */ |
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| 195 | OPC_META_INPUT = 0, |
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| 196 | OPC_META_OUTPUT = 1, |
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| 197 | /* The "fan-in" and "fan-out" instructions are used for keeping |
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| 198 | * track of instructions that write to multiple dst registers |
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| 199 | * (fan-out) like texture sample instructions, or read multiple |
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| 200 | * consecutive scalar registers (fan-in) (bary.f, texture samp) |
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| 201 | */ |
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| 202 | OPC_META_FO = 2, |
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| 203 | OPC_META_FI = 3, |
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| 204 | /* branches/flow control */ |
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| 205 | OPC_META_FLOW = 4, |
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| 206 | OPC_META_PHI = 5, |
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| 207 | |||
| 208 | } opc_t; |
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| 209 | |||
| 210 | typedef enum { |
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| 211 | TYPE_F16 = 0, |
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| 212 | TYPE_F32 = 1, |
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| 213 | TYPE_U16 = 2, |
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| 214 | TYPE_U32 = 3, |
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| 215 | TYPE_S16 = 4, |
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| 216 | TYPE_S32 = 5, |
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| 217 | TYPE_U8 = 6, |
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| 218 | TYPE_S8 = 7, // XXX I assume? |
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| 219 | } type_t; |
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| 220 | |||
| 221 | static inline uint32_t type_size(type_t type) |
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| 222 | { |
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| 223 | switch (type) { |
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| 224 | case TYPE_F32: |
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| 225 | case TYPE_U32: |
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| 226 | case TYPE_S32: |
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| 227 | return 32; |
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| 228 | case TYPE_F16: |
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| 229 | case TYPE_U16: |
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| 230 | case TYPE_S16: |
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| 231 | return 16; |
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| 232 | case TYPE_U8: |
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| 233 | case TYPE_S8: |
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| 234 | return 8; |
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| 235 | default: |
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| 236 | assert(0); /* invalid type */ |
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| 237 | return 0; |
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| 238 | } |
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| 239 | } |
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| 240 | |||
| 241 | static inline int type_float(type_t type) |
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| 242 | { |
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| 243 | return (type == TYPE_F32) || (type == TYPE_F16); |
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| 244 | } |
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| 245 | |||
| 246 | static inline int type_uint(type_t type) |
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| 247 | { |
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| 248 | return (type == TYPE_U32) || (type == TYPE_U16) || (type == TYPE_U8); |
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| 249 | } |
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| 250 | |||
| 251 | static inline int type_sint(type_t type) |
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| 252 | { |
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| 253 | return (type == TYPE_S32) || (type == TYPE_S16) || (type == TYPE_S8); |
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| 254 | } |
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| 255 | |||
| 256 | typedef union PACKED { |
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| 257 | /* normal gpr or const src register: */ |
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| 258 | struct PACKED { |
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| 259 | uint32_t comp : 2; |
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| 260 | uint32_t num : 10; |
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| 261 | }; |
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| 262 | /* for immediate val: */ |
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| 263 | int32_t iim_val : 11; |
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| 264 | /* to make compiler happy: */ |
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| 265 | uint32_t dummy32; |
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| 266 | uint32_t dummy10 : 10; |
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| 267 | uint32_t dummy11 : 11; |
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| 268 | uint32_t dummy12 : 12; |
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| 269 | uint32_t dummy13 : 13; |
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| 270 | uint32_t dummy8 : 8; |
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| 271 | } reg_t; |
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| 272 | |||
| 273 | /* special registers: */ |
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| 274 | #define REG_A0 61 /* address register */ |
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| 275 | #define REG_P0 62 /* predicate register */ |
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| 276 | |||
| 277 | static inline int reg_special(reg_t reg) |
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| 278 | { |
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| 279 | return (reg.num == REG_A0) || (reg.num == REG_P0); |
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| 280 | } |
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| 281 | |||
| 282 | typedef struct PACKED { |
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| 283 | /* dword0: */ |
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| 284 | int16_t immed : 16; |
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| 285 | uint32_t dummy1 : 16; |
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| 286 | |||
| 287 | /* dword1: */ |
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| 288 | uint32_t dummy2 : 8; |
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| 289 | uint32_t repeat : 3; |
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| 290 | uint32_t dummy3 : 1; |
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| 291 | uint32_t ss : 1; |
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| 292 | uint32_t dummy4 : 7; |
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| 293 | uint32_t inv : 1; |
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| 294 | uint32_t comp : 2; |
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| 295 | uint32_t opc : 4; |
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| 296 | uint32_t jmp_tgt : 1; |
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| 297 | uint32_t sync : 1; |
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| 298 | uint32_t opc_cat : 3; |
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| 299 | } instr_cat0_t; |
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| 300 | |||
| 301 | typedef struct PACKED { |
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| 302 | /* dword0: */ |
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| 303 | union PACKED { |
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| 304 | /* for normal src register: */ |
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| 305 | struct PACKED { |
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| 306 | uint32_t src : 11; |
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| 307 | /* at least low bit of pad must be zero or it will |
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| 308 | * look like a address relative src |
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| 309 | */ |
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| 310 | uint32_t pad : 21; |
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| 311 | }; |
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| 312 | /* for address relative: */ |
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| 313 | struct PACKED { |
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| 314 | int32_t off : 10; |
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| 315 | uint32_t src_rel_c : 1; |
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| 316 | uint32_t src_rel : 1; |
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| 317 | uint32_t unknown : 20; |
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| 318 | }; |
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| 319 | /* for immediate: */ |
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| 320 | int32_t iim_val; |
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| 321 | uint32_t uim_val; |
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| 322 | float fim_val; |
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| 323 | }; |
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| 324 | |||
| 325 | /* dword1: */ |
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| 326 | uint32_t dst : 8; |
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| 327 | uint32_t repeat : 3; |
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| 328 | uint32_t src_r : 1; |
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| 329 | uint32_t ss : 1; |
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| 330 | uint32_t ul : 1; |
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| 331 | uint32_t dst_type : 3; |
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| 332 | uint32_t dst_rel : 1; |
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| 333 | uint32_t src_type : 3; |
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| 334 | uint32_t src_c : 1; |
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| 335 | uint32_t src_im : 1; |
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| 336 | uint32_t even : 1; |
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| 337 | uint32_t pos_inf : 1; |
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| 338 | uint32_t must_be_0 : 2; |
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| 339 | uint32_t jmp_tgt : 1; |
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| 340 | uint32_t sync : 1; |
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| 341 | uint32_t opc_cat : 3; |
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| 342 | } instr_cat1_t; |
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| 343 | |||
| 344 | typedef struct PACKED { |
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| 345 | /* dword0: */ |
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| 346 | union PACKED { |
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| 347 | struct PACKED { |
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| 348 | uint32_t src1 : 11; |
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| 349 | uint32_t must_be_zero1: 2; |
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| 350 | uint32_t src1_im : 1; /* immediate */ |
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| 351 | uint32_t src1_neg : 1; /* negate */ |
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| 352 | uint32_t src1_abs : 1; /* absolute value */ |
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| 353 | }; |
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| 354 | struct PACKED { |
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| 355 | uint32_t src1 : 10; |
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| 356 | uint32_t src1_c : 1; /* relative-const */ |
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| 357 | uint32_t src1_rel : 1; /* relative address */ |
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| 358 | uint32_t must_be_zero : 1; |
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| 359 | uint32_t dummy : 3; |
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| 360 | } rel1; |
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| 361 | struct PACKED { |
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| 362 | uint32_t src1 : 12; |
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| 363 | uint32_t src1_c : 1; /* const */ |
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| 364 | uint32_t dummy : 3; |
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| 365 | } c1; |
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| 366 | }; |
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| 367 | |||
| 368 | union PACKED { |
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| 369 | struct PACKED { |
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| 370 | uint32_t src2 : 11; |
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| 371 | uint32_t must_be_zero2: 2; |
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| 372 | uint32_t src2_im : 1; /* immediate */ |
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| 373 | uint32_t src2_neg : 1; /* negate */ |
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| 374 | uint32_t src2_abs : 1; /* absolute value */ |
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| 375 | }; |
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| 376 | struct PACKED { |
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| 377 | uint32_t src2 : 10; |
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| 378 | uint32_t src2_c : 1; /* relative-const */ |
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| 379 | uint32_t src2_rel : 1; /* relative address */ |
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| 380 | uint32_t must_be_zero : 1; |
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| 381 | uint32_t dummy : 3; |
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| 382 | } rel2; |
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| 383 | struct PACKED { |
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| 384 | uint32_t src2 : 12; |
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| 385 | uint32_t src2_c : 1; /* const */ |
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| 386 | uint32_t dummy : 3; |
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| 387 | } c2; |
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| 388 | }; |
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| 389 | |||
| 390 | /* dword1: */ |
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| 391 | uint32_t dst : 8; |
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| 392 | uint32_t repeat : 3; |
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| 393 | uint32_t src1_r : 1; |
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| 394 | uint32_t ss : 1; |
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| 395 | uint32_t ul : 1; /* dunno */ |
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| 396 | uint32_t dst_half : 1; /* or widen/narrow.. ie. dst hrN <-> rN */ |
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| 397 | uint32_t ei : 1; |
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| 398 | uint32_t cond : 3; |
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| 399 | uint32_t src2_r : 1; |
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| 400 | uint32_t full : 1; /* not half */ |
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| 401 | uint32_t opc : 6; |
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| 402 | uint32_t jmp_tgt : 1; |
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| 403 | uint32_t sync : 1; |
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| 404 | uint32_t opc_cat : 3; |
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| 405 | } instr_cat2_t; |
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| 406 | |||
| 407 | typedef struct PACKED { |
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| 408 | /* dword0: */ |
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| 409 | union PACKED { |
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| 410 | struct PACKED { |
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| 411 | uint32_t src1 : 11; |
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| 412 | uint32_t must_be_zero1: 2; |
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| 413 | uint32_t src2_c : 1; |
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| 414 | uint32_t src1_neg : 1; |
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| 415 | uint32_t src2_r : 1; |
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| 416 | }; |
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| 417 | struct PACKED { |
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| 418 | uint32_t src1 : 10; |
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| 419 | uint32_t src1_c : 1; |
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| 420 | uint32_t src1_rel : 1; |
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| 421 | uint32_t must_be_zero : 1; |
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| 422 | uint32_t dummy : 3; |
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| 423 | } rel1; |
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| 424 | struct PACKED { |
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| 425 | uint32_t src1 : 12; |
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| 426 | uint32_t src1_c : 1; |
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| 427 | uint32_t dummy : 3; |
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| 428 | } c1; |
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| 429 | }; |
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| 430 | |||
| 431 | union PACKED { |
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| 432 | struct PACKED { |
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| 433 | uint32_t src3 : 11; |
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| 434 | uint32_t must_be_zero2: 2; |
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| 435 | uint32_t src3_r : 1; |
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| 436 | uint32_t src2_neg : 1; |
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| 437 | uint32_t src3_neg : 1; |
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| 438 | }; |
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| 439 | struct PACKED { |
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| 440 | uint32_t src3 : 10; |
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| 441 | uint32_t src3_c : 1; |
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| 442 | uint32_t src3_rel : 1; |
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| 443 | uint32_t must_be_zero : 1; |
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| 444 | uint32_t dummy : 3; |
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| 445 | } rel2; |
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| 446 | struct PACKED { |
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| 447 | uint32_t src3 : 12; |
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| 448 | uint32_t src3_c : 1; |
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| 449 | uint32_t dummy : 3; |
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| 450 | } c2; |
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| 451 | }; |
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| 452 | |||
| 453 | /* dword1: */ |
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| 454 | uint32_t dst : 8; |
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| 455 | uint32_t repeat : 3; |
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| 456 | uint32_t src1_r : 1; |
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| 457 | uint32_t ss : 1; |
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| 458 | uint32_t ul : 1; |
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| 459 | uint32_t dst_half : 1; /* or widen/narrow.. ie. dst hrN <-> rN */ |
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| 460 | uint32_t src2 : 8; |
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| 461 | uint32_t opc : 4; |
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| 462 | uint32_t jmp_tgt : 1; |
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| 463 | uint32_t sync : 1; |
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| 464 | uint32_t opc_cat : 3; |
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| 465 | } instr_cat3_t; |
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| 466 | |||
| 467 | static inline bool instr_cat3_full(instr_cat3_t *cat3) |
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| 468 | { |
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| 469 | switch (cat3->opc) { |
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| 470 | case OPC_MAD_F16: |
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| 471 | case OPC_MAD_U16: |
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| 472 | case OPC_MAD_S16: |
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| 473 | case OPC_SEL_B16: |
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| 474 | case OPC_SEL_S16: |
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| 475 | case OPC_SEL_F16: |
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| 476 | case OPC_SAD_S16: |
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| 477 | case OPC_SAD_S32: // really?? |
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| 478 | return false; |
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| 479 | default: |
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| 480 | return true; |
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| 481 | } |
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| 482 | } |
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| 483 | |||
| 484 | typedef struct PACKED { |
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| 485 | /* dword0: */ |
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| 486 | union PACKED { |
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| 487 | struct PACKED { |
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| 488 | uint32_t src : 11; |
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| 489 | uint32_t must_be_zero1: 2; |
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| 490 | uint32_t src_im : 1; /* immediate */ |
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| 491 | uint32_t src_neg : 1; /* negate */ |
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| 492 | uint32_t src_abs : 1; /* absolute value */ |
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| 493 | }; |
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| 494 | struct PACKED { |
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| 495 | uint32_t src : 10; |
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| 496 | uint32_t src_c : 1; /* relative-const */ |
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| 497 | uint32_t src_rel : 1; /* relative address */ |
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| 498 | uint32_t must_be_zero : 1; |
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| 499 | uint32_t dummy : 3; |
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| 500 | } rel; |
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| 501 | struct PACKED { |
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| 502 | uint32_t src : 12; |
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| 503 | uint32_t src_c : 1; /* const */ |
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| 504 | uint32_t dummy : 3; |
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| 505 | } c; |
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| 506 | }; |
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| 507 | uint32_t dummy1 : 16; /* seem to be ignored */ |
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| 508 | |||
| 509 | /* dword1: */ |
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| 510 | uint32_t dst : 8; |
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| 511 | uint32_t repeat : 3; |
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| 512 | uint32_t src_r : 1; |
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| 513 | uint32_t ss : 1; |
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| 514 | uint32_t ul : 1; |
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| 515 | uint32_t dst_half : 1; /* or widen/narrow.. ie. dst hrN <-> rN */ |
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| 516 | uint32_t dummy2 : 5; /* seem to be ignored */ |
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| 517 | uint32_t full : 1; /* not half */ |
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| 518 | uint32_t opc : 6; |
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| 519 | uint32_t jmp_tgt : 1; |
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| 520 | uint32_t sync : 1; |
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| 521 | uint32_t opc_cat : 3; |
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| 522 | } instr_cat4_t; |
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| 523 | |||
| 524 | typedef struct PACKED { |
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| 525 | /* dword0: */ |
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| 526 | union PACKED { |
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| 527 | /* normal case: */ |
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| 528 | struct PACKED { |
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| 529 | uint32_t full : 1; /* not half */ |
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| 530 | uint32_t src1 : 8; |
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| 531 | uint32_t src2 : 8; |
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| 532 | uint32_t dummy1 : 4; /* seem to be ignored */ |
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| 533 | uint32_t samp : 4; |
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| 534 | uint32_t tex : 7; |
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| 535 | } norm; |
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| 536 | /* s2en case: */ |
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| 537 | struct PACKED { |
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| 538 | uint32_t full : 1; /* not half */ |
||
| 539 | uint32_t src1 : 8; |
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| 540 | uint32_t src2 : 11; |
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| 541 | uint32_t dummy1 : 1; |
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| 542 | uint32_t src3 : 8; |
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| 543 | uint32_t dummy2 : 3; |
||
| 544 | } s2en; |
||
| 545 | /* same in either case: */ |
||
| 546 | // XXX I think, confirm this |
||
| 547 | struct PACKED { |
||
| 548 | uint32_t full : 1; /* not half */ |
||
| 549 | uint32_t src1 : 8; |
||
| 550 | uint32_t pad : 23; |
||
| 551 | }; |
||
| 552 | }; |
||
| 553 | |||
| 554 | /* dword1: */ |
||
| 555 | uint32_t dst : 8; |
||
| 556 | uint32_t wrmask : 4; /* write-mask */ |
||
| 557 | uint32_t type : 3; |
||
| 558 | uint32_t dummy2 : 1; /* seems to be ignored */ |
||
| 559 | uint32_t is_3d : 1; |
||
| 560 | |||
| 561 | uint32_t is_a : 1; |
||
| 562 | uint32_t is_s : 1; |
||
| 563 | uint32_t is_s2en : 1; |
||
| 564 | uint32_t is_o : 1; |
||
| 565 | uint32_t is_p : 1; |
||
| 566 | |||
| 567 | uint32_t opc : 5; |
||
| 568 | uint32_t jmp_tgt : 1; |
||
| 569 | uint32_t sync : 1; |
||
| 570 | uint32_t opc_cat : 3; |
||
| 571 | } instr_cat5_t; |
||
| 572 | |||
| 573 | /* [src1 + off], src2: */ |
||
| 574 | typedef struct PACKED { |
||
| 575 | /* dword0: */ |
||
| 576 | uint32_t mustbe1 : 1; |
||
| 577 | int32_t off : 13; |
||
| 578 | uint32_t src1 : 8; |
||
| 579 | uint32_t src1_im : 1; |
||
| 580 | uint32_t src2_im : 1; |
||
| 581 | uint32_t src2 : 8; |
||
| 582 | |||
| 583 | /* dword1: */ |
||
| 584 | uint32_t dst : 8; |
||
| 585 | uint32_t dummy2 : 9; |
||
| 586 | uint32_t type : 3; |
||
| 587 | uint32_t dummy3 : 2; |
||
| 588 | uint32_t opc : 5; |
||
| 589 | uint32_t jmp_tgt : 1; |
||
| 590 | uint32_t sync : 1; |
||
| 591 | uint32_t opc_cat : 3; |
||
| 592 | } instr_cat6a_t; |
||
| 593 | |||
| 594 | /* [src1], src2: */ |
||
| 595 | typedef struct PACKED { |
||
| 596 | /* dword0: */ |
||
| 597 | uint32_t mustbe0 : 1; |
||
| 598 | uint32_t src1 : 8; |
||
| 599 | uint32_t ignore0 : 13; |
||
| 600 | uint32_t src1_im : 1; |
||
| 601 | uint32_t src2_im : 1; |
||
| 602 | uint32_t src2 : 8; |
||
| 603 | |||
| 604 | /* dword1: */ |
||
| 605 | uint32_t dst : 8; |
||
| 606 | uint32_t dummy2 : 9; |
||
| 607 | uint32_t type : 3; |
||
| 608 | uint32_t dummy3 : 2; |
||
| 609 | uint32_t opc : 5; |
||
| 610 | uint32_t jmp_tgt : 1; |
||
| 611 | uint32_t sync : 1; |
||
| 612 | uint32_t opc_cat : 3; |
||
| 613 | } instr_cat6b_t; |
||
| 614 | |||
| 615 | /* I think some of the other cat6 instructions use additional |
||
| 616 | * sub-encodings.. |
||
| 617 | */ |
||
| 618 | |||
| 619 | typedef union PACKED { |
||
| 620 | instr_cat6a_t a; |
||
| 621 | instr_cat6b_t b; |
||
| 622 | struct PACKED { |
||
| 623 | /* dword0: */ |
||
| 624 | uint32_t has_off : 1; |
||
| 625 | uint32_t pad1 : 31; |
||
| 626 | |||
| 627 | /* dword1: */ |
||
| 628 | uint32_t dst : 8; |
||
| 629 | uint32_t dummy2 : 9; |
||
| 630 | uint32_t type : 3; |
||
| 631 | uint32_t dummy3 : 2; |
||
| 632 | uint32_t opc : 5; |
||
| 633 | uint32_t jmp_tgt : 1; |
||
| 634 | uint32_t sync : 1; |
||
| 635 | uint32_t opc_cat : 3; |
||
| 636 | }; |
||
| 637 | } instr_cat6_t; |
||
| 638 | |||
| 639 | typedef union PACKED { |
||
| 640 | instr_cat0_t cat0; |
||
| 641 | instr_cat1_t cat1; |
||
| 642 | instr_cat2_t cat2; |
||
| 643 | instr_cat3_t cat3; |
||
| 644 | instr_cat4_t cat4; |
||
| 645 | instr_cat5_t cat5; |
||
| 646 | instr_cat6_t cat6; |
||
| 647 | struct PACKED { |
||
| 648 | /* dword0: */ |
||
| 649 | uint64_t pad1 : 40; |
||
| 650 | uint32_t repeat : 3; /* cat0-cat4 */ |
||
| 651 | uint32_t pad2 : 1; |
||
| 652 | uint32_t ss : 1; /* cat1-cat4 (cat0??) */ |
||
| 653 | uint32_t ul : 1; /* cat2-cat4 (and cat1 in blob.. which may be bug??) */ |
||
| 654 | uint32_t pad3 : 13; |
||
| 655 | uint32_t jmp_tgt : 1; |
||
| 656 | uint32_t sync : 1; |
||
| 657 | uint32_t opc_cat : 3; |
||
| 658 | |||
| 659 | }; |
||
| 660 | } instr_t; |
||
| 661 | |||
| 662 | static inline uint32_t instr_opc(instr_t *instr) |
||
| 663 | { |
||
| 664 | switch (instr->opc_cat) { |
||
| 665 | case 0: return instr->cat0.opc; |
||
| 666 | case 1: return 0; |
||
| 667 | case 2: return instr->cat2.opc; |
||
| 668 | case 3: return instr->cat3.opc; |
||
| 669 | case 4: return instr->cat4.opc; |
||
| 670 | case 5: return instr->cat5.opc; |
||
| 671 | case 6: return instr->cat6.opc; |
||
| 672 | default: return 0; |
||
| 673 | } |
||
| 674 | } |
||
| 675 | |||
| 676 | static inline bool is_mad(opc_t opc) |
||
| 677 | { |
||
| 678 | switch (opc) { |
||
| 679 | case OPC_MAD_U16: |
||
| 680 | case OPC_MAD_S16: |
||
| 681 | case OPC_MAD_U24: |
||
| 682 | case OPC_MAD_S24: |
||
| 683 | case OPC_MAD_F16: |
||
| 684 | case OPC_MAD_F32: |
||
| 685 | return true; |
||
| 686 | default: |
||
| 687 | return false; |
||
| 688 | } |
||
| 689 | } |
||
| 690 | |||
| 691 | static inline bool is_madsh(opc_t opc) |
||
| 692 | { |
||
| 693 | switch (opc) { |
||
| 694 | case OPC_MADSH_U16: |
||
| 695 | case OPC_MADSH_M16: |
||
| 696 | return true; |
||
| 697 | default: |
||
| 698 | return false; |
||
| 699 | } |
||
| 700 | } |
||
| 701 | |||
| 702 | #endif /* INSTR_A3XX_H_ */ |