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4304 | Serge | 1 | /* |
2 | * Copyright (c) 2013 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, |
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20 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE |
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21 | * SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Chris Wilson |
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25 | * |
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26 | */ |
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27 | |||
28 | /* Small wrapper around compiler specific implementation details of cpuid */ |
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29 | |||
30 | #ifndef SNA_CPUID_H |
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31 | #define SNA_CPUID_H |
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32 | |||
33 | #include "compiler.h" |
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34 | |||
35 | #if HAS_GCC(4, 4) /* for __cpuid_count() */ |
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36 | #include |
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37 | #else |
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38 | #define __get_cpuid_max(x, y) 0 |
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39 | #define __cpuid(level, a, b, c, d) |
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40 | #define __cpuid_count(level, count, a, b, c, d) |
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41 | #endif |
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42 | |||
43 | #define BASIC_CPUID 0x0 |
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44 | #define EXTENDED_CPUID 0x80000000 |
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45 | |||
46 | #ifndef bit_MMX |
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47 | #define bit_MMX (1 << 23) |
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48 | #endif |
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49 | |||
50 | #ifndef bit_SSE |
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51 | #define bit_SSE (1 << 25) |
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52 | #endif |
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53 | |||
54 | #ifndef bit_SSE2 |
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55 | #define bit_SSE2 (1 << 26) |
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56 | #endif |
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57 | |||
58 | #ifndef bit_SSE3 |
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59 | #define bit_SSE3 (1 << 0) |
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60 | #endif |
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61 | |||
62 | #ifndef bit_SSSE3 |
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63 | #define bit_SSSE3 (1 << 9) |
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64 | #endif |
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65 | |||
66 | #ifndef bit_SSE4_1 |
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67 | #define bit_SSE4_1 (1 << 19) |
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68 | #endif |
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69 | |||
70 | #ifndef bit_SSE4_2 |
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71 | #define bit_SSE4_2 (1 << 20) |
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72 | #endif |
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73 | |||
74 | #ifndef bit_OSXSAVE |
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75 | #define bit_OSXSAVE (1 << 27) |
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76 | #endif |
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77 | |||
78 | #ifndef bit_AVX |
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79 | #define bit_AVX (1 << 28) |
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80 | #endif |
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81 | |||
82 | #ifndef bit_AVX2 |
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83 | #define bit_AVX2 (1<<5) |
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84 | #endif |
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85 | |||
86 | #endif /* SNA_CPUID_H */5) |