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1901 serge 1
/*
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 * Copyright © 2010 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
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 * DEALINGS IN THE SOFTWARE.
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 */
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/**
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 * \file lower_if_to_cond_assign.cpp
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 *
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 * This attempts to flatten if-statements to conditional assignments for
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 * GPUs with limited or no flow control support.
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 *
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 * It can't handle other control flow being inside of its block, such
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 * as calls or loops.  Hopefully loop unrolling and inlining will take
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 * care of those.
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 *
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 * Drivers for GPUs with no control flow support should simply call
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 *
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 *    lower_if_to_cond_assign(instructions)
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 *
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 * to attempt to flatten all if-statements.
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 *
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 * Some GPUs (such as i965 prior to gen6) do support control flow, but have a
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 * maximum nesting depth N.  Drivers for such hardware can call
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 *
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 *    lower_if_to_cond_assign(instructions, N)
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 *
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 * to attempt to flatten any if-statements appearing at depth > N.
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 */
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#include "glsl_types.h"
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#include "ir.h"
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class ir_if_to_cond_assign_visitor : public ir_hierarchical_visitor {
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public:
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   ir_if_to_cond_assign_visitor(unsigned max_depth)
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   {
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      this->progress = false;
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      this->max_depth = max_depth;
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      this->depth = 0;
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   }
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   ir_visitor_status visit_enter(ir_if *);
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   ir_visitor_status visit_leave(ir_if *);
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   bool progress;
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   unsigned max_depth;
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   unsigned depth;
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};
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bool
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lower_if_to_cond_assign(exec_list *instructions, unsigned max_depth)
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{
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   ir_if_to_cond_assign_visitor v(max_depth);
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   visit_list_elements(&v, instructions);
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   return v.progress;
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}
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void
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check_control_flow(ir_instruction *ir, void *data)
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{
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   bool *found_control_flow = (bool *)data;
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   switch (ir->ir_type) {
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   case ir_type_call:
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   case ir_type_discard:
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   case ir_type_loop:
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   case ir_type_loop_jump:
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   case ir_type_return:
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      *found_control_flow = true;
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      break;
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   default:
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      break;
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   }
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}
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void
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move_block_to_cond_assign(void *mem_ctx,
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			  ir_if *if_ir, ir_variable *cond_var, bool then)
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{
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   exec_list *instructions;
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   if (then) {
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      instructions = &if_ir->then_instructions;
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   } else {
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      instructions = &if_ir->else_instructions;
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   }
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   foreach_iter(exec_list_iterator, iter, *instructions) {
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      ir_instruction *ir = (ir_instruction *)iter.get();
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      if (ir->ir_type == ir_type_assignment) {
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	 ir_assignment *assign = (ir_assignment *)ir;
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	 ir_rvalue *cond_expr;
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	 ir_dereference *deref = new(mem_ctx) ir_dereference_variable(cond_var);
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	 if (then) {
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	    cond_expr = deref;
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	 } else {
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	    cond_expr = new(mem_ctx) ir_expression(ir_unop_logic_not,
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						   glsl_type::bool_type,
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						   deref,
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						   NULL);
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	 }
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	 if (!assign->condition) {
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	    assign->condition = cond_expr;
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	 } else {
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	    assign->condition = new(mem_ctx) ir_expression(ir_binop_logic_and,
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							   glsl_type::bool_type,
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							   cond_expr,
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							   assign->condition);
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	 }
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      }
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      /* Now, move from the if block to the block surrounding it. */
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      ir->remove();
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      if_ir->insert_before(ir);
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   }
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}
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ir_visitor_status
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ir_if_to_cond_assign_visitor::visit_enter(ir_if *ir)
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{
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   (void) ir;
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   this->depth++;
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   return visit_continue;
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}
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ir_visitor_status
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ir_if_to_cond_assign_visitor::visit_leave(ir_if *ir)
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{
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   /* Only flatten when beyond the GPU's maximum supported nesting depth. */
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   if (this->depth <= this->max_depth)
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      return visit_continue;
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   this->depth--;
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   bool found_control_flow = false;
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   ir_variable *cond_var;
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   ir_assignment *assign;
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   ir_dereference_variable *deref;
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   /* Check that both blocks don't contain anything we can't support. */
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   foreach_iter(exec_list_iterator, then_iter, ir->then_instructions) {
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      ir_instruction *then_ir = (ir_instruction *)then_iter.get();
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      visit_tree(then_ir, check_control_flow, &found_control_flow);
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   }
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   foreach_iter(exec_list_iterator, else_iter, ir->else_instructions) {
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      ir_instruction *else_ir = (ir_instruction *)else_iter.get();
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      visit_tree(else_ir, check_control_flow, &found_control_flow);
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   }
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   if (found_control_flow)
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      return visit_continue;
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   void *mem_ctx = ralloc_parent(ir);
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   /* Store the condition to a variable so the assignment conditions are
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    * simpler.
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    */
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   cond_var = new(mem_ctx) ir_variable(glsl_type::bool_type,
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				       "if_to_cond_assign_condition",
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				       ir_var_temporary);
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   ir->insert_before(cond_var);
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   deref = new(mem_ctx) ir_dereference_variable(cond_var);
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   assign = new(mem_ctx) ir_assignment(deref,
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				       ir->condition, NULL);
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   ir->insert_before(assign);
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   /* Now, move all of the instructions out of the if blocks, putting
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    * conditions on assignments.
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    */
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   move_block_to_cond_assign(mem_ctx, ir, cond_var, true);
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   move_block_to_cond_assign(mem_ctx, ir, cond_var, false);
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   ir->remove();
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   this->progress = true;
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   return visit_continue;
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}