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7405 | pavelyakov | 1 | // version 0.01 |
2 | // Author: Pavel Iakovlev |
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3 | |||
4 | |||
5 | #pragma option OST |
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6 | #pragma option ON |
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7 | #pragma option cri- |
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8 | #pragma option -CPA |
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9 | #initallvar 0 |
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10 | #jumptomain FALSE |
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11 | |||
12 | #startaddress 0x10000 |
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13 | |||
14 | #code32 TRUE |
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15 | |||
16 | char os_name[8] = {'M','E','N','U','E','T','0','1'}; |
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17 | dword os_version = 0x00000001; |
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18 | dword start_addr = #main; |
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19 | dword final_addr = #______STOP______+32; |
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20 | dword alloc_mem = 20000; |
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21 | dword x86esp_reg = 20000; |
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22 | dword I_Param = #param; |
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23 | dword I_Path = #program_path; |
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24 | char param[4096] ={0}; |
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25 | char program_path[4096] = {0}; |
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26 | |||
27 | dword test_bytecode = "\x05\x10\x82\xe2\x07\x30\x82\xe2\x03\x20\x81\xe0"; // test opcode arm |
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28 | |||
29 | struct _reg // registers arm |
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30 | { |
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31 | dword r0; |
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32 | dword r1; |
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33 | dword r2; |
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34 | dword r3; |
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35 | dword r4; |
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36 | dword r5; |
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37 | dword r6; |
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38 | dword r7; |
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39 | dword r8; |
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40 | dword r9; |
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41 | dword r10; |
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42 | dword r11; |
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43 | dword r12; // (Intra-Procedure-call scratch register) |
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44 | dword r13; // (Stack Pointer) |
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45 | dword r14; // (Link Register) |
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46 | dword r15; // PC (Program Counter) |
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47 | }; |
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48 | |||
49 | _reg reg = {0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0}; // clear and init registers |
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50 | dword REG = #reg; |
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51 | |||
52 | struct _flags |
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53 | { |
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54 | byte negative; |
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55 | byte zero; |
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56 | byte carry; |
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57 | byte overflow; |
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58 | }; |
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59 | |||
60 | _flags flags = {0,0,0,0}; // clear and init flags |
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61 | |||
62 | struct _mode |
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63 | { |
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64 | byte User; |
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65 | byte FastInterrupt; |
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66 | byte Interrupt; |
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67 | byte Supervisor; |
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68 | }; |
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69 | |||
70 | _mode mode = {0,0,0,0}; // processor mode |
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71 | |||
72 | struct _mask |
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73 | { |
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74 | byte IRQ; |
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75 | byte FIRQ; |
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76 | }; |
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77 | |||
78 | _mask mask = {0,0}; // processor mask |
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79 | |||
80 | void main() |
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81 | { |
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82 | |||
83 | callOpcode(#test_bytecode,3); |
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84 | |||
85 | EAX = -1; |
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86 | $int 0x40; |
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87 | } |
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88 | |||
89 | dword callOpcode(dword binary, lengthInstruction) |
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90 | { |
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91 | dword command = 0; |
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92 | dword PC = 0; |
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93 | byte flag = 0; |
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94 | byte pMask = 0; |
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95 | byte pMode = 0; |
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96 | while(lengthInstruction) |
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97 | { |
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98 | PC = reg.r15 >> 2 & 0xFFFFFF; |
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99 | flag = reg.r15 >> 28; |
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100 | pMask = reg.r15 >> 26; |
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101 | |||
102 | flags.negative = flag & 0x8; |
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103 | flags.zero = flag & 0x4; |
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104 | flags.carry = flag & 0x2; |
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105 | flags.overflow = flag & 0x1; |
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106 | |||
107 | mask.IRQ = pMask & 0x2; |
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108 | mask.FIRQ = pMask & 0x1; |
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109 | |||
110 | switch(reg.r15 & 3) |
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111 | { |
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112 | case 0: |
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113 | DSDWORD[#mode] = 0x000000FF; |
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114 | break; |
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115 | case 1: |
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116 | DSDWORD[#mode] = 0x0000FF00; |
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117 | break; |
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118 | case 2: |
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119 | DSDWORD[#mode] = 0x00FF0000; |
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120 | break; |
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121 | case 3: |
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122 | DSDWORD[#mode] = 0xFF000000; |
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123 | break; |
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124 | } |
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125 | |||
126 | command = DSDWORD[binary + PC]; // generation PC instruction |
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127 | //EAX = DSDWORD[command >> 28 << 2 + #opcodeExec]; // get opcodeExecition call instruction |
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128 | //EAX(command); // call opcodeExecition |
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129 | //IF (command & 0xC000000 == 0) opcodeExec0(command); |
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130 | IF (command & 0x0FFFFFF0 == 0x12FFF10) BranchExchange(command); |
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131 | ELSE IF (command & 0x0FF00FF0 == 0x1000090) SingleDataSwap(command); |
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132 | ELSE IF (command & 0x0FC000F0 == 0x0000090) Multiply(command); |
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133 | ELSE IF (command & 0x0FC000F0 == 0x0800090) MultiplyLong(command); |
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134 | ELSE IF (command & 0x0C000000 == 0x0000000) DataProcessing(command); |
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135 | |||
136 | PC += 4; // addition 4 for reg15 or PC instruction |
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137 | PC <<= 2; |
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138 | |||
139 | flag = 0; |
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140 | IF (flags.negative) flag |= 0x8; |
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141 | IF (flags.zero) flag |= 0x4; |
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142 | IF (flags.carry) flag |= 0x2; |
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143 | IF (flags.overflow) flag |= 0x1; |
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144 | |||
145 | pMask = 0; |
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146 | IF (mask.IRQ) pMask |= 0x2; |
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147 | IF (mask.FIRQ) pMask |= 0x1; |
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148 | |||
149 | IF (mode.User) pMode = 0; |
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150 | ELSE IF (mode.FastInterrupt) pMode = 1; |
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151 | ELSE IF (mode.Interrupt) pMode = 2; |
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152 | ELSE IF (mode.Supervisor) pMode = 3; |
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153 | |||
154 | reg.r15 = flag << 28 | PC | pMode; |
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155 | lengthInstruction--; |
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156 | } |
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157 | } |
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158 | |||
159 | dword Multiply(dword command) |
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160 | { |
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161 | |||
162 | } |
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163 | |||
164 | dword MultiplyLong(dword command) |
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165 | { |
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166 | |||
167 | } |
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168 | |||
169 | dword SingleDataSwap(dword command) |
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170 | { |
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171 | |||
172 | } |
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173 | |||
174 | dword BranchExchange(dword command) |
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175 | { |
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176 | |||
177 | } |
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178 | |||
179 | dword DataProcessing(dword command) // Data Processing / PSR Transfer |
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180 | { |
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181 | dword opcode = 0; |
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182 | dword Rd = #reg; |
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183 | dword Rn = #reg; |
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184 | dword operand = 0; |
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185 | opcode = command >> 21 & 0xF; |
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186 | Rd += command >> 12 & 0xF << 2; |
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187 | Rn += command >> 16 & 0xF << 2; |
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188 | operand = command & 0xFFF; |
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189 | |||
190 | IF (command & 0x2000000 == 0) |
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191 | { |
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192 | operand = DSDWORD[operand << 2 + #reg]; |
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193 | } |
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194 | |||
195 | switch (opcode) |
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196 | { |
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197 | case 0: // and |
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198 | DSDWORD[Rd] = DSDWORD[Rn] & operand; |
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199 | break; |
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200 | case 1: // eor |
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201 | DSDWORD[Rd] = DSDWORD[Rn] | operand; |
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202 | break; |
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203 | case 2: // sub |
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204 | DSDWORD[Rd] = DSDWORD[Rn] - operand; |
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205 | break; |
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206 | case 3: // rsb |
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207 | DSDWORD[Rd] = operand - DSDWORD[Rn]; |
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208 | break; |
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209 | case 4: // add |
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210 | DSDWORD[Rd] = DSDWORD[Rn] + operand; |
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211 | break; |
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212 | } |
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213 | IF(reg.r2 == 12) while(1); |
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214 | } |
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215 | |||
216 | |||
217 | |||
218 | ______STOP______:><>><>><>><>=><=>><> |