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Rev Author Line No. Line
4850 mario79 1
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
2
;;                                                              ;;
10051 ace_dent 3
;; Copyright (C) KolibriOS team 2014-2024. All rights reserved. ;;
4850 mario79 4
;; Distributed under terms of the GNU General Public License    ;;
5
;;                                                              ;;
6
;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;
7
 
8
 
4624 mario79 9
;-----------------------------------------------------------------------------
10
; find the IDE controller in the device list
11
;-----------------------------------------------------------------------------
4700 mario79 12
        mov     ecx, IDE_controller_1
4624 mario79 13
        mov     esi, pcidev_list
4700 mario79 14
;--------------------------------------
15
align 4
4624 mario79 16
.loop:
17
        mov     esi, [esi+PCIDEV.fd]
18
        cmp     esi, pcidev_list
4700 mario79 19
        jz      find_IDE_controller_done
20
 
4624 mario79 21
        mov     eax, [esi+PCIDEV.class]
5147 mario79 22
;        shr     eax, 4
23
;        cmp     eax, 0x01018
24
        shr     eax, 7
25
        cmp     eax, 0x010180 shr 7
4624 mario79 26
        jnz     .loop
4700 mario79 27
;--------------------------------------
4624 mario79 28
.found:
29
        mov     eax, [esi+PCIDEV.class]
30
        DEBUGF  1, 'K : IDE controller programming interface %x\n', eax
4700 mario79 31
        mov     [ecx+IDE_DATA.ProgrammingInterface], eax
6816 dunkaist 32
        mov     [ecx+IDE_DATA.pcidev], esi
4624 mario79 33
 
34
        mov     ah, [esi+PCIDEV.bus]
35
        mov     al, 2
36
        mov     bh, [esi+PCIDEV.devfn]
4700 mario79 37
;--------------------------------------
4841 clevermous 38
        mov     dx, 0x1F0
39
        test    byte [esi+PCIDEV.class], 1
40
        jz      @f
4624 mario79 41
        mov     bl, 0x10
42
        push    eax
43
        call    pci_read_reg
44
        and     eax, 0xFFFC
4841 clevermous 45
        mov     edx, eax
46
        pop     eax
4624 mario79 47
@@:
4841 clevermous 48
        DEBUGF  1, 'K : BAR0 IDE base addr %x\n', dx
49
        mov     [StandardATABases], dx
50
        mov     [ecx+IDE_DATA.BAR0_val], dx
4700 mario79 51
;--------------------------------------
4841 clevermous 52
        mov     dx, 0x3F4
53
        test    byte [esi+PCIDEV.class], 1
54
        jz      @f
4624 mario79 55
        mov     bl, 0x14
56
        push    eax
57
        call    pci_read_reg
58
        and     eax, 0xFFFC
4841 clevermous 59
        mov     edx, eax
60
        pop     eax
4624 mario79 61
@@:
4841 clevermous 62
        DEBUGF  1, 'K : BAR1 IDE base addr %x\n', dx
63
        mov     [ecx+IDE_DATA.BAR1_val], dx
4700 mario79 64
;--------------------------------------
4841 clevermous 65
        mov     dx, 0x170
66
        test    byte [esi+PCIDEV.class], 4
67
        jz      @f
4624 mario79 68
        mov     bl, 0x18
69
        push    eax
70
        call    pci_read_reg
71
        and     eax, 0xFFFC
4841 clevermous 72
        mov     edx, eax
73
        pop     eax
4624 mario79 74
@@:
4841 clevermous 75
        DEBUGF  1, 'K : BAR2 IDE base addr %x\n', dx
76
        mov     [StandardATABases+2], dx
77
        mov     [ecx+IDE_DATA.BAR2_val], dx
4700 mario79 78
;--------------------------------------
4841 clevermous 79
        mov     dx, 0x374
80
        test    byte [esi+PCIDEV.class], 4
81
        jz      @f
4624 mario79 82
        mov     bl, 0x1C
83
        push    eax
84
        call    pci_read_reg
85
        and     eax, 0xFFFC
4841 clevermous 86
        mov     edx, eax
87
        pop     eax
4624 mario79 88
@@:
4841 clevermous 89
        DEBUGF  1, 'K : BAR3 IDE base addr %x\n', dx
90
        mov     [ecx+IDE_DATA.BAR3_val], dx
4700 mario79 91
;--------------------------------------
4624 mario79 92
        mov     bl, 0x20
93
        push    eax
94
        call    pci_read_reg
95
        and     eax, 0xFFFC
96
        DEBUGF  1, 'K : BAR4 IDE controller register base addr %x\n', ax
4700 mario79 97
        mov     [ecx+IDE_DATA.RegsBaseAddres], ax
4624 mario79 98
        pop     eax
4700 mario79 99
;--------------------------------------
4624 mario79 100
        mov     bl, 0x3C
101
        push    eax
102
        call    pci_read_reg
103
        and     eax, 0xFF
104
        DEBUGF  1, 'K : IDE Interrupt %x\n', al
4700 mario79 105
        mov     [ecx+IDE_DATA.Interrupt], ax
4624 mario79 106
        pop     eax
4700 mario79 107
 
108
        add     ecx, sizeof.IDE_DATA
109
;--------------------------------------
110
        jmp     .loop
4624 mario79 111
;-----------------------------------------------------------------------------
4700 mario79 112
uglobal
113
align 4
114
;--------------------------------------
115
IDE_controller_pointer dd ?
116
;--------------------------------------
117
IDE_controller_1 IDE_DATA
118
IDE_controller_2 IDE_DATA
119
IDE_controller_3 IDE_DATA
120
;--------------------------------------
121
cache_ide0  IDE_CACHE
122
cache_ide1  IDE_CACHE
123
cache_ide2  IDE_CACHE
124
cache_ide3  IDE_CACHE
125
cache_ide4  IDE_CACHE
126
cache_ide5  IDE_CACHE
127
cache_ide6  IDE_CACHE
128
cache_ide7  IDE_CACHE
129
cache_ide8  IDE_CACHE
130
cache_ide9  IDE_CACHE
131
cache_ide10 IDE_CACHE
132
cache_ide11 IDE_CACHE
133
;--------------------------------------
4772 mario79 134
IDE_device_1 rd 2
135
IDE_device_2 rd 2
136
IDE_device_3 rd 2
137
;--------------------------------------
4700 mario79 138
endg
6816 dunkaist 139
 
140
;--------------------------------------
141
; set Bus Master bit of Command PCI register
142
;--------------------------------------
143
set_pci_command_bus_master:
144
PCI_COMMAND_BUS_MASTER = 0x0004
145
        push    eax ecx
146
 
147
        mov     ecx, [ecx+IDE_DATA.pcidev]
148
        mov     ah, [ecx+PCIDEV.bus]
149
        mov     al, 1   ; word
150
        mov     bh, [ecx+PCIDEV.devfn]
151
        mov     bl, 0x4 ; Command register
152
        push    eax
153
        call    pci_read_reg
154
        mov     ecx, eax
155
        pop     eax
156
        test    ecx, PCI_COMMAND_BUS_MASTER     ; already set?
157
        jnz     @f
158
        or      ecx, PCI_COMMAND_BUS_MASTER
159
        call    pci_write_reg
160
@@:
161
        pop     ecx eax
162
        ret
163
 
4624 mario79 164
;-----------------------------------------------------------------------------
165
; START of initialisation IDE ATA code
166
;-----------------------------------------------------------------------------
4700 mario79 167
Init_IDE_ATA_controller:
168
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
4720 mario79 169
        jne     @f
4624 mario79 170
 
4720 mario79 171
        ret
172
;--------------------------------------
173
@@:
4624 mario79 174
        mov     esi, boot_disabling_ide
175
        call    boot_log
176
;--------------------------------------
177
; Disable IDE interrupts, because the search
178
; for IDE partitions is in the PIO mode.
179
;--------------------------------------
180
.disable_IDE_interrupt:
181
; Disable interrupts in IDE controller for PIO
182
        mov     al, 2
4700 mario79 183
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
4624 mario79 184
        add     dx, 2 ;0x3F6
185
        out     dx, al
4700 mario79 186
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
4624 mario79 187
        add     dx, 2 ;0x376
188
        out     dx, al
4700 mario79 189
;-----------------------------------------------------------------------------
190
; set current ata bases
4624 mario79 191
@@:
4700 mario79 192
        mov     ax, [ecx+IDE_DATA.BAR0_val]
193
        mov     [StandardATABases], ax
194
        mov     ax, [ecx+IDE_DATA.BAR2_val]
195
        mov     [StandardATABases+2], ax
196
 
4624 mario79 197
        mov     esi, boot_detecthdcd
198
        call    boot_log
4720 mario79 199
;--------------------------------------
4625 mario79 200
include 'dev_hdcd.inc'
4720 mario79 201
;--------------------------------------
202
        ret
4624 mario79 203
;-----------------------------------------------------------------------------
4720 mario79 204
Init_IDE_ATA_controller_2:
205
        cmp     [ecx+IDE_DATA.ProgrammingInterface], 0
206
        jne     @f
207
 
208
        ret
209
;--------------------------------------
210
@@:
4700 mario79 211
        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
4624 mario79 212
; test whether it is our interrupt?
213
        add     dx, 2
214
        in      al, dx
215
        test    al, 100b
216
        jz      @f
217
; clear Bus Master IDE Status register
218
; clear Interrupt bit
219
        out     dx, al
4700 mario79 220
;--------------------------------------
4624 mario79 221
@@:
222
        add     dx, 8
223
; test whether it is our interrupt?
224
        in      al, dx
225
        test    al, 100b
226
        jz      @f
227
; clear Bus Master IDE Status register
228
; clear Interrupt bit
229
        out     dx, al
4700 mario79 230
;--------------------------------------
4624 mario79 231
@@:
232
; read status register and remove the interrupt request
4700 mario79 233
        mov     dx, [ecx+IDE_DATA.BAR0_val] ;0x1F0
4624 mario79 234
        add     dx, 0x7 ;0x1F7
235
        in      al, dx
4700 mario79 236
        mov     dx, [ecx+IDE_DATA.BAR2_val] ;0x170
4624 mario79 237
        add     dx, 0x7 ;0x177
238
        in      al, dx
239
;-----------------------------------------------------------------------------
4720 mario79 240
;        push    eax edx
241
;        mov     dx, [ecx+IDE_DATA.RegsBaseAddres]
242
;        xor     eax, eax
243
;        add     dx, 2
244
;        in      al, dx
4711 mario79 245
;        DEBUGF  1, "K : Primary Bus Master IDE Status Register %x\n", eax
4624 mario79 246
 
4720 mario79 247
;        add     dx, 8
248
;        in      al, dx
4711 mario79 249
;        DEBUGF  1, "K : Secondary Bus Master IDE Status Register %x\n", eax
4720 mario79 250
;        pop     edx eax
4624 mario79 251
 
4720 mario79 252
;        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
253
;        setnz   [ecx+IDE_DATA.dma_hdd]
4624 mario79 254
;-----------------------------------------------------------------------------
255
; set interrupts for IDE Controller
256
;-----------------------------------------------------------------------------
4838 mario79 257
        pushfd
258
        cli
4624 mario79 259
.enable_IDE_interrupt:
260
        mov     esi, boot_enabling_ide
261
        call    boot_log
262
; Enable interrupts in IDE controller for DMA
4700 mario79 263
        xor     ebx, ebx
264
        cmp     ecx, IDE_controller_2
265
        jne     @f
266
 
267
        add     ebx, 5
268
        jmp     .check_DRIVE_DATA
269
;--------------------------------------
270
@@:
271
        cmp     ecx, IDE_controller_3
272
        jne     .check_DRIVE_DATA
273
 
274
        add     ebx, 10
275
;--------------------------------------
276
.check_DRIVE_DATA:
4624 mario79 277
        mov     al, 0
4700 mario79 278
        mov     ah, [ebx+DRIVE_DATA+1]
4772 mario79 279
        test    ah, 10100000b ; check for ATAPI devices
4624 mario79 280
        jz      @f
4772 mario79 281
;--------------------------------------
282
.ch1_pio_set_ATAPI:
4624 mario79 283
        DEBUGF  1, "K : IDE CH1 PIO, because ATAPI drive present\n"
4772 mario79 284
        jmp     .ch1_pio_set_for_all
285
;--------------------------------------
286
.ch1_pio_set_no_devices:
287
        DEBUGF  1, "K : IDE CH1 PIO because no devices\n"
288
        jmp     .ch1_pio_set_for_all
289
;-------------------------------------
290
.ch1_pio_set:
291
        DEBUGF  1, "K : IDE CH1 PIO because device not support UDMA\n"
292
;-------------------------------------
293
.ch1_pio_set_for_all:
294
        mov     [ecx+IDE_DATA.dma_hdd_channel_1], al
4624 mario79 295
        jmp     .ch2_check
4700 mario79 296
;--------------------------------------
4624 mario79 297
@@:
4772 mario79 298
        xor     ebx, ebx
299
        call    calculate_IDE_device_values_storage
300
 
301
        test    ah, 1010000b
302
        jz      .ch1_pio_set_no_devices
303
 
304
        test    ah, 1000000b
305
        jz      @f
306
 
307
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
308
        je      .ch1_pio_set
309
 
310
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
311
        je      .ch1_pio_set
312
;--------------------------------------
313
@@:
314
        test    ah, 10000b
315
        jz      @f
316
 
317
        add     ebx, 2
318
 
319
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
320
        je      .ch1_pio_set
321
 
322
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
323
        je      .ch1_pio_set
324
;--------------------------------------
325
@@:
4700 mario79 326
        mov     dx, [ecx+IDE_DATA.BAR1_val] ;0x3F4
4624 mario79 327
        add     dx, 2 ;0x3F6
328
        out     dx, al
6816 dunkaist 329
        call    set_pci_command_bus_master
4624 mario79 330
        DEBUGF  1, "K : IDE CH1 DMA enabled\n"
4720 mario79 331
        mov     [ecx+IDE_DATA.dma_hdd_channel_1], byte 1
4700 mario79 332
;--------------------------------------
4624 mario79 333
.ch2_check:
4772 mario79 334
        test    ah, 1010b ; check for ATAPI devices
4624 mario79 335
        jz      @f
4772 mario79 336
;--------------------------------------
337
.ch2_pio_set_ATAPI:
4624 mario79 338
        DEBUGF  1, "K : IDE CH2 PIO, because ATAPI drive present\n"
4772 mario79 339
        jmp     .ch2_pio_set_for_all
340
;--------------------------------------
341
.ch2_pio_set_no_devices:
342
        DEBUGF  1, "K : IDE CH2 PIO because no devices\n"
343
        jmp     .ch2_pio_set_for_all
344
;--------------------------------------
345
.ch2_pio_set:
346
        DEBUGF  1, "K : IDE CH2 PIO because device not support UDMA\n"
347
;--------------------------------------
348
.ch2_pio_set_for_all:
349
        mov     [ecx+IDE_DATA.dma_hdd_channel_2], al
4838 mario79 350
        jmp     .set_interrupts_for_IDE_controllers
4700 mario79 351
;--------------------------------------
4624 mario79 352
@@:
4772 mario79 353
        mov     ebx, 4
354
        call    calculate_IDE_device_values_storage
355
 
356
        test    ah, 101b
357
        jz      .ch2_pio_set_no_devices
358
 
359
        test    ah, 100b
360
        jz      @f
361
 
362
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
363
        je      .ch2_pio_set
364
 
365
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
366
        je      .ch2_pio_set
367
;--------------------------------------
368
@@:
369
        test    ah, 1b
370
        jz      @f
371
 
372
        add     ebx, 2
373
 
374
        cmp     [ebx+IDE_DEVICE.UDMA_possible_modes], al
375
        je      .ch2_pio_set
376
 
377
        cmp     [ebx+IDE_DEVICE.UDMA_set_mode], al
378
        je      .ch2_pio_set
379
;--------------------------------------
380
@@:
4700 mario79 381
        mov     dx, [ecx+IDE_DATA.BAR3_val] ;0x374
4624 mario79 382
        add     dx, 2 ;0x376
383
        out     dx, al
6816 dunkaist 384
        call    set_pci_command_bus_master
4624 mario79 385
        DEBUGF  1, "K : IDE CH2 DMA enabled\n"
4720 mario79 386
        mov     [ecx+IDE_DATA.dma_hdd_channel_2], byte 1
4624 mario79 387
;--------------------------------------
4838 mario79 388
.set_interrupts_for_IDE_controllers:
389
        mov     esi, boot_set_int_IDE
390
        call    boot_log
391
;--------------------------------------
392
        mov     eax, [ecx+IDE_DATA.ProgrammingInterface]
5147 mario79 393
;        cmp     ax, 0x0180
394
;        je      .pata_ide
4838 mario79 395
 
5147 mario79 396
;        cmp     ax, 0x018a
397
;        jne     .sata_ide
398
 
399
        test    al, 1 ; 0 - legacy PCI mode, 1 - native PCI mode
400
        jnz     .sata_ide
4838 mario79 401
;--------------------------------------
402
.pata_ide:
403
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
404
        je      .end_set_interrupts
405
 
406
        push    ecx
6015 clevermous 407
        stdcall attach_int_handler, 14, IDE_irq_14_handler, ecx
408
        pop     ecx
4838 mario79 409
        DEBUGF  1, "K : Set IDE IRQ14 return code %x\n", eax
6015 clevermous 410
        push    ecx
411
        stdcall attach_int_handler, 15, IDE_irq_15_handler, ecx
4838 mario79 412
        DEBUGF  1, "K : Set IDE IRQ15 return code %x\n", eax
413
        pop     ecx
414
 
415
        jmp     .end_set_interrupts
416
;--------------------------------------
417
.sata_ide:
5147 mario79 418
;        cmp     ax, 0x0185
419
;        je      .sata_ide_1
4838 mario79 420
 
5147 mario79 421
;        cmp     ax, 0x018f
422
;        jne     .end_set_interrupts
4838 mario79 423
;--------------------------------------
5147 mario79 424
;.sata_ide_1:
4838 mario79 425
; Some weird controllers generate an interrupt even if IDE interrupts
426
; are disabled and no IDE devices. For example, notebook ASUS K72F -
427
; IDE controller 010185 generates false interrupt when we work with
428
; the IDE controller 01018f. For this reason, the interrupt handler
429
; does not need to be installed if both channel IDE controller
430
; running in PIO mode.
6015 clevermous 431
 
432
; ...unfortunately, PCI interrupt can be shared with other devices
433
; which could enable it without consulting IDE code.
434
; So install the handler anyways and try to process
435
; even those interrupts which we are not expecting.
4838 mario79 436
        cmp     [ecx+IDE_DATA.RegsBaseAddres], 0
437
        je      .end_set_interrupts
438
 
439
        mov     ax, [ecx+IDE_DATA.Interrupt]
440
        movzx   eax, al
441
        push    ecx
6015 clevermous 442
        stdcall attach_int_handler, eax, IDE_common_irq_handler, ecx
4838 mario79 443
        pop     ecx
444
        DEBUGF  1, "K : Set IDE IRQ%d return code %x\n", [ecx+IDE_DATA.Interrupt]:1, eax
445
;--------------------------------------
4624 mario79 446
.end_set_interrupts:
4838 mario79 447
        popfd
4700 mario79 448
        ret
4624 mario79 449
;-----------------------------------------------------------------------------
450
; END of initialisation IDE ATA code
451
;-----------------------------------------------------------------------------
4700 mario79 452
find_IDE_controller_done:
453
        mov     ecx, IDE_controller_1
454
        mov     [IDE_controller_pointer], ecx
455
        call    Init_IDE_ATA_controller
456
        mov     ecx, IDE_controller_2
457
        mov     [IDE_controller_pointer], ecx
458
        call    Init_IDE_ATA_controller
459
        mov     ecx, IDE_controller_3
460
        mov     [IDE_controller_pointer], ecx
461
        call    Init_IDE_ATA_controller
462
;-----------------------------------------------------------------------------
463
        mov     esi, boot_getcache
464
        call    boot_log
465
include 'getcache.inc'
466
;-----------------------------------------------------------------------------
467
        mov     esi, boot_detectpart
468
        call    boot_log
469
include 'sear_par.inc'
470
;-----------------------------------------------------------------------------
4772 mario79 471
        mov     esi, boot_init_sys
472
        call    boot_log
473
        call    Parser_params
474
 
475
if ~ defined extended_primary_loader
476
; ramdisk image should be loaded by extended primary loader if it exists
477
; READ RAMDISK IMAGE FROM HD
478
include '../boot/rdload.inc'
479
end if
480
;-----------------------------------------------------------------------------
4720 mario79 481
        mov     ecx, IDE_controller_1
482
        mov     [IDE_controller_pointer], ecx
483
        call    Init_IDE_ATA_controller_2
484
        mov     ecx, IDE_controller_2
485
        mov     [IDE_controller_pointer], ecx
486
        call    Init_IDE_ATA_controller_2
487
        mov     ecx, IDE_controller_3
488
        mov     [IDE_controller_pointer], ecx
489
        call    Init_IDE_ATA_controller_2
490
;-----------------------------------------------------------------------------