WebSVN – Kolibri OS – Blame – /drivers/video/drm/vmwgfx/device_include/svga3d_devcaps.h

Rev	Author	Line No.	Line
6296	serge	1	/**********************************************************
		2	* Copyright 1998-2015 VMware, Inc. All rights reserved.
		3	*
		4	* Permission is hereby granted, free of charge, to any person
		5	* obtaining a copy of this software and associated documentation
		6	* files (the "Software"), to deal in the Software without
		7	* restriction, including without limitation the rights to use, copy,
		8	* modify, merge, publish, distribute, sublicense, and/or sell copies
		9	* of the Software, and to permit persons to whom the Software is
		10	* furnished to do so, subject to the following conditions:
		11	*
		12	* The above copyright notice and this permission notice shall be
		13	* included in all copies or substantial portions of the Software.
		14	*
		15	* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
		16	* EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
		17	* MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
		18	* NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
		19	* BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
		20	* ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
		21	* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
		22	* SOFTWARE.
		23	*
		24	**********************************************************/
		25
		26	/*
		27	* svga3d_devcaps.h --
		28	*
		29	* SVGA 3d caps definitions
		30	*/
		31
		32	#ifndef _SVGA3D_DEVCAPS_H_
		33	#define _SVGA3D_DEVCAPS_H_
		34
		35	#define INCLUDE_ALLOW_MODULE
		36	#define INCLUDE_ALLOW_USERLEVEL
		37	#define INCLUDE_ALLOW_VMCORE
		38
		39	#include "includeCheck.h"
		40
		41	/*
		42	* 3D Hardware Version
		43	*
		44	* The hardware version is stored in the SVGA_FIFO_3D_HWVERSION fifo
		45	* register. Is set by the host and read by the guest. This lets
		46	* us make new guest drivers which are backwards-compatible with old
		47	* SVGA hardware revisions. It does not let us support old guest
		48	* drivers. Good enough for now.
		49	*
		50	*/
		51
		52	#define SVGA3D_MAKE_HWVERSION(major, minor) (((major) << 16) \| ((minor) & 0xFF))
		53	#define SVGA3D_MAJOR_HWVERSION(version) ((version) >> 16)
		54	#define SVGA3D_MINOR_HWVERSION(version) ((version) & 0xFF)
		55
		56	typedef enum {
		57	SVGA3D_HWVERSION_WS5_RC1 = SVGA3D_MAKE_HWVERSION(0, 1),
		58	SVGA3D_HWVERSION_WS5_RC2 = SVGA3D_MAKE_HWVERSION(0, 2),
		59	SVGA3D_HWVERSION_WS51_RC1 = SVGA3D_MAKE_HWVERSION(0, 3),
		60	SVGA3D_HWVERSION_WS6_B1 = SVGA3D_MAKE_HWVERSION(1, 1),
		61	SVGA3D_HWVERSION_FUSION_11 = SVGA3D_MAKE_HWVERSION(1, 4),
		62	SVGA3D_HWVERSION_WS65_B1 = SVGA3D_MAKE_HWVERSION(2, 0),
		63	SVGA3D_HWVERSION_WS8_B1 = SVGA3D_MAKE_HWVERSION(2, 1),
		64	SVGA3D_HWVERSION_CURRENT = SVGA3D_HWVERSION_WS8_B1,
		65	} SVGA3dHardwareVersion;
		66
		67	/*
		68	* DevCap indexes.
		69	*/
		70
		71	typedef enum {
		72	SVGA3D_DEVCAP_INVALID = ((uint32)-1),
		73	SVGA3D_DEVCAP_3D = 0,
		74	SVGA3D_DEVCAP_MAX_LIGHTS = 1,
		75
		76	/*
		77	* SVGA3D_DEVCAP_MAX_TEXTURES reflects the maximum number of
		78	* fixed-function texture units available. Each of these units
		79	* work in both FFP and Shader modes, and they support texture
		80	* transforms and texture coordinates. The host may have additional
		81	* texture image units that are only usable with shaders.
		82	*/
		83	SVGA3D_DEVCAP_MAX_TEXTURES = 2,
		84	SVGA3D_DEVCAP_MAX_CLIP_PLANES = 3,
		85	SVGA3D_DEVCAP_VERTEX_SHADER_VERSION = 4,
		86	SVGA3D_DEVCAP_VERTEX_SHADER = 5,
		87	SVGA3D_DEVCAP_FRAGMENT_SHADER_VERSION = 6,
		88	SVGA3D_DEVCAP_FRAGMENT_SHADER = 7,
		89	SVGA3D_DEVCAP_MAX_RENDER_TARGETS = 8,
		90	SVGA3D_DEVCAP_S23E8_TEXTURES = 9,
		91	SVGA3D_DEVCAP_S10E5_TEXTURES = 10,
		92	SVGA3D_DEVCAP_MAX_FIXED_VERTEXBLEND = 11,
		93	SVGA3D_DEVCAP_D16_BUFFER_FORMAT = 12,
		94	SVGA3D_DEVCAP_D24S8_BUFFER_FORMAT = 13,
		95	SVGA3D_DEVCAP_D24X8_BUFFER_FORMAT = 14,
		96	SVGA3D_DEVCAP_QUERY_TYPES = 15,
		97	SVGA3D_DEVCAP_TEXTURE_GRADIENT_SAMPLING = 16,
		98	SVGA3D_DEVCAP_MAX_POINT_SIZE = 17,
		99	SVGA3D_DEVCAP_MAX_SHADER_TEXTURES = 18,
		100	SVGA3D_DEVCAP_MAX_TEXTURE_WIDTH = 19,
		101	SVGA3D_DEVCAP_MAX_TEXTURE_HEIGHT = 20,
		102	SVGA3D_DEVCAP_MAX_VOLUME_EXTENT = 21,
		103	SVGA3D_DEVCAP_MAX_TEXTURE_REPEAT = 22,
		104	SVGA3D_DEVCAP_MAX_TEXTURE_ASPECT_RATIO = 23,
		105	SVGA3D_DEVCAP_MAX_TEXTURE_ANISOTROPY = 24,
		106	SVGA3D_DEVCAP_MAX_PRIMITIVE_COUNT = 25,
		107	SVGA3D_DEVCAP_MAX_VERTEX_INDEX = 26,
		108	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_INSTRUCTIONS = 27,
		109	SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_INSTRUCTIONS = 28,
		110	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEMPS = 29,
		111	SVGA3D_DEVCAP_MAX_FRAGMENT_SHADER_TEMPS = 30,
		112	SVGA3D_DEVCAP_TEXTURE_OPS = 31,
		113	SVGA3D_DEVCAP_SURFACEFMT_X8R8G8B8 = 32,
		114	SVGA3D_DEVCAP_SURFACEFMT_A8R8G8B8 = 33,
		115	SVGA3D_DEVCAP_SURFACEFMT_A2R10G10B10 = 34,
		116	SVGA3D_DEVCAP_SURFACEFMT_X1R5G5B5 = 35,
		117	SVGA3D_DEVCAP_SURFACEFMT_A1R5G5B5 = 36,
		118	SVGA3D_DEVCAP_SURFACEFMT_A4R4G4B4 = 37,
		119	SVGA3D_DEVCAP_SURFACEFMT_R5G6B5 = 38,
		120	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE16 = 39,
		121	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8_ALPHA8 = 40,
		122	SVGA3D_DEVCAP_SURFACEFMT_ALPHA8 = 41,
		123	SVGA3D_DEVCAP_SURFACEFMT_LUMINANCE8 = 42,
		124	SVGA3D_DEVCAP_SURFACEFMT_Z_D16 = 43,
		125	SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8 = 44,
		126	SVGA3D_DEVCAP_SURFACEFMT_Z_D24X8 = 45,
		127	SVGA3D_DEVCAP_SURFACEFMT_DXT1 = 46,
		128	SVGA3D_DEVCAP_SURFACEFMT_DXT2 = 47,
		129	SVGA3D_DEVCAP_SURFACEFMT_DXT3 = 48,
		130	SVGA3D_DEVCAP_SURFACEFMT_DXT4 = 49,
		131	SVGA3D_DEVCAP_SURFACEFMT_DXT5 = 50,
		132	SVGA3D_DEVCAP_SURFACEFMT_BUMPX8L8V8U8 = 51,
		133	SVGA3D_DEVCAP_SURFACEFMT_A2W10V10U10 = 52,
		134	SVGA3D_DEVCAP_SURFACEFMT_BUMPU8V8 = 53,
		135	SVGA3D_DEVCAP_SURFACEFMT_Q8W8V8U8 = 54,
		136	SVGA3D_DEVCAP_SURFACEFMT_CxV8U8 = 55,
		137	SVGA3D_DEVCAP_SURFACEFMT_R_S10E5 = 56,
		138	SVGA3D_DEVCAP_SURFACEFMT_R_S23E8 = 57,
		139	SVGA3D_DEVCAP_SURFACEFMT_RG_S10E5 = 58,
		140	SVGA3D_DEVCAP_SURFACEFMT_RG_S23E8 = 59,
		141	SVGA3D_DEVCAP_SURFACEFMT_ARGB_S10E5 = 60,
		142	SVGA3D_DEVCAP_SURFACEFMT_ARGB_S23E8 = 61,
		143
		144	/*
		145	* There is a hole in our devcap definitions for
		146	* historical reasons.
		147	*
		148	* Define a constant just for completeness.
		149	*/
		150	SVGA3D_DEVCAP_MISSING62 = 62,
		151
		152	SVGA3D_DEVCAP_MAX_VERTEX_SHADER_TEXTURES = 63,
		153
		154	/*
		155	* Note that MAX_SIMULTANEOUS_RENDER_TARGETS is a maximum count of color
		156	* render targets. This does not include the depth or stencil targets.
		157	*/
		158	SVGA3D_DEVCAP_MAX_SIMULTANEOUS_RENDER_TARGETS = 64,
		159
		160	SVGA3D_DEVCAP_SURFACEFMT_V16U16 = 65,
		161	SVGA3D_DEVCAP_SURFACEFMT_G16R16 = 66,
		162	SVGA3D_DEVCAP_SURFACEFMT_A16B16G16R16 = 67,
		163	SVGA3D_DEVCAP_SURFACEFMT_UYVY = 68,
		164	SVGA3D_DEVCAP_SURFACEFMT_YUY2 = 69,
		165	SVGA3D_DEVCAP_MULTISAMPLE_NONMASKABLESAMPLES = 70,
		166	SVGA3D_DEVCAP_MULTISAMPLE_MASKABLESAMPLES = 71,
		167	SVGA3D_DEVCAP_ALPHATOCOVERAGE = 72,
		168	SVGA3D_DEVCAP_SUPERSAMPLE = 73,
		169	SVGA3D_DEVCAP_AUTOGENMIPMAPS = 74,
		170	SVGA3D_DEVCAP_SURFACEFMT_NV12 = 75,
		171	SVGA3D_DEVCAP_SURFACEFMT_AYUV = 76,
		172
		173	/*
		174	* This is the maximum number of SVGA context IDs that the guest
		175	* can define using SVGA_3D_CMD_CONTEXT_DEFINE.
		176	*/
		177	SVGA3D_DEVCAP_MAX_CONTEXT_IDS = 77,
		178
		179	/*
		180	* This is the maximum number of SVGA surface IDs that the guest
		181	* can define using SVGA_3D_CMD_SURFACE_DEFINE*.
		182	*/
		183	SVGA3D_DEVCAP_MAX_SURFACE_IDS = 78,
		184
		185	SVGA3D_DEVCAP_SURFACEFMT_Z_DF16 = 79,
		186	SVGA3D_DEVCAP_SURFACEFMT_Z_DF24 = 80,
		187	SVGA3D_DEVCAP_SURFACEFMT_Z_D24S8_INT = 81,
		188
		189	SVGA3D_DEVCAP_SURFACEFMT_ATI1 = 82,
		190	SVGA3D_DEVCAP_SURFACEFMT_ATI2 = 83,
		191
		192	/*
		193	* Deprecated.
		194	*/
		195	SVGA3D_DEVCAP_DEAD1 = 84,
		196
		197	/*
		198	* This contains several SVGA_3D_CAPS_VIDEO_DECODE elements
		199	* ored together, one for every type of video decoding supported.
		200	*/
		201	SVGA3D_DEVCAP_VIDEO_DECODE = 85,
		202
		203	/*
		204	* This contains several SVGA_3D_CAPS_VIDEO_PROCESS elements
		205	* ored together, one for every type of video processing supported.
		206	*/
		207	SVGA3D_DEVCAP_VIDEO_PROCESS = 86,
		208
		209	SVGA3D_DEVCAP_LINE_AA = 87, /* boolean */
		210	SVGA3D_DEVCAP_LINE_STIPPLE = 88, /* boolean */
		211	SVGA3D_DEVCAP_MAX_LINE_WIDTH = 89, /* float */
		212	SVGA3D_DEVCAP_MAX_AA_LINE_WIDTH = 90, /* float */
		213
		214	SVGA3D_DEVCAP_SURFACEFMT_YV12 = 91,
		215
		216	/*
		217	* Does the host support the SVGA logic ops commands?
		218	*/
		219	SVGA3D_DEVCAP_LOGICOPS = 92,
		220
		221	/*
		222	* Are TS_CONSTANT, TS_COLOR_KEY, and TS_COLOR_KEY_ENABLE supported?
		223	*/
		224	SVGA3D_DEVCAP_TS_COLOR_KEY = 93, /* boolean */
		225
		226	/*
		227	* Deprecated.
		228	*/
		229	SVGA3D_DEVCAP_DEAD2 = 94,
		230
		231	/*
		232	* Does the device support the DX commands?
		233	*/
		234	SVGA3D_DEVCAP_DX = 95,
		235
		236	/*
		237	* What is the maximum size of a texture array?
		238	*
		239	* (Even if this cap is zero, cubemaps are still allowed.)
		240	*/
		241	SVGA3D_DEVCAP_MAX_TEXTURE_ARRAY_SIZE = 96,
		242
		243	/*
		244	* What is the maximum number of vertex buffers that can
		245	* be used in the DXContext inputAssembly?
		246	*/
		247	SVGA3D_DEVCAP_DX_MAX_VERTEXBUFFERS = 97,
		248
		249	/*
		250	* What is the maximum number of constant buffers
		251	* that can be expected to work correctly with a
		252	* DX context?
		253	*/
		254	SVGA3D_DEVCAP_DX_MAX_CONSTANT_BUFFERS = 98,
		255
		256	/*
		257	* Does the device support provoking vertex control?
		258	* If zero, the first vertex will always be the provoking vertex.
		259	*/
		260	SVGA3D_DEVCAP_DX_PROVOKING_VERTEX = 99,
		261
		262	SVGA3D_DEVCAP_DXFMT_X8R8G8B8 = 100,
		263	SVGA3D_DEVCAP_DXFMT_A8R8G8B8 = 101,
		264	SVGA3D_DEVCAP_DXFMT_R5G6B5 = 102,
		265	SVGA3D_DEVCAP_DXFMT_X1R5G5B5 = 103,
		266	SVGA3D_DEVCAP_DXFMT_A1R5G5B5 = 104,
		267	SVGA3D_DEVCAP_DXFMT_A4R4G4B4 = 105,
		268	SVGA3D_DEVCAP_DXFMT_Z_D32 = 106,
		269	SVGA3D_DEVCAP_DXFMT_Z_D16 = 107,
		270	SVGA3D_DEVCAP_DXFMT_Z_D24S8 = 108,
		271	SVGA3D_DEVCAP_DXFMT_Z_D15S1 = 109,
		272	SVGA3D_DEVCAP_DXFMT_LUMINANCE8 = 110,
		273	SVGA3D_DEVCAP_DXFMT_LUMINANCE4_ALPHA4 = 111,
		274	SVGA3D_DEVCAP_DXFMT_LUMINANCE16 = 112,
		275	SVGA3D_DEVCAP_DXFMT_LUMINANCE8_ALPHA8 = 113,
		276	SVGA3D_DEVCAP_DXFMT_DXT1 = 114,
		277	SVGA3D_DEVCAP_DXFMT_DXT2 = 115,
		278	SVGA3D_DEVCAP_DXFMT_DXT3 = 116,
		279	SVGA3D_DEVCAP_DXFMT_DXT4 = 117,
		280	SVGA3D_DEVCAP_DXFMT_DXT5 = 118,
		281	SVGA3D_DEVCAP_DXFMT_BUMPU8V8 = 119,
		282	SVGA3D_DEVCAP_DXFMT_BUMPL6V5U5 = 120,
		283	SVGA3D_DEVCAP_DXFMT_BUMPX8L8V8U8 = 121,
		284	SVGA3D_DEVCAP_DXFMT_BUMPL8V8U8 = 122,
		285	SVGA3D_DEVCAP_DXFMT_ARGB_S10E5 = 123,
		286	SVGA3D_DEVCAP_DXFMT_ARGB_S23E8 = 124,
		287	SVGA3D_DEVCAP_DXFMT_A2R10G10B10 = 125,
		288	SVGA3D_DEVCAP_DXFMT_V8U8 = 126,
		289	SVGA3D_DEVCAP_DXFMT_Q8W8V8U8 = 127,
		290	SVGA3D_DEVCAP_DXFMT_CxV8U8 = 128,
		291	SVGA3D_DEVCAP_DXFMT_X8L8V8U8 = 129,
		292	SVGA3D_DEVCAP_DXFMT_A2W10V10U10 = 130,
		293	SVGA3D_DEVCAP_DXFMT_ALPHA8 = 131,
		294	SVGA3D_DEVCAP_DXFMT_R_S10E5 = 132,
		295	SVGA3D_DEVCAP_DXFMT_R_S23E8 = 133,
		296	SVGA3D_DEVCAP_DXFMT_RG_S10E5 = 134,
		297	SVGA3D_DEVCAP_DXFMT_RG_S23E8 = 135,
		298	SVGA3D_DEVCAP_DXFMT_BUFFER = 136,
		299	SVGA3D_DEVCAP_DXFMT_Z_D24X8 = 137,
		300	SVGA3D_DEVCAP_DXFMT_V16U16 = 138,
		301	SVGA3D_DEVCAP_DXFMT_G16R16 = 139,
		302	SVGA3D_DEVCAP_DXFMT_A16B16G16R16 = 140,
		303	SVGA3D_DEVCAP_DXFMT_UYVY = 141,
		304	SVGA3D_DEVCAP_DXFMT_YUY2 = 142,
		305	SVGA3D_DEVCAP_DXFMT_NV12 = 143,
		306	SVGA3D_DEVCAP_DXFMT_AYUV = 144,
		307	SVGA3D_DEVCAP_DXFMT_R32G32B32A32_TYPELESS = 145,
		308	SVGA3D_DEVCAP_DXFMT_R32G32B32A32_UINT = 146,
		309	SVGA3D_DEVCAP_DXFMT_R32G32B32A32_SINT = 147,
		310	SVGA3D_DEVCAP_DXFMT_R32G32B32_TYPELESS = 148,
		311	SVGA3D_DEVCAP_DXFMT_R32G32B32_FLOAT = 149,
		312	SVGA3D_DEVCAP_DXFMT_R32G32B32_UINT = 150,
		313	SVGA3D_DEVCAP_DXFMT_R32G32B32_SINT = 151,
		314	SVGA3D_DEVCAP_DXFMT_R16G16B16A16_TYPELESS = 152,
		315	SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UINT = 153,
		316	SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SNORM = 154,
		317	SVGA3D_DEVCAP_DXFMT_R16G16B16A16_SINT = 155,
		318	SVGA3D_DEVCAP_DXFMT_R32G32_TYPELESS = 156,
		319	SVGA3D_DEVCAP_DXFMT_R32G32_UINT = 157,
		320	SVGA3D_DEVCAP_DXFMT_R32G32_SINT = 158,
		321	SVGA3D_DEVCAP_DXFMT_R32G8X24_TYPELESS = 159,
		322	SVGA3D_DEVCAP_DXFMT_D32_FLOAT_S8X24_UINT = 160,
		323	SVGA3D_DEVCAP_DXFMT_R32_FLOAT_X8X24_TYPELESS = 161,
		324	SVGA3D_DEVCAP_DXFMT_X32_TYPELESS_G8X24_UINT = 162,
		325	SVGA3D_DEVCAP_DXFMT_R10G10B10A2_TYPELESS = 163,
		326	SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UINT = 164,
		327	SVGA3D_DEVCAP_DXFMT_R11G11B10_FLOAT = 165,
		328	SVGA3D_DEVCAP_DXFMT_R8G8B8A8_TYPELESS = 166,
		329	SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM = 167,
		330	SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UNORM_SRGB = 168,
		331	SVGA3D_DEVCAP_DXFMT_R8G8B8A8_UINT = 169,
		332	SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SINT = 170,
		333	SVGA3D_DEVCAP_DXFMT_R16G16_TYPELESS = 171,
		334	SVGA3D_DEVCAP_DXFMT_R16G16_UINT = 172,
		335	SVGA3D_DEVCAP_DXFMT_R16G16_SINT = 173,
		336	SVGA3D_DEVCAP_DXFMT_R32_TYPELESS = 174,
		337	SVGA3D_DEVCAP_DXFMT_D32_FLOAT = 175,
		338	SVGA3D_DEVCAP_DXFMT_R32_UINT = 176,
		339	SVGA3D_DEVCAP_DXFMT_R32_SINT = 177,
		340	SVGA3D_DEVCAP_DXFMT_R24G8_TYPELESS = 178,
		341	SVGA3D_DEVCAP_DXFMT_D24_UNORM_S8_UINT = 179,
		342	SVGA3D_DEVCAP_DXFMT_R24_UNORM_X8_TYPELESS = 180,
		343	SVGA3D_DEVCAP_DXFMT_X24_TYPELESS_G8_UINT = 181,
		344	SVGA3D_DEVCAP_DXFMT_R8G8_TYPELESS = 182,
		345	SVGA3D_DEVCAP_DXFMT_R8G8_UNORM = 183,
		346	SVGA3D_DEVCAP_DXFMT_R8G8_UINT = 184,
		347	SVGA3D_DEVCAP_DXFMT_R8G8_SINT = 185,
		348	SVGA3D_DEVCAP_DXFMT_R16_TYPELESS = 186,
		349	SVGA3D_DEVCAP_DXFMT_R16_UNORM = 187,
		350	SVGA3D_DEVCAP_DXFMT_R16_UINT = 188,
		351	SVGA3D_DEVCAP_DXFMT_R16_SNORM = 189,
		352	SVGA3D_DEVCAP_DXFMT_R16_SINT = 190,
		353	SVGA3D_DEVCAP_DXFMT_R8_TYPELESS = 191,
		354	SVGA3D_DEVCAP_DXFMT_R8_UNORM = 192,
		355	SVGA3D_DEVCAP_DXFMT_R8_UINT = 193,
		356	SVGA3D_DEVCAP_DXFMT_R8_SNORM = 194,
		357	SVGA3D_DEVCAP_DXFMT_R8_SINT = 195,
		358	SVGA3D_DEVCAP_DXFMT_P8 = 196,
		359	SVGA3D_DEVCAP_DXFMT_R9G9B9E5_SHAREDEXP = 197,
		360	SVGA3D_DEVCAP_DXFMT_R8G8_B8G8_UNORM = 198,
		361	SVGA3D_DEVCAP_DXFMT_G8R8_G8B8_UNORM = 199,
		362	SVGA3D_DEVCAP_DXFMT_BC1_TYPELESS = 200,
		363	SVGA3D_DEVCAP_DXFMT_BC1_UNORM_SRGB = 201,
		364	SVGA3D_DEVCAP_DXFMT_BC2_TYPELESS = 202,
		365	SVGA3D_DEVCAP_DXFMT_BC2_UNORM_SRGB = 203,
		366	SVGA3D_DEVCAP_DXFMT_BC3_TYPELESS = 204,
		367	SVGA3D_DEVCAP_DXFMT_BC3_UNORM_SRGB = 205,
		368	SVGA3D_DEVCAP_DXFMT_BC4_TYPELESS = 206,
		369	SVGA3D_DEVCAP_DXFMT_ATI1 = 207,
		370	SVGA3D_DEVCAP_DXFMT_BC4_SNORM = 208,
		371	SVGA3D_DEVCAP_DXFMT_BC5_TYPELESS = 209,
		372	SVGA3D_DEVCAP_DXFMT_ATI2 = 210,
		373	SVGA3D_DEVCAP_DXFMT_BC5_SNORM = 211,
		374	SVGA3D_DEVCAP_DXFMT_R10G10B10_XR_BIAS_A2_UNORM = 212,
		375	SVGA3D_DEVCAP_DXFMT_B8G8R8A8_TYPELESS = 213,
		376	SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM_SRGB = 214,
		377	SVGA3D_DEVCAP_DXFMT_B8G8R8X8_TYPELESS = 215,
		378	SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM_SRGB = 216,
		379	SVGA3D_DEVCAP_DXFMT_Z_DF16 = 217,
		380	SVGA3D_DEVCAP_DXFMT_Z_DF24 = 218,
		381	SVGA3D_DEVCAP_DXFMT_Z_D24S8_INT = 219,
		382	SVGA3D_DEVCAP_DXFMT_YV12 = 220,
		383	SVGA3D_DEVCAP_DXFMT_R32G32B32A32_FLOAT = 221,
		384	SVGA3D_DEVCAP_DXFMT_R16G16B16A16_FLOAT = 222,
		385	SVGA3D_DEVCAP_DXFMT_R16G16B16A16_UNORM = 223,
		386	SVGA3D_DEVCAP_DXFMT_R32G32_FLOAT = 224,
		387	SVGA3D_DEVCAP_DXFMT_R10G10B10A2_UNORM = 225,
		388	SVGA3D_DEVCAP_DXFMT_R8G8B8A8_SNORM = 226,
		389	SVGA3D_DEVCAP_DXFMT_R16G16_FLOAT = 227,
		390	SVGA3D_DEVCAP_DXFMT_R16G16_UNORM = 228,
		391	SVGA3D_DEVCAP_DXFMT_R16G16_SNORM = 229,
		392	SVGA3D_DEVCAP_DXFMT_R32_FLOAT = 230,
		393	SVGA3D_DEVCAP_DXFMT_R8G8_SNORM = 231,
		394	SVGA3D_DEVCAP_DXFMT_R16_FLOAT = 232,
		395	SVGA3D_DEVCAP_DXFMT_D16_UNORM = 233,
		396	SVGA3D_DEVCAP_DXFMT_A8_UNORM = 234,
		397	SVGA3D_DEVCAP_DXFMT_BC1_UNORM = 235,
		398	SVGA3D_DEVCAP_DXFMT_BC2_UNORM = 236,
		399	SVGA3D_DEVCAP_DXFMT_BC3_UNORM = 237,
		400	SVGA3D_DEVCAP_DXFMT_B5G6R5_UNORM = 238,
		401	SVGA3D_DEVCAP_DXFMT_B5G5R5A1_UNORM = 239,
		402	SVGA3D_DEVCAP_DXFMT_B8G8R8A8_UNORM = 240,
		403	SVGA3D_DEVCAP_DXFMT_B8G8R8X8_UNORM = 241,
		404	SVGA3D_DEVCAP_DXFMT_BC4_UNORM = 242,
		405	SVGA3D_DEVCAP_DXFMT_BC5_UNORM = 243,
		406
		407	SVGA3D_DEVCAP_MAX /* This must be the last index. */
		408	} SVGA3dDevCapIndex;
		409
		410	/*
		411	* Bit definitions for DXFMT devcaps
		412	*
		413	*
		414	* SUPPORTED: Can the format be defined?
		415	* SHADER_SAMPLE: Can the format be sampled from a shader?
		416	* COLOR_RENDERTARGET: Can the format be a color render target?
		417	* DEPTH_RENDERTARGET: Can the format be a depth render target?
		418	* BLENDABLE: Is the format blendable?
		419	* MIPS: Does the format support mip levels?
		420	* ARRAY: Does the format support texture arrays?
		421	* VOLUME: Does the format support having volume?
		422	* MULTISAMPLE_2: Does the format support 2x multisample?
		423	* MULTISAMPLE_4: Does the format support 4x multisample?
		424	* MULTISAMPLE_8: Does the format support 8x multisample?
		425	*/
		426	#define SVGA3D_DXFMT_SUPPORTED (1 << 0)
		427	#define SVGA3D_DXFMT_SHADER_SAMPLE (1 << 1)
		428	#define SVGA3D_DXFMT_COLOR_RENDERTARGET (1 << 2)
		429	#define SVGA3D_DXFMT_DEPTH_RENDERTARGET (1 << 3)
		430	#define SVGA3D_DXFMT_BLENDABLE (1 << 4)
		431	#define SVGA3D_DXFMT_MIPS (1 << 5)
		432	#define SVGA3D_DXFMT_ARRAY (1 << 6)
		433	#define SVGA3D_DXFMT_VOLUME (1 << 7)
		434	#define SVGA3D_DXFMT_DX_VERTEX_BUFFER (1 << 8)
		435	#define SVGADX_DXFMT_MULTISAMPLE_2 (1 << 9)
		436	#define SVGADX_DXFMT_MULTISAMPLE_4 (1 << 10)
		437	#define SVGADX_DXFMT_MULTISAMPLE_8 (1 << 11)
		438	#define SVGADX_DXFMT_MAX (1 << 12)
		439
		440	/*
		441	* Convenience mask for any multisample capability.
		442	*
		443	* The multisample bits imply both load and render capability.
		444	*/
		445	#define SVGA3D_DXFMT_MULTISAMPLE ( \
		446	SVGADX_DXFMT_MULTISAMPLE_2 \| \
		447	SVGADX_DXFMT_MULTISAMPLE_4 \| \
		448	SVGADX_DXFMT_MULTISAMPLE_8 )
		449
		450	typedef union {
		451	Bool b;
		452	uint32 u;
		453	int32 i;
		454	float f;
		455	} SVGA3dDevCapResult;
		456
		457	#endif /* _SVGA3D_DEVCAPS_H_ */

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(root)/drivers/video/drm/vmwgfx/device_include/svga3d_devcaps.h – Rev 6296