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Rev | Author | Line No. | Line |
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5078 | serge | 1 | #include |
2 | #include |
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3 | #include |
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4 | #include "radeon_reg.h" |
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5 | #include "radeon.h" |
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6 | #include "bitmap.h" |
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7 | |||
5097 | serge | 8 | void __init dmi_scan_machine(void); |
9 | |||
5078 | serge | 10 | #define KMS_DEV_CLOSE 0 |
11 | #define KMS_DEV_INIT 1 |
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12 | #define KMS_DEV_READY 2 |
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13 | |||
14 | struct pci_device { |
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15 | uint16_t domain; |
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16 | uint8_t bus; |
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17 | uint8_t dev; |
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18 | uint8_t func; |
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19 | uint16_t vendor_id; |
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20 | uint16_t device_id; |
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21 | uint16_t subvendor_id; |
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22 | uint16_t subdevice_id; |
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23 | uint32_t device_class; |
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24 | uint8_t revision; |
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25 | }; |
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26 | |||
27 | struct drm_device *main_device; |
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28 | struct drm_file *drm_file_handlers[256]; |
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29 | |||
30 | videomode_t usermode; |
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31 | |||
32 | void cpu_detect(); |
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33 | |||
34 | int _stdcall display_handler(ioctl_t *io); |
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35 | static char log[256]; |
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36 | |||
37 | unsigned long volatile jiffies; |
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38 | u64 jiffies_64; |
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39 | |||
40 | struct workqueue_struct *system_wq; |
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41 | int driver_wq_state; |
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42 | |||
43 | int x86_clflush_size; |
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44 | |||
45 | void ati_driver_thread() |
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46 | { |
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47 | struct radeon_device *rdev = NULL; |
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48 | struct workqueue_struct *cwq = NULL; |
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49 | // static int dpms = 1; |
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50 | // static int dpms_lock = 0; |
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51 | // oskey_t key; |
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52 | unsigned long irqflags; |
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53 | int tmp; |
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54 | |||
55 | printf("%s\n",__FUNCTION__); |
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56 | |||
57 | while(driver_wq_state == KMS_DEV_INIT) |
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58 | { |
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59 | jiffies = GetTimerTicks(); |
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60 | jiffies_64 = jiffies; |
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61 | delay(1); |
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62 | }; |
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63 | |||
64 | rdev = main_device->dev_private; |
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65 | // cwq = rdev->wq; |
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66 | |||
67 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(1),"c"(1)); |
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68 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0x46),"d"(0x330)); |
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69 | asm volatile("int $0x40":"=a"(tmp):"a"(66),"b"(4),"c"(0xC6),"d"(0x330)); |
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70 | |||
71 | while(driver_wq_state != KMS_DEV_CLOSE) |
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72 | { |
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73 | jiffies = GetTimerTicks(); |
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74 | #if 0 |
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75 | key = get_key(); |
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76 | |||
77 | if( (key.val != 1) && (key.state == 0x02)) |
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78 | { |
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79 | if(key.code == 0x46 && dpms_lock == 0) |
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80 | { |
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81 | dpms_lock = 1; |
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82 | if(dpms == 1) |
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83 | { |
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84 | i915_dpms(main_device, DRM_MODE_DPMS_OFF); |
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85 | printf("dpms off\n"); |
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86 | } |
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87 | else |
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88 | { |
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89 | i915_dpms(main_device, DRM_MODE_DPMS_ON); |
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90 | printf("dpms on\n"); |
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91 | }; |
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92 | dpms ^= 1; |
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93 | } |
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94 | else if(key.code == 0xC6) |
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95 | dpms_lock = 0; |
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96 | }; |
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97 | spin_lock_irqsave(&cwq->lock, irqflags); |
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98 | |||
99 | while (!list_empty(&cwq->worklist)) |
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100 | { |
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101 | struct work_struct *work = list_entry(cwq->worklist.next, |
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102 | struct work_struct, entry); |
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103 | work_func_t f = work->func; |
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104 | list_del_init(cwq->worklist.next); |
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105 | |||
106 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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107 | f(work); |
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108 | spin_lock_irqsave(&cwq->lock, irqflags); |
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109 | } |
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110 | |||
111 | spin_unlock_irqrestore(&cwq->lock, irqflags); |
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112 | #endif |
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113 | |||
114 | delay(1); |
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115 | }; |
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116 | |||
117 | asm volatile ("int $0x40"::"a"(-1)); |
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118 | } |
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119 | |||
120 | u32_t __attribute__((externally_visible)) drvEntry(int action, char *cmdline) |
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121 | { |
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122 | struct radeon_device *rdev = NULL; |
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123 | |||
124 | const struct pci_device_id *ent; |
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125 | |||
126 | int err = 0; |
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127 | |||
128 | if(action != 1) |
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129 | { |
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130 | driver_wq_state = KMS_DEV_CLOSE; |
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131 | return 0; |
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132 | }; |
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133 | |||
134 | if( GetService("DISPLAY") != 0 ) |
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135 | return 0; |
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136 | |||
137 | printf("Radeon v3.17-rc3 cmdline %s\n", cmdline); |
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138 | |||
139 | if( cmdline && *cmdline ) |
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140 | parse_cmdline(cmdline, &usermode, log, &radeon_modeset); |
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141 | |||
142 | if( *log && !dbg_open(log)) |
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143 | { |
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144 | printf("Can't open %s\nExit\n", log); |
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145 | return 0; |
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146 | } |
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147 | |||
148 | cpu_detect(); |
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149 | |||
150 | err = enum_pci_devices(); |
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151 | if( unlikely(err != 0) ) |
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152 | { |
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153 | dbgprintf("Device enumeration failed\n"); |
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154 | return 0; |
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155 | } |
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156 | |||
157 | driver_wq_state = KMS_DEV_INIT; |
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158 | CreateKernelThread(ati_driver_thread); |
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159 | |||
160 | err = ati_init(); |
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161 | if(unlikely(err!= 0)) |
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162 | { |
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163 | driver_wq_state = KMS_DEV_CLOSE; |
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164 | dbgprintf("Epic Fail :(\n"); |
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165 | return 0; |
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166 | }; |
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167 | |||
168 | driver_wq_state = KMS_DEV_READY; |
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169 | |||
170 | rdev = main_device->dev_private; |
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171 | printf("current engine clock: %u0 kHz\n", radeon_get_engine_clock(rdev)); |
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172 | printf("current memory clock: %u0 kHz\n", radeon_get_memory_clock(rdev)); |
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173 | |||
174 | err = RegService("DISPLAY", display_handler); |
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175 | |||
176 | if( err != 0) |
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177 | dbgprintf("DISPLAY service installed\n"); |
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178 | |||
179 | |||
180 | return err; |
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181 | }; |
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182 | |||
183 | |||
184 | |||
185 | #define CURRENT_API 0x0200 /* 2.00 */ |
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186 | #define COMPATIBLE_API 0x0100 /* 1.00 */ |
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187 | |||
188 | #define API_VERSION (COMPATIBLE_API << 16) | CURRENT_API |
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189 | |||
190 | #define SRV_GETVERSION 0 |
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191 | #define SRV_ENUM_MODES 1 |
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192 | #define SRV_SET_MODE 2 |
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193 | #define SRV_GET_CAPS 3 |
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194 | |||
195 | #define SRV_CREATE_SURFACE 10 |
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196 | #define SRV_DESTROY_SURFACE 11 |
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197 | #define SRV_LOCK_SURFACE 12 |
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198 | #define SRV_UNLOCK_SURFACE 13 |
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199 | #define SRV_RESIZE_SURFACE 14 |
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200 | #define SRV_BLIT_BITMAP 15 |
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201 | #define SRV_BLIT_TEXTURE 16 |
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202 | #define SRV_BLIT_VIDEO 17 |
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203 | |||
204 | |||
205 | |||
206 | int r600_video_blit(uint64_t src_offset, int x, int y, |
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207 | int w, int h, int pitch); |
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208 | |||
209 | #define check_input(size) \ |
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210 | if( unlikely((inp==NULL)||(io->inp_size != (size))) ) \ |
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211 | break; |
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212 | |||
213 | #define check_output(size) \ |
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214 | if( unlikely((outp==NULL)||(io->out_size != (size))) ) \ |
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215 | break; |
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216 | |||
217 | int _stdcall display_handler(ioctl_t *io) |
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218 | { |
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219 | int retval = -1; |
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220 | u32_t *inp; |
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221 | u32_t *outp; |
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222 | |||
223 | inp = io->input; |
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224 | outp = io->output; |
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225 | |||
226 | switch(io->io_code) |
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227 | { |
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228 | case SRV_GETVERSION: |
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229 | check_output(4); |
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230 | *outp = API_VERSION; |
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231 | retval = 0; |
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232 | break; |
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233 | |||
234 | case SRV_ENUM_MODES: |
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235 | // dbgprintf("SRV_ENUM_MODES inp %x inp_size %x out_size %x\n", |
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236 | // inp, io->inp_size, io->out_size ); |
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237 | check_output(4); |
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238 | if( radeon_modeset) |
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239 | retval = get_videomodes((videomode_t*)inp, outp); |
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240 | break; |
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241 | |||
242 | case SRV_SET_MODE: |
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243 | // dbgprintf("SRV_SET_MODE inp %x inp_size %x\n", |
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244 | // inp, io->inp_size); |
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245 | check_input(sizeof(videomode_t)); |
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246 | if( radeon_modeset ) |
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247 | retval = set_user_mode((videomode_t*)inp); |
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248 | break; |
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249 | /* |
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250 | case SRV_GET_CAPS: |
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251 | retval = get_driver_caps((hwcaps_t*)inp); |
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252 | break; |
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253 | |||
254 | case SRV_CREATE_SURFACE: |
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255 | // check_input(8); |
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256 | retval = create_surface(main_drm_device, (struct io_call_10*)inp); |
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257 | break; |
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258 | |||
259 | case SRV_LOCK_SURFACE: |
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260 | retval = lock_surface((struct io_call_12*)inp); |
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261 | break; |
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262 | |||
263 | case SRV_BLIT_BITMAP: |
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264 | srv_blit_bitmap( inp[0], inp[1], inp[2], |
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265 | inp[3], inp[4], inp[5], inp[6]); |
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266 | */ |
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267 | }; |
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268 | |||
269 | return retval; |
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270 | } |
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271 | |||
272 | |||
273 | #define PCI_CLASS_REVISION 0x08 |
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274 | #define PCI_CLASS_DISPLAY_VGA 0x0300 |
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275 | |||
276 | int pci_scan_filter(u32_t id, u32_t busnr, u32_t devfn) |
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277 | { |
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278 | u16_t vendor, device; |
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279 | u32_t class; |
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280 | int ret = 0; |
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281 | |||
282 | vendor = id & 0xffff; |
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283 | device = (id >> 16) & 0xffff; |
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284 | |||
285 | if(vendor == 0x1002) |
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286 | { |
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287 | class = PciRead32(busnr, devfn, PCI_CLASS_REVISION); |
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288 | class >>= 16; |
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289 | |||
290 | if( class == PCI_CLASS_DISPLAY_VGA) |
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291 | ret = 1; |
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292 | } |
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293 | return ret; |
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294 | } |
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295 | |||
296 | |||
297 | int seq_printf(struct seq_file *m, const char *f, ...) |
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298 | { |
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299 | // int ret; |
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300 | // va_list args; |
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301 | |||
302 | // va_start(args, f); |
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303 | // ret = seq_vprintf(m, f, args); |
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304 | // va_end(args); |
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305 | |||
306 | // return ret; |
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307 | return 0; |
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308 | } |
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309 | |||
310 | s64 div64_s64(s64 dividend, s64 divisor) |
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311 | { |
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312 | s64 quot, t; |
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313 | |||
314 | quot = div64_u64(abs64(dividend), abs64(divisor)); |
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315 | t = (dividend ^ divisor) >> 63; |
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316 | |||
317 | return (quot ^ t) - t; |
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318 | }><> |
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319 |