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1117 | serge | 1 | /* |
2 | * Copyright 2008 Advanced Micro Devices, Inc. |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice shall be included in |
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12 | * all copies or substantial portions of the Software. |
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13 | * |
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14 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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15 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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16 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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17 | * THE COPYRIGHT HOLDER(S) OR AUTHOR(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR |
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18 | * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, |
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19 | * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR |
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20 | * OTHER DEALINGS IN THE SOFTWARE. |
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21 | * |
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22 | * Author: Stanislaw Skowronek |
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23 | */ |
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24 | |||
1179 | serge | 25 | #include |
26 | #include |
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1963 | serge | 27 | #include |
1428 | serge | 28 | #include |
1117 | serge | 29 | |
30 | #define ATOM_DEBUG |
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31 | |||
32 | #include "atom.h" |
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33 | #include "atom-names.h" |
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34 | #include "atom-bits.h" |
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1963 | serge | 35 | #include "radeon.h" |
1117 | serge | 36 | |
37 | #define ATOM_COND_ABOVE 0 |
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38 | #define ATOM_COND_ABOVEOREQUAL 1 |
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39 | #define ATOM_COND_ALWAYS 2 |
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40 | #define ATOM_COND_BELOW 3 |
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41 | #define ATOM_COND_BELOWOREQUAL 4 |
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42 | #define ATOM_COND_EQUAL 5 |
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43 | #define ATOM_COND_NOTEQUAL 6 |
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44 | |||
45 | #define ATOM_PORT_ATI 0 |
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46 | #define ATOM_PORT_PCI 1 |
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47 | #define ATOM_PORT_SYSIO 2 |
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48 | |||
49 | #define ATOM_UNIT_MICROSEC 0 |
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50 | #define ATOM_UNIT_MILLISEC 1 |
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51 | |||
52 | #define PLL_INDEX 2 |
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53 | #define PLL_DATA 3 |
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54 | |||
55 | typedef struct { |
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56 | struct atom_context *ctx; |
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57 | uint32_t *ps, *ws; |
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58 | int ps_shift; |
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59 | uint16_t start; |
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1963 | serge | 60 | unsigned last_jump; |
61 | unsigned long last_jump_jiffies; |
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62 | bool abort; |
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1117 | serge | 63 | } atom_exec_context; |
64 | |||
65 | int atom_debug = 0; |
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1963 | serge | 66 | static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params); |
67 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params); |
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1117 | serge | 68 | |
69 | static uint32_t atom_arg_mask[8] = |
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70 | { 0xFFFFFFFF, 0xFFFF, 0xFFFF00, 0xFFFF0000, 0xFF, 0xFF00, 0xFF0000, |
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71 | 0xFF000000 }; |
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72 | static int atom_arg_shift[8] = { 0, 0, 8, 16, 0, 8, 16, 24 }; |
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73 | |||
74 | static int atom_dst_to_src[8][4] = { |
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75 | /* translate destination alignment field to the source alignment encoding */ |
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76 | {0, 0, 0, 0}, |
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77 | {1, 2, 3, 0}, |
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78 | {1, 2, 3, 0}, |
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79 | {1, 2, 3, 0}, |
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80 | {4, 5, 6, 7}, |
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81 | {4, 5, 6, 7}, |
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82 | {4, 5, 6, 7}, |
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83 | {4, 5, 6, 7}, |
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84 | }; |
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85 | static int atom_def_dst[8] = { 0, 0, 1, 2, 0, 1, 2, 3 }; |
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86 | |||
87 | static int debug_depth = 0; |
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88 | #ifdef ATOM_DEBUG |
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89 | static void debug_print_spaces(int n) |
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90 | { |
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91 | while (n--) |
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92 | printk(" "); |
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93 | } |
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94 | |||
95 | #define DEBUG(...) do if (atom_debug) { printk(KERN_DEBUG __VA_ARGS__); } while (0) |
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96 | #define SDEBUG(...) do if (atom_debug) { printk(KERN_DEBUG); debug_print_spaces(debug_depth); printk(__VA_ARGS__); } while (0) |
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97 | #else |
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98 | #define DEBUG(...) do { } while (0) |
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99 | #define SDEBUG(...) do { } while (0) |
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100 | #endif |
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101 | |||
102 | static uint32_t atom_iio_execute(struct atom_context *ctx, int base, |
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103 | uint32_t index, uint32_t data) |
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104 | { |
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1963 | serge | 105 | struct radeon_device *rdev = ctx->card->dev->dev_private; |
1117 | serge | 106 | uint32_t temp = 0xCDCDCDCD; |
1963 | serge | 107 | |
1117 | serge | 108 | while (1) |
109 | switch (CU8(base)) { |
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110 | case ATOM_IIO_NOP: |
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111 | base++; |
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112 | break; |
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113 | case ATOM_IIO_READ: |
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1963 | serge | 114 | temp = ctx->card->ioreg_read(ctx->card, CU16(base + 1)); |
1117 | serge | 115 | base += 3; |
116 | break; |
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117 | case ATOM_IIO_WRITE: |
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1963 | serge | 118 | if (rdev->family == CHIP_RV515) |
119 | (void)ctx->card->ioreg_read(ctx->card, CU16(base + 1)); |
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120 | ctx->card->ioreg_write(ctx->card, CU16(base + 1), temp); |
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1117 | serge | 121 | base += 3; |
122 | break; |
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123 | case ATOM_IIO_CLEAR: |
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124 | temp &= |
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125 | ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << |
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126 | CU8(base + 2)); |
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127 | base += 3; |
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128 | break; |
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129 | case ATOM_IIO_SET: |
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130 | temp |= |
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131 | (0xFFFFFFFF >> (32 - CU8(base + 1))) << CU8(base + |
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132 | 2); |
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133 | base += 3; |
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134 | break; |
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135 | case ATOM_IIO_MOVE_INDEX: |
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136 | temp &= |
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137 | ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << |
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1963 | serge | 138 | CU8(base + 3)); |
1117 | serge | 139 | temp |= |
140 | ((index >> CU8(base + 2)) & |
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141 | (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + |
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142 | 3); |
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143 | base += 4; |
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144 | break; |
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145 | case ATOM_IIO_MOVE_DATA: |
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146 | temp &= |
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147 | ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << |
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1963 | serge | 148 | CU8(base + 3)); |
1117 | serge | 149 | temp |= |
150 | ((data >> CU8(base + 2)) & |
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151 | (0xFFFFFFFF >> (32 - CU8(base + 1)))) << CU8(base + |
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152 | 3); |
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153 | base += 4; |
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154 | break; |
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155 | case ATOM_IIO_MOVE_ATTR: |
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156 | temp &= |
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157 | ~((0xFFFFFFFF >> (32 - CU8(base + 1))) << |
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1963 | serge | 158 | CU8(base + 3)); |
1117 | serge | 159 | temp |= |
160 | ((ctx-> |
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161 | io_attr >> CU8(base + 2)) & (0xFFFFFFFF >> (32 - |
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162 | CU8 |
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163 | (base |
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164 | + |
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165 | 1)))) |
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166 | << CU8(base + 3); |
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167 | base += 4; |
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168 | break; |
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169 | case ATOM_IIO_END: |
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170 | return temp; |
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171 | default: |
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172 | printk(KERN_INFO "Unknown IIO opcode.\n"); |
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173 | return 0; |
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174 | } |
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175 | } |
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176 | |||
177 | static uint32_t atom_get_src_int(atom_exec_context *ctx, uint8_t attr, |
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178 | int *ptr, uint32_t *saved, int print) |
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179 | { |
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180 | uint32_t idx, val = 0xCDCDCDCD, align, arg; |
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181 | struct atom_context *gctx = ctx->ctx; |
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182 | arg = attr & 7; |
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183 | align = (attr >> 3) & 7; |
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184 | switch (arg) { |
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185 | case ATOM_ARG_REG: |
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186 | idx = U16(*ptr); |
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187 | (*ptr) += 2; |
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188 | if (print) |
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189 | DEBUG("REG[0x%04X]", idx); |
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190 | idx += gctx->reg_block; |
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191 | switch (gctx->io_mode) { |
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192 | case ATOM_IO_MM: |
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193 | val = gctx->card->reg_read(gctx->card, idx); |
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194 | break; |
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195 | case ATOM_IO_PCI: |
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196 | printk(KERN_INFO |
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197 | "PCI registers are not implemented.\n"); |
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198 | return 0; |
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199 | case ATOM_IO_SYSIO: |
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200 | printk(KERN_INFO |
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201 | "SYSIO registers are not implemented.\n"); |
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202 | return 0; |
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203 | default: |
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204 | if (!(gctx->io_mode & 0x80)) { |
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205 | printk(KERN_INFO "Bad IO mode.\n"); |
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206 | return 0; |
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207 | } |
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208 | if (!gctx->iio[gctx->io_mode & 0x7F]) { |
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209 | printk(KERN_INFO |
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210 | "Undefined indirect IO read method %d.\n", |
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211 | gctx->io_mode & 0x7F); |
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212 | return 0; |
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213 | } |
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214 | val = |
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215 | atom_iio_execute(gctx, |
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216 | gctx->iio[gctx->io_mode & 0x7F], |
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217 | idx, 0); |
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218 | } |
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219 | break; |
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220 | case ATOM_ARG_PS: |
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221 | idx = U8(*ptr); |
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222 | (*ptr)++; |
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1428 | serge | 223 | /* get_unaligned_le32 avoids unaligned accesses from atombios |
224 | * tables, noticed on a DEC Alpha. */ |
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225 | val = get_unaligned_le32((u32 *)&ctx->ps[idx]); |
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1117 | serge | 226 | if (print) |
227 | DEBUG("PS[0x%02X,0x%04X]", idx, val); |
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228 | break; |
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229 | case ATOM_ARG_WS: |
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230 | idx = U8(*ptr); |
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231 | (*ptr)++; |
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232 | if (print) |
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233 | DEBUG("WS[0x%02X]", idx); |
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234 | switch (idx) { |
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235 | case ATOM_WS_QUOTIENT: |
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236 | val = gctx->divmul[0]; |
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237 | break; |
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238 | case ATOM_WS_REMAINDER: |
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239 | val = gctx->divmul[1]; |
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240 | break; |
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241 | case ATOM_WS_DATAPTR: |
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242 | val = gctx->data_block; |
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243 | break; |
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244 | case ATOM_WS_SHIFT: |
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245 | val = gctx->shift; |
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246 | break; |
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247 | case ATOM_WS_OR_MASK: |
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248 | val = 1 << gctx->shift; |
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249 | break; |
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250 | case ATOM_WS_AND_MASK: |
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251 | val = ~(1 << gctx->shift); |
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252 | break; |
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253 | case ATOM_WS_FB_WINDOW: |
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254 | val = gctx->fb_base; |
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255 | break; |
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256 | case ATOM_WS_ATTRIBUTES: |
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257 | val = gctx->io_attr; |
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258 | break; |
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1403 | serge | 259 | case ATOM_WS_REGPTR: |
260 | val = gctx->reg_block; |
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261 | break; |
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1117 | serge | 262 | default: |
263 | val = ctx->ws[idx]; |
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264 | } |
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265 | break; |
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266 | case ATOM_ARG_ID: |
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267 | idx = U16(*ptr); |
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268 | (*ptr) += 2; |
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269 | if (print) { |
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270 | if (gctx->data_block) |
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271 | DEBUG("ID[0x%04X+%04X]", idx, gctx->data_block); |
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272 | else |
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273 | DEBUG("ID[0x%04X]", idx); |
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274 | } |
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275 | val = U32(idx + gctx->data_block); |
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276 | break; |
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277 | case ATOM_ARG_FB: |
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278 | idx = U8(*ptr); |
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279 | (*ptr)++; |
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2997 | Serge | 280 | if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { |
281 | DRM_ERROR("ATOM: fb read beyond scratch region: %d vs. %d\n", |
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282 | gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); |
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283 | val = 0; |
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284 | } else |
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285 | val = gctx->scratch[(gctx->fb_base / 4) + idx]; |
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1117 | serge | 286 | if (print) |
287 | DEBUG("FB[0x%02X]", idx); |
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1321 | serge | 288 | break; |
1117 | serge | 289 | case ATOM_ARG_IMM: |
290 | switch (align) { |
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291 | case ATOM_SRC_DWORD: |
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292 | val = U32(*ptr); |
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293 | (*ptr) += 4; |
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294 | if (print) |
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295 | DEBUG("IMM 0x%08X\n", val); |
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296 | return val; |
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297 | case ATOM_SRC_WORD0: |
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298 | case ATOM_SRC_WORD8: |
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299 | case ATOM_SRC_WORD16: |
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300 | val = U16(*ptr); |
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301 | (*ptr) += 2; |
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302 | if (print) |
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303 | DEBUG("IMM 0x%04X\n", val); |
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304 | return val; |
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305 | case ATOM_SRC_BYTE0: |
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306 | case ATOM_SRC_BYTE8: |
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307 | case ATOM_SRC_BYTE16: |
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308 | case ATOM_SRC_BYTE24: |
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309 | val = U8(*ptr); |
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310 | (*ptr)++; |
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311 | if (print) |
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312 | DEBUG("IMM 0x%02X\n", val); |
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313 | return val; |
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314 | } |
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315 | return 0; |
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316 | case ATOM_ARG_PLL: |
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317 | idx = U8(*ptr); |
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318 | (*ptr)++; |
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319 | if (print) |
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320 | DEBUG("PLL[0x%02X]", idx); |
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321 | val = gctx->card->pll_read(gctx->card, idx); |
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322 | break; |
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323 | case ATOM_ARG_MC: |
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324 | idx = U8(*ptr); |
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325 | (*ptr)++; |
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326 | if (print) |
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327 | DEBUG("MC[0x%02X]", idx); |
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328 | val = gctx->card->mc_read(gctx->card, idx); |
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329 | break; |
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330 | } |
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331 | if (saved) |
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332 | *saved = val; |
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333 | val &= atom_arg_mask[align]; |
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334 | val >>= atom_arg_shift[align]; |
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335 | if (print) |
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336 | switch (align) { |
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337 | case ATOM_SRC_DWORD: |
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338 | DEBUG(".[31:0] -> 0x%08X\n", val); |
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339 | break; |
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340 | case ATOM_SRC_WORD0: |
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341 | DEBUG(".[15:0] -> 0x%04X\n", val); |
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342 | break; |
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343 | case ATOM_SRC_WORD8: |
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344 | DEBUG(".[23:8] -> 0x%04X\n", val); |
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345 | break; |
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346 | case ATOM_SRC_WORD16: |
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347 | DEBUG(".[31:16] -> 0x%04X\n", val); |
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348 | break; |
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349 | case ATOM_SRC_BYTE0: |
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350 | DEBUG(".[7:0] -> 0x%02X\n", val); |
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351 | break; |
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352 | case ATOM_SRC_BYTE8: |
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353 | DEBUG(".[15:8] -> 0x%02X\n", val); |
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354 | break; |
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355 | case ATOM_SRC_BYTE16: |
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356 | DEBUG(".[23:16] -> 0x%02X\n", val); |
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357 | break; |
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358 | case ATOM_SRC_BYTE24: |
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359 | DEBUG(".[31:24] -> 0x%02X\n", val); |
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360 | break; |
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361 | } |
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362 | return val; |
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363 | } |
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364 | |||
365 | static void atom_skip_src_int(atom_exec_context *ctx, uint8_t attr, int *ptr) |
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366 | { |
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367 | uint32_t align = (attr >> 3) & 7, arg = attr & 7; |
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368 | switch (arg) { |
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369 | case ATOM_ARG_REG: |
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370 | case ATOM_ARG_ID: |
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371 | (*ptr) += 2; |
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372 | break; |
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373 | case ATOM_ARG_PLL: |
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374 | case ATOM_ARG_MC: |
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375 | case ATOM_ARG_PS: |
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376 | case ATOM_ARG_WS: |
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377 | case ATOM_ARG_FB: |
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378 | (*ptr)++; |
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379 | break; |
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380 | case ATOM_ARG_IMM: |
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381 | switch (align) { |
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382 | case ATOM_SRC_DWORD: |
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383 | (*ptr) += 4; |
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384 | return; |
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385 | case ATOM_SRC_WORD0: |
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386 | case ATOM_SRC_WORD8: |
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387 | case ATOM_SRC_WORD16: |
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388 | (*ptr) += 2; |
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389 | return; |
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390 | case ATOM_SRC_BYTE0: |
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391 | case ATOM_SRC_BYTE8: |
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392 | case ATOM_SRC_BYTE16: |
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393 | case ATOM_SRC_BYTE24: |
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394 | (*ptr)++; |
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395 | return; |
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396 | } |
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397 | return; |
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398 | } |
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399 | } |
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400 | |||
401 | static uint32_t atom_get_src(atom_exec_context *ctx, uint8_t attr, int *ptr) |
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402 | { |
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403 | return atom_get_src_int(ctx, attr, ptr, NULL, 1); |
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404 | } |
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405 | |||
1403 | serge | 406 | static uint32_t atom_get_src_direct(atom_exec_context *ctx, uint8_t align, int *ptr) |
407 | { |
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408 | uint32_t val = 0xCDCDCDCD; |
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409 | |||
410 | switch (align) { |
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411 | case ATOM_SRC_DWORD: |
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412 | val = U32(*ptr); |
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413 | (*ptr) += 4; |
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414 | break; |
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415 | case ATOM_SRC_WORD0: |
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416 | case ATOM_SRC_WORD8: |
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417 | case ATOM_SRC_WORD16: |
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418 | val = U16(*ptr); |
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419 | (*ptr) += 2; |
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420 | break; |
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421 | case ATOM_SRC_BYTE0: |
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422 | case ATOM_SRC_BYTE8: |
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423 | case ATOM_SRC_BYTE16: |
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424 | case ATOM_SRC_BYTE24: |
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425 | val = U8(*ptr); |
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426 | (*ptr)++; |
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427 | break; |
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428 | } |
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429 | return val; |
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430 | } |
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431 | |||
1117 | serge | 432 | static uint32_t atom_get_dst(atom_exec_context *ctx, int arg, uint8_t attr, |
433 | int *ptr, uint32_t *saved, int print) |
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434 | { |
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435 | return atom_get_src_int(ctx, |
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436 | arg | atom_dst_to_src[(attr >> 3) & |
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437 | 7][(attr >> 6) & 3] << 3, |
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438 | ptr, saved, print); |
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439 | } |
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440 | |||
441 | static void atom_skip_dst(atom_exec_context *ctx, int arg, uint8_t attr, int *ptr) |
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442 | { |
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443 | atom_skip_src_int(ctx, |
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444 | arg | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & |
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445 | 3] << 3, ptr); |
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446 | } |
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447 | |||
448 | static void atom_put_dst(atom_exec_context *ctx, int arg, uint8_t attr, |
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449 | int *ptr, uint32_t val, uint32_t saved) |
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450 | { |
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451 | uint32_t align = |
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452 | atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3], old_val = |
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453 | val, idx; |
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454 | struct atom_context *gctx = ctx->ctx; |
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455 | old_val &= atom_arg_mask[align] >> atom_arg_shift[align]; |
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456 | val <<= atom_arg_shift[align]; |
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457 | val &= atom_arg_mask[align]; |
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458 | saved &= ~atom_arg_mask[align]; |
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459 | val |= saved; |
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460 | switch (arg) { |
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461 | case ATOM_ARG_REG: |
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462 | idx = U16(*ptr); |
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463 | (*ptr) += 2; |
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464 | DEBUG("REG[0x%04X]", idx); |
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465 | idx += gctx->reg_block; |
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466 | switch (gctx->io_mode) { |
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467 | case ATOM_IO_MM: |
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468 | if (idx == 0) |
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469 | gctx->card->reg_write(gctx->card, idx, |
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470 | val << 2); |
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471 | else |
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472 | gctx->card->reg_write(gctx->card, idx, val); |
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473 | break; |
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474 | case ATOM_IO_PCI: |
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475 | printk(KERN_INFO |
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476 | "PCI registers are not implemented.\n"); |
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477 | return; |
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478 | case ATOM_IO_SYSIO: |
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479 | printk(KERN_INFO |
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480 | "SYSIO registers are not implemented.\n"); |
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481 | return; |
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482 | default: |
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483 | if (!(gctx->io_mode & 0x80)) { |
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484 | printk(KERN_INFO "Bad IO mode.\n"); |
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485 | return; |
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486 | } |
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487 | if (!gctx->iio[gctx->io_mode & 0xFF]) { |
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488 | printk(KERN_INFO |
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489 | "Undefined indirect IO write method %d.\n", |
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490 | gctx->io_mode & 0x7F); |
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491 | return; |
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492 | } |
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493 | atom_iio_execute(gctx, gctx->iio[gctx->io_mode & 0xFF], |
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494 | idx, val); |
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495 | } |
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496 | break; |
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497 | case ATOM_ARG_PS: |
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498 | idx = U8(*ptr); |
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499 | (*ptr)++; |
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500 | DEBUG("PS[0x%02X]", idx); |
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501 | ctx->ps[idx] = cpu_to_le32(val); |
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502 | break; |
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503 | case ATOM_ARG_WS: |
||
504 | idx = U8(*ptr); |
||
505 | (*ptr)++; |
||
506 | DEBUG("WS[0x%02X]", idx); |
||
507 | switch (idx) { |
||
508 | case ATOM_WS_QUOTIENT: |
||
509 | gctx->divmul[0] = val; |
||
510 | break; |
||
511 | case ATOM_WS_REMAINDER: |
||
512 | gctx->divmul[1] = val; |
||
513 | break; |
||
514 | case ATOM_WS_DATAPTR: |
||
515 | gctx->data_block = val; |
||
516 | break; |
||
517 | case ATOM_WS_SHIFT: |
||
518 | gctx->shift = val; |
||
519 | break; |
||
520 | case ATOM_WS_OR_MASK: |
||
521 | case ATOM_WS_AND_MASK: |
||
522 | break; |
||
523 | case ATOM_WS_FB_WINDOW: |
||
524 | gctx->fb_base = val; |
||
525 | break; |
||
526 | case ATOM_WS_ATTRIBUTES: |
||
527 | gctx->io_attr = val; |
||
528 | break; |
||
1403 | serge | 529 | case ATOM_WS_REGPTR: |
530 | gctx->reg_block = val; |
||
531 | break; |
||
1117 | serge | 532 | default: |
533 | ctx->ws[idx] = val; |
||
534 | } |
||
535 | break; |
||
536 | case ATOM_ARG_FB: |
||
537 | idx = U8(*ptr); |
||
538 | (*ptr)++; |
||
2997 | Serge | 539 | if ((gctx->fb_base + (idx * 4)) > gctx->scratch_size_bytes) { |
540 | DRM_ERROR("ATOM: fb write beyond scratch region: %d vs. %d\n", |
||
541 | gctx->fb_base + (idx * 4), gctx->scratch_size_bytes); |
||
542 | } else |
||
543 | gctx->scratch[(gctx->fb_base / 4) + idx] = val; |
||
1117 | serge | 544 | DEBUG("FB[0x%02X]", idx); |
1321 | serge | 545 | break; |
1117 | serge | 546 | case ATOM_ARG_PLL: |
547 | idx = U8(*ptr); |
||
548 | (*ptr)++; |
||
549 | DEBUG("PLL[0x%02X]", idx); |
||
550 | gctx->card->pll_write(gctx->card, idx, val); |
||
551 | break; |
||
552 | case ATOM_ARG_MC: |
||
553 | idx = U8(*ptr); |
||
554 | (*ptr)++; |
||
555 | DEBUG("MC[0x%02X]", idx); |
||
556 | gctx->card->mc_write(gctx->card, idx, val); |
||
557 | return; |
||
558 | } |
||
559 | switch (align) { |
||
560 | case ATOM_SRC_DWORD: |
||
561 | DEBUG(".[31:0] <- 0x%08X\n", old_val); |
||
562 | break; |
||
563 | case ATOM_SRC_WORD0: |
||
564 | DEBUG(".[15:0] <- 0x%04X\n", old_val); |
||
565 | break; |
||
566 | case ATOM_SRC_WORD8: |
||
567 | DEBUG(".[23:8] <- 0x%04X\n", old_val); |
||
568 | break; |
||
569 | case ATOM_SRC_WORD16: |
||
570 | DEBUG(".[31:16] <- 0x%04X\n", old_val); |
||
571 | break; |
||
572 | case ATOM_SRC_BYTE0: |
||
573 | DEBUG(".[7:0] <- 0x%02X\n", old_val); |
||
574 | break; |
||
575 | case ATOM_SRC_BYTE8: |
||
576 | DEBUG(".[15:8] <- 0x%02X\n", old_val); |
||
577 | break; |
||
578 | case ATOM_SRC_BYTE16: |
||
579 | DEBUG(".[23:16] <- 0x%02X\n", old_val); |
||
580 | break; |
||
581 | case ATOM_SRC_BYTE24: |
||
582 | DEBUG(".[31:24] <- 0x%02X\n", old_val); |
||
583 | break; |
||
584 | } |
||
585 | } |
||
586 | |||
587 | static void atom_op_add(atom_exec_context *ctx, int *ptr, int arg) |
||
588 | { |
||
589 | uint8_t attr = U8((*ptr)++); |
||
590 | uint32_t dst, src, saved; |
||
591 | int dptr = *ptr; |
||
592 | SDEBUG(" dst: "); |
||
593 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
594 | SDEBUG(" src: "); |
||
595 | src = atom_get_src(ctx, attr, ptr); |
||
596 | dst += src; |
||
597 | SDEBUG(" dst: "); |
||
598 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
599 | } |
||
600 | |||
601 | static void atom_op_and(atom_exec_context *ctx, int *ptr, int arg) |
||
602 | { |
||
603 | uint8_t attr = U8((*ptr)++); |
||
604 | uint32_t dst, src, saved; |
||
605 | int dptr = *ptr; |
||
606 | SDEBUG(" dst: "); |
||
607 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
608 | SDEBUG(" src: "); |
||
609 | src = atom_get_src(ctx, attr, ptr); |
||
610 | dst &= src; |
||
611 | SDEBUG(" dst: "); |
||
612 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
613 | } |
||
614 | |||
615 | static void atom_op_beep(atom_exec_context *ctx, int *ptr, int arg) |
||
616 | { |
||
617 | printk("ATOM BIOS beeped!\n"); |
||
618 | } |
||
619 | |||
620 | static void atom_op_calltable(atom_exec_context *ctx, int *ptr, int arg) |
||
621 | { |
||
622 | int idx = U8((*ptr)++); |
||
1963 | serge | 623 | int r = 0; |
624 | |||
1117 | serge | 625 | if (idx < ATOM_TABLE_NAMES_CNT) |
626 | SDEBUG(" table: %d (%s)\n", idx, atom_table_names[idx]); |
||
627 | else |
||
628 | SDEBUG(" table: %d\n", idx); |
||
629 | if (U16(ctx->ctx->cmd_table + 4 + 2 * idx)) |
||
1963 | serge | 630 | r = atom_execute_table_locked(ctx->ctx, idx, ctx->ps + ctx->ps_shift); |
631 | if (r) { |
||
632 | ctx->abort = true; |
||
633 | } |
||
1117 | serge | 634 | } |
635 | |||
636 | static void atom_op_clear(atom_exec_context *ctx, int *ptr, int arg) |
||
637 | { |
||
638 | uint8_t attr = U8((*ptr)++); |
||
639 | uint32_t saved; |
||
640 | int dptr = *ptr; |
||
641 | attr &= 0x38; |
||
642 | attr |= atom_def_dst[attr >> 3] << 6; |
||
643 | atom_get_dst(ctx, arg, attr, ptr, &saved, 0); |
||
644 | SDEBUG(" dst: "); |
||
645 | atom_put_dst(ctx, arg, attr, &dptr, 0, saved); |
||
646 | } |
||
647 | |||
648 | static void atom_op_compare(atom_exec_context *ctx, int *ptr, int arg) |
||
649 | { |
||
650 | uint8_t attr = U8((*ptr)++); |
||
651 | uint32_t dst, src; |
||
652 | SDEBUG(" src1: "); |
||
653 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); |
||
654 | SDEBUG(" src2: "); |
||
655 | src = atom_get_src(ctx, attr, ptr); |
||
656 | ctx->ctx->cs_equal = (dst == src); |
||
657 | ctx->ctx->cs_above = (dst > src); |
||
658 | SDEBUG(" result: %s %s\n", ctx->ctx->cs_equal ? "EQ" : "NE", |
||
659 | ctx->ctx->cs_above ? "GT" : "LE"); |
||
660 | } |
||
661 | |||
662 | static void atom_op_delay(atom_exec_context *ctx, int *ptr, int arg) |
||
663 | { |
||
1963 | serge | 664 | unsigned count = U8((*ptr)++); |
1117 | serge | 665 | SDEBUG(" count: %d\n", count); |
1119 | serge | 666 | if (arg == ATOM_UNIT_MICROSEC) |
667 | udelay(count); |
||
668 | else |
||
1963 | serge | 669 | msleep(count); |
1117 | serge | 670 | } |
671 | |||
672 | static void atom_op_div(atom_exec_context *ctx, int *ptr, int arg) |
||
673 | { |
||
674 | uint8_t attr = U8((*ptr)++); |
||
675 | uint32_t dst, src; |
||
676 | SDEBUG(" src1: "); |
||
677 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); |
||
678 | SDEBUG(" src2: "); |
||
679 | src = atom_get_src(ctx, attr, ptr); |
||
680 | if (src != 0) { |
||
681 | ctx->ctx->divmul[0] = dst / src; |
||
682 | ctx->ctx->divmul[1] = dst % src; |
||
683 | } else { |
||
684 | ctx->ctx->divmul[0] = 0; |
||
685 | ctx->ctx->divmul[1] = 0; |
||
686 | } |
||
687 | } |
||
688 | |||
689 | static void atom_op_eot(atom_exec_context *ctx, int *ptr, int arg) |
||
690 | { |
||
691 | /* functionally, a nop */ |
||
692 | } |
||
693 | |||
694 | static void atom_op_jump(atom_exec_context *ctx, int *ptr, int arg) |
||
695 | { |
||
696 | int execute = 0, target = U16(*ptr); |
||
1963 | serge | 697 | unsigned long cjiffies; |
698 | |||
1117 | serge | 699 | (*ptr) += 2; |
700 | switch (arg) { |
||
701 | case ATOM_COND_ABOVE: |
||
702 | execute = ctx->ctx->cs_above; |
||
703 | break; |
||
704 | case ATOM_COND_ABOVEOREQUAL: |
||
705 | execute = ctx->ctx->cs_above || ctx->ctx->cs_equal; |
||
706 | break; |
||
707 | case ATOM_COND_ALWAYS: |
||
708 | execute = 1; |
||
709 | break; |
||
710 | case ATOM_COND_BELOW: |
||
711 | execute = !(ctx->ctx->cs_above || ctx->ctx->cs_equal); |
||
712 | break; |
||
713 | case ATOM_COND_BELOWOREQUAL: |
||
714 | execute = !ctx->ctx->cs_above; |
||
715 | break; |
||
716 | case ATOM_COND_EQUAL: |
||
717 | execute = ctx->ctx->cs_equal; |
||
718 | break; |
||
719 | case ATOM_COND_NOTEQUAL: |
||
720 | execute = !ctx->ctx->cs_equal; |
||
721 | break; |
||
722 | } |
||
723 | if (arg != ATOM_COND_ALWAYS) |
||
724 | SDEBUG(" taken: %s\n", execute ? "yes" : "no"); |
||
725 | SDEBUG(" target: 0x%04X\n", target); |
||
2997 | Serge | 726 | if (execute) { |
727 | if (ctx->last_jump == (ctx->start + target)) { |
||
728 | cjiffies = GetTimerTicks(); |
||
729 | if (time_after(cjiffies, ctx->last_jump_jiffies)) { |
||
730 | cjiffies -= ctx->last_jump_jiffies; |
||
731 | if ((jiffies_to_msecs(cjiffies) > 5000)) { |
||
732 | DRM_ERROR("atombios stuck in loop for more than 5secs aborting\n"); |
||
733 | ctx->abort = true; |
||
734 | } |
||
735 | } else { |
||
736 | /* jiffies wrap around we will just wait a little longer */ |
||
737 | ctx->last_jump_jiffies = GetTimerTicks(); |
||
738 | } |
||
739 | } else { |
||
740 | ctx->last_jump = ctx->start + target; |
||
741 | ctx->last_jump_jiffies = GetTimerTicks(); |
||
742 | } |
||
1117 | serge | 743 | *ptr = ctx->start + target; |
2997 | Serge | 744 | } |
1117 | serge | 745 | } |
746 | |||
747 | static void atom_op_mask(atom_exec_context *ctx, int *ptr, int arg) |
||
748 | { |
||
749 | uint8_t attr = U8((*ptr)++); |
||
1963 | serge | 750 | uint32_t dst, mask, src, saved; |
1117 | serge | 751 | int dptr = *ptr; |
752 | SDEBUG(" dst: "); |
||
753 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
1963 | serge | 754 | mask = atom_get_src_direct(ctx, ((attr >> 3) & 7), ptr); |
755 | SDEBUG(" mask: 0x%08x", mask); |
||
756 | SDEBUG(" src: "); |
||
757 | src = atom_get_src(ctx, attr, ptr); |
||
758 | dst &= mask; |
||
759 | dst |= src; |
||
1117 | serge | 760 | SDEBUG(" dst: "); |
761 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
762 | } |
||
763 | |||
764 | static void atom_op_move(atom_exec_context *ctx, int *ptr, int arg) |
||
765 | { |
||
766 | uint8_t attr = U8((*ptr)++); |
||
767 | uint32_t src, saved; |
||
768 | int dptr = *ptr; |
||
769 | if (((attr >> 3) & 7) != ATOM_SRC_DWORD) |
||
770 | atom_get_dst(ctx, arg, attr, ptr, &saved, 0); |
||
771 | else { |
||
772 | atom_skip_dst(ctx, arg, attr, ptr); |
||
773 | saved = 0xCDCDCDCD; |
||
774 | } |
||
775 | SDEBUG(" src: "); |
||
776 | src = atom_get_src(ctx, attr, ptr); |
||
777 | SDEBUG(" dst: "); |
||
778 | atom_put_dst(ctx, arg, attr, &dptr, src, saved); |
||
779 | } |
||
780 | |||
781 | static void atom_op_mul(atom_exec_context *ctx, int *ptr, int arg) |
||
782 | { |
||
783 | uint8_t attr = U8((*ptr)++); |
||
784 | uint32_t dst, src; |
||
785 | SDEBUG(" src1: "); |
||
786 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); |
||
787 | SDEBUG(" src2: "); |
||
788 | src = atom_get_src(ctx, attr, ptr); |
||
789 | ctx->ctx->divmul[0] = dst * src; |
||
790 | } |
||
791 | |||
792 | static void atom_op_nop(atom_exec_context *ctx, int *ptr, int arg) |
||
793 | { |
||
794 | /* nothing */ |
||
795 | } |
||
796 | |||
797 | static void atom_op_or(atom_exec_context *ctx, int *ptr, int arg) |
||
798 | { |
||
799 | uint8_t attr = U8((*ptr)++); |
||
800 | uint32_t dst, src, saved; |
||
801 | int dptr = *ptr; |
||
802 | SDEBUG(" dst: "); |
||
803 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
804 | SDEBUG(" src: "); |
||
805 | src = atom_get_src(ctx, attr, ptr); |
||
806 | dst |= src; |
||
807 | SDEBUG(" dst: "); |
||
808 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
809 | } |
||
810 | |||
811 | static void atom_op_postcard(atom_exec_context *ctx, int *ptr, int arg) |
||
812 | { |
||
813 | uint8_t val = U8((*ptr)++); |
||
814 | SDEBUG("POST card output: 0x%02X\n", val); |
||
815 | } |
||
816 | |||
817 | static void atom_op_repeat(atom_exec_context *ctx, int *ptr, int arg) |
||
818 | { |
||
819 | printk(KERN_INFO "unimplemented!\n"); |
||
820 | } |
||
821 | |||
822 | static void atom_op_restorereg(atom_exec_context *ctx, int *ptr, int arg) |
||
823 | { |
||
824 | printk(KERN_INFO "unimplemented!\n"); |
||
825 | } |
||
826 | |||
827 | static void atom_op_savereg(atom_exec_context *ctx, int *ptr, int arg) |
||
828 | { |
||
829 | printk(KERN_INFO "unimplemented!\n"); |
||
830 | } |
||
831 | |||
832 | static void atom_op_setdatablock(atom_exec_context *ctx, int *ptr, int arg) |
||
833 | { |
||
834 | int idx = U8(*ptr); |
||
835 | (*ptr)++; |
||
836 | SDEBUG(" block: %d\n", idx); |
||
837 | if (!idx) |
||
838 | ctx->ctx->data_block = 0; |
||
839 | else if (idx == 255) |
||
840 | ctx->ctx->data_block = ctx->start; |
||
841 | else |
||
842 | ctx->ctx->data_block = U16(ctx->ctx->data_table + 4 + 2 * idx); |
||
843 | SDEBUG(" base: 0x%04X\n", ctx->ctx->data_block); |
||
844 | } |
||
845 | |||
846 | static void atom_op_setfbbase(atom_exec_context *ctx, int *ptr, int arg) |
||
847 | { |
||
848 | uint8_t attr = U8((*ptr)++); |
||
849 | SDEBUG(" fb_base: "); |
||
850 | ctx->ctx->fb_base = atom_get_src(ctx, attr, ptr); |
||
851 | } |
||
852 | |||
853 | static void atom_op_setport(atom_exec_context *ctx, int *ptr, int arg) |
||
854 | { |
||
855 | int port; |
||
856 | switch (arg) { |
||
857 | case ATOM_PORT_ATI: |
||
858 | port = U16(*ptr); |
||
859 | if (port < ATOM_IO_NAMES_CNT) |
||
860 | SDEBUG(" port: %d (%s)\n", port, atom_io_names[port]); |
||
861 | else |
||
862 | SDEBUG(" port: %d\n", port); |
||
863 | if (!port) |
||
864 | ctx->ctx->io_mode = ATOM_IO_MM; |
||
865 | else |
||
866 | ctx->ctx->io_mode = ATOM_IO_IIO | port; |
||
867 | (*ptr) += 2; |
||
868 | break; |
||
869 | case ATOM_PORT_PCI: |
||
870 | ctx->ctx->io_mode = ATOM_IO_PCI; |
||
871 | (*ptr)++; |
||
872 | break; |
||
873 | case ATOM_PORT_SYSIO: |
||
874 | ctx->ctx->io_mode = ATOM_IO_SYSIO; |
||
875 | (*ptr)++; |
||
876 | break; |
||
877 | } |
||
878 | } |
||
879 | |||
880 | static void atom_op_setregblock(atom_exec_context *ctx, int *ptr, int arg) |
||
881 | { |
||
882 | ctx->ctx->reg_block = U16(*ptr); |
||
883 | (*ptr) += 2; |
||
884 | SDEBUG(" base: 0x%04X\n", ctx->ctx->reg_block); |
||
885 | } |
||
886 | |||
1403 | serge | 887 | static void atom_op_shift_left(atom_exec_context *ctx, int *ptr, int arg) |
888 | { |
||
889 | uint8_t attr = U8((*ptr)++), shift; |
||
890 | uint32_t saved, dst; |
||
891 | int dptr = *ptr; |
||
892 | attr &= 0x38; |
||
893 | attr |= atom_def_dst[attr >> 3] << 6; |
||
894 | SDEBUG(" dst: "); |
||
895 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
896 | shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); |
||
897 | SDEBUG(" shift: %d\n", shift); |
||
898 | dst <<= shift; |
||
899 | SDEBUG(" dst: "); |
||
900 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
901 | } |
||
902 | |||
903 | static void atom_op_shift_right(atom_exec_context *ctx, int *ptr, int arg) |
||
904 | { |
||
905 | uint8_t attr = U8((*ptr)++), shift; |
||
906 | uint32_t saved, dst; |
||
907 | int dptr = *ptr; |
||
908 | attr &= 0x38; |
||
909 | attr |= atom_def_dst[attr >> 3] << 6; |
||
910 | SDEBUG(" dst: "); |
||
911 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
912 | shift = atom_get_src_direct(ctx, ATOM_SRC_BYTE0, ptr); |
||
913 | SDEBUG(" shift: %d\n", shift); |
||
914 | dst >>= shift; |
||
915 | SDEBUG(" dst: "); |
||
916 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
917 | } |
||
918 | |||
1117 | serge | 919 | static void atom_op_shl(atom_exec_context *ctx, int *ptr, int arg) |
920 | { |
||
921 | uint8_t attr = U8((*ptr)++), shift; |
||
922 | uint32_t saved, dst; |
||
923 | int dptr = *ptr; |
||
1963 | serge | 924 | uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; |
1117 | serge | 925 | SDEBUG(" dst: "); |
926 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
1963 | serge | 927 | /* op needs to full dst value */ |
928 | dst = saved; |
||
1403 | serge | 929 | shift = atom_get_src(ctx, attr, ptr); |
1117 | serge | 930 | SDEBUG(" shift: %d\n", shift); |
931 | dst <<= shift; |
||
1963 | serge | 932 | dst &= atom_arg_mask[dst_align]; |
933 | dst >>= atom_arg_shift[dst_align]; |
||
1117 | serge | 934 | SDEBUG(" dst: "); |
935 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
936 | } |
||
937 | |||
938 | static void atom_op_shr(atom_exec_context *ctx, int *ptr, int arg) |
||
939 | { |
||
940 | uint8_t attr = U8((*ptr)++), shift; |
||
941 | uint32_t saved, dst; |
||
942 | int dptr = *ptr; |
||
1963 | serge | 943 | uint32_t dst_align = atom_dst_to_src[(attr >> 3) & 7][(attr >> 6) & 3]; |
1117 | serge | 944 | SDEBUG(" dst: "); |
945 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
1963 | serge | 946 | /* op needs to full dst value */ |
947 | dst = saved; |
||
1403 | serge | 948 | shift = atom_get_src(ctx, attr, ptr); |
1117 | serge | 949 | SDEBUG(" shift: %d\n", shift); |
950 | dst >>= shift; |
||
1963 | serge | 951 | dst &= atom_arg_mask[dst_align]; |
952 | dst >>= atom_arg_shift[dst_align]; |
||
1117 | serge | 953 | SDEBUG(" dst: "); |
954 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
955 | } |
||
956 | |||
957 | static void atom_op_sub(atom_exec_context *ctx, int *ptr, int arg) |
||
958 | { |
||
959 | uint8_t attr = U8((*ptr)++); |
||
960 | uint32_t dst, src, saved; |
||
961 | int dptr = *ptr; |
||
962 | SDEBUG(" dst: "); |
||
963 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
964 | SDEBUG(" src: "); |
||
965 | src = atom_get_src(ctx, attr, ptr); |
||
966 | dst -= src; |
||
967 | SDEBUG(" dst: "); |
||
968 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
969 | } |
||
970 | |||
971 | static void atom_op_switch(atom_exec_context *ctx, int *ptr, int arg) |
||
972 | { |
||
973 | uint8_t attr = U8((*ptr)++); |
||
974 | uint32_t src, val, target; |
||
975 | SDEBUG(" switch: "); |
||
976 | src = atom_get_src(ctx, attr, ptr); |
||
977 | while (U16(*ptr) != ATOM_CASE_END) |
||
978 | if (U8(*ptr) == ATOM_CASE_MAGIC) { |
||
979 | (*ptr)++; |
||
980 | SDEBUG(" case: "); |
||
981 | val = |
||
982 | atom_get_src(ctx, (attr & 0x38) | ATOM_ARG_IMM, |
||
983 | ptr); |
||
984 | target = U16(*ptr); |
||
985 | if (val == src) { |
||
986 | SDEBUG(" target: %04X\n", target); |
||
987 | *ptr = ctx->start + target; |
||
988 | return; |
||
989 | } |
||
990 | (*ptr) += 2; |
||
991 | } else { |
||
992 | printk(KERN_INFO "Bad case.\n"); |
||
993 | return; |
||
994 | } |
||
995 | (*ptr) += 2; |
||
996 | } |
||
997 | |||
998 | static void atom_op_test(atom_exec_context *ctx, int *ptr, int arg) |
||
999 | { |
||
1000 | uint8_t attr = U8((*ptr)++); |
||
1001 | uint32_t dst, src; |
||
1002 | SDEBUG(" src1: "); |
||
1003 | dst = atom_get_dst(ctx, arg, attr, ptr, NULL, 1); |
||
1004 | SDEBUG(" src2: "); |
||
1005 | src = atom_get_src(ctx, attr, ptr); |
||
1006 | ctx->ctx->cs_equal = ((dst & src) == 0); |
||
1007 | SDEBUG(" result: %s\n", ctx->ctx->cs_equal ? "EQ" : "NE"); |
||
1008 | } |
||
1009 | |||
1010 | static void atom_op_xor(atom_exec_context *ctx, int *ptr, int arg) |
||
1011 | { |
||
1012 | uint8_t attr = U8((*ptr)++); |
||
1013 | uint32_t dst, src, saved; |
||
1014 | int dptr = *ptr; |
||
1015 | SDEBUG(" dst: "); |
||
1016 | dst = atom_get_dst(ctx, arg, attr, ptr, &saved, 1); |
||
1017 | SDEBUG(" src: "); |
||
1018 | src = atom_get_src(ctx, attr, ptr); |
||
1019 | dst ^= src; |
||
1020 | SDEBUG(" dst: "); |
||
1021 | atom_put_dst(ctx, arg, attr, &dptr, dst, saved); |
||
1022 | } |
||
1023 | |||
1024 | static void atom_op_debug(atom_exec_context *ctx, int *ptr, int arg) |
||
1025 | { |
||
1026 | printk(KERN_INFO "unimplemented!\n"); |
||
1027 | } |
||
1028 | |||
1029 | static struct { |
||
1030 | void (*func) (atom_exec_context *, int *, int); |
||
1031 | int arg; |
||
1032 | } opcode_table[ATOM_OP_CNT] = { |
||
1033 | { |
||
1034 | NULL, 0}, { |
||
1035 | atom_op_move, ATOM_ARG_REG}, { |
||
1036 | atom_op_move, ATOM_ARG_PS}, { |
||
1037 | atom_op_move, ATOM_ARG_WS}, { |
||
1038 | atom_op_move, ATOM_ARG_FB}, { |
||
1039 | atom_op_move, ATOM_ARG_PLL}, { |
||
1040 | atom_op_move, ATOM_ARG_MC}, { |
||
1041 | atom_op_and, ATOM_ARG_REG}, { |
||
1042 | atom_op_and, ATOM_ARG_PS}, { |
||
1043 | atom_op_and, ATOM_ARG_WS}, { |
||
1044 | atom_op_and, ATOM_ARG_FB}, { |
||
1045 | atom_op_and, ATOM_ARG_PLL}, { |
||
1046 | atom_op_and, ATOM_ARG_MC}, { |
||
1047 | atom_op_or, ATOM_ARG_REG}, { |
||
1048 | atom_op_or, ATOM_ARG_PS}, { |
||
1049 | atom_op_or, ATOM_ARG_WS}, { |
||
1050 | atom_op_or, ATOM_ARG_FB}, { |
||
1051 | atom_op_or, ATOM_ARG_PLL}, { |
||
1052 | atom_op_or, ATOM_ARG_MC}, { |
||
1403 | serge | 1053 | atom_op_shift_left, ATOM_ARG_REG}, { |
1054 | atom_op_shift_left, ATOM_ARG_PS}, { |
||
1055 | atom_op_shift_left, ATOM_ARG_WS}, { |
||
1056 | atom_op_shift_left, ATOM_ARG_FB}, { |
||
1057 | atom_op_shift_left, ATOM_ARG_PLL}, { |
||
1058 | atom_op_shift_left, ATOM_ARG_MC}, { |
||
1059 | atom_op_shift_right, ATOM_ARG_REG}, { |
||
1060 | atom_op_shift_right, ATOM_ARG_PS}, { |
||
1061 | atom_op_shift_right, ATOM_ARG_WS}, { |
||
1062 | atom_op_shift_right, ATOM_ARG_FB}, { |
||
1063 | atom_op_shift_right, ATOM_ARG_PLL}, { |
||
1064 | atom_op_shift_right, ATOM_ARG_MC}, { |
||
1117 | serge | 1065 | atom_op_mul, ATOM_ARG_REG}, { |
1066 | atom_op_mul, ATOM_ARG_PS}, { |
||
1067 | atom_op_mul, ATOM_ARG_WS}, { |
||
1068 | atom_op_mul, ATOM_ARG_FB}, { |
||
1069 | atom_op_mul, ATOM_ARG_PLL}, { |
||
1070 | atom_op_mul, ATOM_ARG_MC}, { |
||
1071 | atom_op_div, ATOM_ARG_REG}, { |
||
1072 | atom_op_div, ATOM_ARG_PS}, { |
||
1073 | atom_op_div, ATOM_ARG_WS}, { |
||
1074 | atom_op_div, ATOM_ARG_FB}, { |
||
1075 | atom_op_div, ATOM_ARG_PLL}, { |
||
1076 | atom_op_div, ATOM_ARG_MC}, { |
||
1077 | atom_op_add, ATOM_ARG_REG}, { |
||
1078 | atom_op_add, ATOM_ARG_PS}, { |
||
1079 | atom_op_add, ATOM_ARG_WS}, { |
||
1080 | atom_op_add, ATOM_ARG_FB}, { |
||
1081 | atom_op_add, ATOM_ARG_PLL}, { |
||
1082 | atom_op_add, ATOM_ARG_MC}, { |
||
1083 | atom_op_sub, ATOM_ARG_REG}, { |
||
1084 | atom_op_sub, ATOM_ARG_PS}, { |
||
1085 | atom_op_sub, ATOM_ARG_WS}, { |
||
1086 | atom_op_sub, ATOM_ARG_FB}, { |
||
1087 | atom_op_sub, ATOM_ARG_PLL}, { |
||
1088 | atom_op_sub, ATOM_ARG_MC}, { |
||
1089 | atom_op_setport, ATOM_PORT_ATI}, { |
||
1090 | atom_op_setport, ATOM_PORT_PCI}, { |
||
1091 | atom_op_setport, ATOM_PORT_SYSIO}, { |
||
1092 | atom_op_setregblock, 0}, { |
||
1093 | atom_op_setfbbase, 0}, { |
||
1094 | atom_op_compare, ATOM_ARG_REG}, { |
||
1095 | atom_op_compare, ATOM_ARG_PS}, { |
||
1096 | atom_op_compare, ATOM_ARG_WS}, { |
||
1097 | atom_op_compare, ATOM_ARG_FB}, { |
||
1098 | atom_op_compare, ATOM_ARG_PLL}, { |
||
1099 | atom_op_compare, ATOM_ARG_MC}, { |
||
1100 | atom_op_switch, 0}, { |
||
1101 | atom_op_jump, ATOM_COND_ALWAYS}, { |
||
1102 | atom_op_jump, ATOM_COND_EQUAL}, { |
||
1103 | atom_op_jump, ATOM_COND_BELOW}, { |
||
1104 | atom_op_jump, ATOM_COND_ABOVE}, { |
||
1105 | atom_op_jump, ATOM_COND_BELOWOREQUAL}, { |
||
1106 | atom_op_jump, ATOM_COND_ABOVEOREQUAL}, { |
||
1107 | atom_op_jump, ATOM_COND_NOTEQUAL}, { |
||
1108 | atom_op_test, ATOM_ARG_REG}, { |
||
1109 | atom_op_test, ATOM_ARG_PS}, { |
||
1110 | atom_op_test, ATOM_ARG_WS}, { |
||
1111 | atom_op_test, ATOM_ARG_FB}, { |
||
1112 | atom_op_test, ATOM_ARG_PLL}, { |
||
1113 | atom_op_test, ATOM_ARG_MC}, { |
||
1114 | atom_op_delay, ATOM_UNIT_MILLISEC}, { |
||
1115 | atom_op_delay, ATOM_UNIT_MICROSEC}, { |
||
1116 | atom_op_calltable, 0}, { |
||
1117 | atom_op_repeat, 0}, { |
||
1118 | atom_op_clear, ATOM_ARG_REG}, { |
||
1119 | atom_op_clear, ATOM_ARG_PS}, { |
||
1120 | atom_op_clear, ATOM_ARG_WS}, { |
||
1121 | atom_op_clear, ATOM_ARG_FB}, { |
||
1122 | atom_op_clear, ATOM_ARG_PLL}, { |
||
1123 | atom_op_clear, ATOM_ARG_MC}, { |
||
1124 | atom_op_nop, 0}, { |
||
1125 | atom_op_eot, 0}, { |
||
1126 | atom_op_mask, ATOM_ARG_REG}, { |
||
1127 | atom_op_mask, ATOM_ARG_PS}, { |
||
1128 | atom_op_mask, ATOM_ARG_WS}, { |
||
1129 | atom_op_mask, ATOM_ARG_FB}, { |
||
1130 | atom_op_mask, ATOM_ARG_PLL}, { |
||
1131 | atom_op_mask, ATOM_ARG_MC}, { |
||
1132 | atom_op_postcard, 0}, { |
||
1133 | atom_op_beep, 0}, { |
||
1134 | atom_op_savereg, 0}, { |
||
1135 | atom_op_restorereg, 0}, { |
||
1136 | atom_op_setdatablock, 0}, { |
||
1137 | atom_op_xor, ATOM_ARG_REG}, { |
||
1138 | atom_op_xor, ATOM_ARG_PS}, { |
||
1139 | atom_op_xor, ATOM_ARG_WS}, { |
||
1140 | atom_op_xor, ATOM_ARG_FB}, { |
||
1141 | atom_op_xor, ATOM_ARG_PLL}, { |
||
1142 | atom_op_xor, ATOM_ARG_MC}, { |
||
1143 | atom_op_shl, ATOM_ARG_REG}, { |
||
1144 | atom_op_shl, ATOM_ARG_PS}, { |
||
1145 | atom_op_shl, ATOM_ARG_WS}, { |
||
1146 | atom_op_shl, ATOM_ARG_FB}, { |
||
1147 | atom_op_shl, ATOM_ARG_PLL}, { |
||
1148 | atom_op_shl, ATOM_ARG_MC}, { |
||
1149 | atom_op_shr, ATOM_ARG_REG}, { |
||
1150 | atom_op_shr, ATOM_ARG_PS}, { |
||
1151 | atom_op_shr, ATOM_ARG_WS}, { |
||
1152 | atom_op_shr, ATOM_ARG_FB}, { |
||
1153 | atom_op_shr, ATOM_ARG_PLL}, { |
||
1154 | atom_op_shr, ATOM_ARG_MC}, { |
||
1155 | atom_op_debug, 0},}; |
||
1156 | |||
1963 | serge | 1157 | static int atom_execute_table_locked(struct atom_context *ctx, int index, uint32_t * params) |
1117 | serge | 1158 | { |
1159 | int base = CU16(ctx->cmd_table + 4 + 2 * index); |
||
1160 | int len, ws, ps, ptr; |
||
1161 | unsigned char op; |
||
1162 | atom_exec_context ectx; |
||
1963 | serge | 1163 | int ret = 0; |
1117 | serge | 1164 | |
1165 | if (!base) |
||
1963 | serge | 1166 | return -EINVAL; |
1117 | serge | 1167 | |
1168 | len = CU16(base + ATOM_CT_SIZE_PTR); |
||
1169 | ws = CU8(base + ATOM_CT_WS_PTR); |
||
1170 | ps = CU8(base + ATOM_CT_PS_PTR) & ATOM_CT_PS_MASK; |
||
1171 | ptr = base + ATOM_CT_CODE_PTR; |
||
1172 | |||
1173 | SDEBUG(">> execute %04X (len %d, WS %d, PS %d)\n", base, len, ws, ps); |
||
1174 | |||
1175 | ectx.ctx = ctx; |
||
1176 | ectx.ps_shift = ps / 4; |
||
1177 | ectx.start = base; |
||
1178 | ectx.ps = params; |
||
1963 | serge | 1179 | ectx.abort = false; |
1180 | ectx.last_jump = 0; |
||
1117 | serge | 1181 | if (ws) |
1182 | ectx.ws = kzalloc(4 * ws, GFP_KERNEL); |
||
1183 | else |
||
1184 | ectx.ws = NULL; |
||
1185 | |||
1186 | debug_depth++; |
||
1187 | while (1) { |
||
1188 | op = CU8(ptr++); |
||
1189 | if (op < ATOM_OP_NAMES_CNT) |
||
1190 | SDEBUG("%s @ 0x%04X\n", atom_op_names[op], ptr - 1); |
||
1191 | else |
||
1192 | SDEBUG("[%d] @ 0x%04X\n", op, ptr - 1); |
||
1963 | serge | 1193 | if (ectx.abort) { |
1194 | DRM_ERROR("atombios stuck executing %04X (len %d, WS %d, PS %d) @ 0x%04X\n", |
||
1195 | base, len, ws, ps, ptr - 1); |
||
1196 | ret = -EINVAL; |
||
1197 | goto free; |
||
1198 | } |
||
1117 | serge | 1199 | |
1200 | if (op < ATOM_OP_CNT && op > 0) |
||
1201 | opcode_table[op].func(&ectx, &ptr, |
||
1202 | opcode_table[op].arg); |
||
1203 | else |
||
1204 | break; |
||
1205 | |||
1206 | if (op == ATOM_OP_EOT) |
||
1207 | break; |
||
1208 | } |
||
1209 | debug_depth--; |
||
1210 | SDEBUG("<<\n"); |
||
1211 | |||
1963 | serge | 1212 | free: |
1117 | serge | 1213 | if (ws) |
1214 | kfree(ectx.ws); |
||
1963 | serge | 1215 | return ret; |
1117 | serge | 1216 | } |
1217 | |||
1963 | serge | 1218 | int atom_execute_table(struct atom_context *ctx, int index, uint32_t * params) |
1403 | serge | 1219 | { |
1963 | serge | 1220 | int r; |
1221 | |||
1403 | serge | 1222 | mutex_lock(&ctx->mutex); |
1223 | /* reset reg block */ |
||
1224 | ctx->reg_block = 0; |
||
1225 | /* reset fb window */ |
||
1226 | ctx->fb_base = 0; |
||
1227 | /* reset io mode */ |
||
1228 | ctx->io_mode = ATOM_IO_MM; |
||
1963 | serge | 1229 | r = atom_execute_table_locked(ctx, index, params); |
1403 | serge | 1230 | mutex_unlock(&ctx->mutex); |
1963 | serge | 1231 | return r; |
1403 | serge | 1232 | } |
1233 | |||
1117 | serge | 1234 | static int atom_iio_len[] = { 1, 2, 3, 3, 3, 3, 4, 4, 4, 3 }; |
1235 | |||
1236 | static void atom_index_iio(struct atom_context *ctx, int base) |
||
1237 | { |
||
1238 | ctx->iio = kzalloc(2 * 256, GFP_KERNEL); |
||
3764 | Serge | 1239 | if (!ctx->iio) |
1240 | return; |
||
1117 | serge | 1241 | while (CU8(base) == ATOM_IIO_START) { |
1242 | ctx->iio[CU8(base + 1)] = base + 2; |
||
1243 | base += 2; |
||
1244 | while (CU8(base) != ATOM_IIO_END) |
||
1245 | base += atom_iio_len[CU8(base)]; |
||
1246 | base += 3; |
||
1247 | } |
||
1248 | } |
||
1249 | |||
1250 | struct atom_context *atom_parse(struct card_info *card, void *bios) |
||
1251 | { |
||
1252 | int base; |
||
1253 | struct atom_context *ctx = |
||
1254 | kzalloc(sizeof(struct atom_context), GFP_KERNEL); |
||
1255 | char *str; |
||
1256 | char name[512]; |
||
1257 | int i; |
||
1258 | |||
2160 | serge | 1259 | if (!ctx) |
1260 | return NULL; |
||
1261 | |||
1117 | serge | 1262 | ctx->card = card; |
1263 | ctx->bios = bios; |
||
1264 | |||
1265 | if (CU16(0) != ATOM_BIOS_MAGIC) { |
||
1266 | printk(KERN_INFO "Invalid BIOS magic.\n"); |
||
1267 | kfree(ctx); |
||
1268 | return NULL; |
||
1269 | } |
||
1270 | if (strncmp |
||
1271 | (CSTR(ATOM_ATI_MAGIC_PTR), ATOM_ATI_MAGIC, |
||
1272 | strlen(ATOM_ATI_MAGIC))) { |
||
1273 | printk(KERN_INFO "Invalid ATI magic.\n"); |
||
1274 | kfree(ctx); |
||
1275 | return NULL; |
||
1276 | } |
||
1277 | |||
1278 | base = CU16(ATOM_ROM_TABLE_PTR); |
||
1279 | if (strncmp |
||
1280 | (CSTR(base + ATOM_ROM_MAGIC_PTR), ATOM_ROM_MAGIC, |
||
1281 | strlen(ATOM_ROM_MAGIC))) { |
||
1282 | printk(KERN_INFO "Invalid ATOM magic.\n"); |
||
1283 | kfree(ctx); |
||
1284 | return NULL; |
||
1285 | } |
||
1286 | |||
1287 | ctx->cmd_table = CU16(base + ATOM_ROM_CMD_PTR); |
||
1288 | ctx->data_table = CU16(base + ATOM_ROM_DATA_PTR); |
||
1289 | atom_index_iio(ctx, CU16(ctx->data_table + ATOM_DATA_IIO_PTR) + 4); |
||
3764 | Serge | 1290 | if (!ctx->iio) { |
1291 | atom_destroy(ctx); |
||
1292 | return NULL; |
||
1293 | } |
||
1117 | serge | 1294 | |
1295 | str = CSTR(CU16(base + ATOM_ROM_MSG_PTR)); |
||
1296 | while (*str && ((*str == '\n') || (*str == '\r'))) |
||
1297 | str++; |
||
1298 | /* name string isn't always 0 terminated */ |
||
1299 | for (i = 0; i < 511; i++) { |
||
1300 | name[i] = str[i]; |
||
1301 | if (name[i] < '.' || name[i] > 'z') { |
||
1302 | name[i] = 0; |
||
1303 | break; |
||
1304 | } |
||
1305 | } |
||
1306 | printk(KERN_INFO "ATOM BIOS: %s\n", name); |
||
1307 | |||
1308 | return ctx; |
||
1309 | } |
||
1310 | |||
1311 | int atom_asic_init(struct atom_context *ctx) |
||
1312 | { |
||
2997 | Serge | 1313 | struct radeon_device *rdev = ctx->card->dev->dev_private; |
1117 | serge | 1314 | int hwi = CU16(ctx->data_table + ATOM_DATA_FWI_PTR); |
1315 | uint32_t ps[16]; |
||
2997 | Serge | 1316 | int ret; |
1317 | |||
1117 | serge | 1318 | memset(ps, 0, 64); |
1319 | |||
1320 | ps[0] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFSCLK_PTR)); |
||
1321 | ps[1] = cpu_to_le32(CU32(hwi + ATOM_FWI_DEFMCLK_PTR)); |
||
1322 | if (!ps[0] || !ps[1]) |
||
1323 | return 1; |
||
1324 | |||
1325 | if (!CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_INIT)) |
||
1326 | return 1; |
||
2997 | Serge | 1327 | ret = atom_execute_table(ctx, ATOM_CMD_INIT, ps); |
1328 | if (ret) |
||
1329 | return ret; |
||
1330 | |||
1331 | memset(ps, 0, 64); |
||
1332 | |||
1333 | if (rdev->family < CHIP_R600) { |
||
1334 | if (CU16(ctx->cmd_table + 4 + 2 * ATOM_CMD_SPDFANCNTL)) |
||
1335 | atom_execute_table(ctx, ATOM_CMD_SPDFANCNTL, ps); |
||
1336 | } |
||
1337 | return ret; |
||
1117 | serge | 1338 | } |
1339 | |||
1340 | void atom_destroy(struct atom_context *ctx) |
||
1341 | { |
||
1342 | kfree(ctx->iio); |
||
1343 | kfree(ctx); |
||
1344 | } |
||
1345 | |||
1963 | serge | 1346 | bool atom_parse_data_header(struct atom_context *ctx, int index, |
1117 | serge | 1347 | uint16_t * size, uint8_t * frev, uint8_t * crev, |
1348 | uint16_t * data_start) |
||
1349 | { |
||
1350 | int offset = index * 2 + 4; |
||
1351 | int idx = CU16(ctx->data_table + offset); |
||
1963 | serge | 1352 | u16 *mdt = (u16 *)(ctx->bios + ctx->data_table + 4); |
1117 | serge | 1353 | |
1963 | serge | 1354 | if (!mdt[index]) |
1355 | return false; |
||
1356 | |||
1117 | serge | 1357 | if (size) |
1358 | *size = CU16(idx); |
||
1359 | if (frev) |
||
1360 | *frev = CU8(idx + 2); |
||
1361 | if (crev) |
||
1362 | *crev = CU8(idx + 3); |
||
1363 | *data_start = idx; |
||
1963 | serge | 1364 | return true; |
1117 | serge | 1365 | } |
1366 | |||
1963 | serge | 1367 | bool atom_parse_cmd_header(struct atom_context *ctx, int index, uint8_t * frev, |
1117 | serge | 1368 | uint8_t * crev) |
1369 | { |
||
1370 | int offset = index * 2 + 4; |
||
1371 | int idx = CU16(ctx->cmd_table + offset); |
||
1963 | serge | 1372 | u16 *mct = (u16 *)(ctx->bios + ctx->cmd_table + 4); |
1117 | serge | 1373 | |
1963 | serge | 1374 | if (!mct[index]) |
1375 | return false; |
||
1376 | |||
1117 | serge | 1377 | if (frev) |
1378 | *frev = CU8(idx + 2); |
||
1379 | if (crev) |
||
1380 | *crev = CU8(idx + 3); |
||
1963 | serge | 1381 | return true; |
1117 | serge | 1382 | } |
1321 | serge | 1383 | |
1384 | int atom_allocate_fb_scratch(struct atom_context *ctx) |
||
1385 | { |
||
1386 | int index = GetIndexIntoMasterTable(DATA, VRAM_UsageByFirmware); |
||
1387 | uint16_t data_offset; |
||
1963 | serge | 1388 | int usage_bytes = 0; |
1321 | serge | 1389 | struct _ATOM_VRAM_USAGE_BY_FIRMWARE *firmware_usage; |
1390 | |||
1963 | serge | 1391 | if (atom_parse_data_header(ctx, index, NULL, NULL, NULL, &data_offset)) { |
1321 | serge | 1392 | firmware_usage = (struct _ATOM_VRAM_USAGE_BY_FIRMWARE *)(ctx->bios + data_offset); |
1393 | |||
1394 | DRM_DEBUG("atom firmware requested %08x %dkb\n", |
||
3764 | Serge | 1395 | le32_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].ulStartAddrUsedByFirmware), |
1396 | le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb)); |
||
1321 | serge | 1397 | |
3764 | Serge | 1398 | usage_bytes = le16_to_cpu(firmware_usage->asFirmwareVramReserveInfo[0].usFirmwareUseInKb) * 1024; |
1963 | serge | 1399 | } |
2997 | Serge | 1400 | ctx->scratch_size_bytes = 0; |
1321 | serge | 1401 | if (usage_bytes == 0) |
1402 | usage_bytes = 20 * 1024; |
||
1403 | /* allocate some scratch memory */ |
||
1404 | ctx->scratch = kzalloc(usage_bytes, GFP_KERNEL); |
||
1405 | if (!ctx->scratch) |
||
1406 | return -ENOMEM; |
||
2997 | Serge | 1407 | ctx->scratch_size_bytes = usage_bytes; |
1321 | serge | 1408 | return 0; |
1409 | }>>>\n"); |