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Rev | Author | Line No. | Line |
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2326 | Serge | 1 | /* |
2 | * Copyright (c) 2006 Dave Airlie |
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3 | * Copyright (c) 2007-2008 Intel Corporation |
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4 | * Jesse Barnes |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the "Software"), |
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8 | * to deal in the Software without restriction, including without limitation |
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9 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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10 | * and/or sell copies of the Software, and to permit persons to whom the |
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11 | * Software is furnished to do so, subject to the following conditions: |
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12 | * |
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13 | * The above copyright notice and this permission notice (including the next |
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14 | * paragraph) shall be included in all copies or substantial portions of the |
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15 | * Software. |
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16 | * |
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17 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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18 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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19 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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20 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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21 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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22 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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23 | * IN THE SOFTWARE. |
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24 | */ |
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25 | #ifndef __INTEL_DRV_H__ |
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26 | #define __INTEL_DRV_H__ |
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27 | |||
28 | #include |
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2342 | Serge | 29 | #include "i915_drm.h" |
2326 | Serge | 30 | #include "i915_drv.h" |
31 | #include "drm_crtc.h" |
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32 | #include "drm_crtc_helper.h" |
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33 | #include "drm_fb_helper.h" |
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2330 | Serge | 34 | #include |
2326 | Serge | 35 | |
36 | #define _wait_for(COND, MS, W) ({ \ |
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37 | unsigned long timeout__ = jiffies + msecs_to_jiffies(MS); \ |
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38 | int ret__ = 0; \ |
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2342 | Serge | 39 | while (!(COND)) { \ |
2326 | Serge | 40 | if (time_after(jiffies, timeout__)) { \ |
41 | ret__ = -ETIMEDOUT; \ |
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42 | break; \ |
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43 | } \ |
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2330 | Serge | 44 | if (W) msleep(W); \ |
2326 | Serge | 45 | } \ |
46 | ret__; \ |
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47 | }) |
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48 | |||
49 | #define wait_for(COND, MS) _wait_for(COND, MS, 1) |
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50 | #define wait_for_atomic(COND, MS) _wait_for(COND, MS, 0) |
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51 | |||
52 | #define MSLEEP(x) do { \ |
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53 | if (in_dbg_master()) \ |
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54 | mdelay(x); \ |
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55 | else \ |
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56 | msleep(x); \ |
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57 | } while(0) |
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58 | |||
59 | #define KHz(x) (1000*x) |
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60 | #define MHz(x) KHz(1000*x) |
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61 | |||
62 | /* |
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63 | * Display related stuff |
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64 | */ |
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65 | |||
66 | /* store information about an Ixxx DVO */ |
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67 | /* The i830->i865 use multiple DVOs with multiple i2cs */ |
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68 | /* the i915, i945 have a single sDVO i2c bus - which is different */ |
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69 | #define MAX_OUTPUTS 6 |
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70 | /* maximum connectors per crtcs in the mode set */ |
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71 | #define INTELFB_CONN_LIMIT 4 |
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72 | |||
73 | #define INTEL_I2C_BUS_DVO 1 |
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74 | #define INTEL_I2C_BUS_SDVO 2 |
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75 | |||
76 | /* these are outputs from the chip - integrated only |
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77 | external chips are via DVO or SDVO output */ |
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78 | #define INTEL_OUTPUT_UNUSED 0 |
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79 | #define INTEL_OUTPUT_ANALOG 1 |
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80 | #define INTEL_OUTPUT_DVO 2 |
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81 | #define INTEL_OUTPUT_SDVO 3 |
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82 | #define INTEL_OUTPUT_LVDS 4 |
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83 | #define INTEL_OUTPUT_TVOUT 5 |
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84 | #define INTEL_OUTPUT_HDMI 6 |
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85 | #define INTEL_OUTPUT_DISPLAYPORT 7 |
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86 | #define INTEL_OUTPUT_EDP 8 |
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87 | |||
88 | /* Intel Pipe Clone Bit */ |
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89 | #define INTEL_HDMIB_CLONE_BIT 1 |
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90 | #define INTEL_HDMIC_CLONE_BIT 2 |
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91 | #define INTEL_HDMID_CLONE_BIT 3 |
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92 | #define INTEL_HDMIE_CLONE_BIT 4 |
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93 | #define INTEL_HDMIF_CLONE_BIT 5 |
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94 | #define INTEL_SDVO_NON_TV_CLONE_BIT 6 |
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95 | #define INTEL_SDVO_TV_CLONE_BIT 7 |
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96 | #define INTEL_SDVO_LVDS_CLONE_BIT 8 |
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97 | #define INTEL_ANALOG_CLONE_BIT 9 |
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98 | #define INTEL_TV_CLONE_BIT 10 |
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99 | #define INTEL_DP_B_CLONE_BIT 11 |
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100 | #define INTEL_DP_C_CLONE_BIT 12 |
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101 | #define INTEL_DP_D_CLONE_BIT 13 |
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102 | #define INTEL_LVDS_CLONE_BIT 14 |
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103 | #define INTEL_DVO_TMDS_CLONE_BIT 15 |
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104 | #define INTEL_DVO_LVDS_CLONE_BIT 16 |
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105 | #define INTEL_EDP_CLONE_BIT 17 |
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106 | |||
107 | #define INTEL_DVO_CHIP_NONE 0 |
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108 | #define INTEL_DVO_CHIP_LVDS 1 |
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109 | #define INTEL_DVO_CHIP_TMDS 2 |
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110 | #define INTEL_DVO_CHIP_TVOUT 4 |
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111 | |||
112 | /* drm_display_mode->private_flags */ |
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113 | #define INTEL_MODE_PIXEL_MULTIPLIER_SHIFT (0x0) |
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114 | #define INTEL_MODE_PIXEL_MULTIPLIER_MASK (0xf << INTEL_MODE_PIXEL_MULTIPLIER_SHIFT) |
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2342 | Serge | 115 | #define INTEL_MODE_DP_FORCE_6BPC (0x10) |
2326 | Serge | 116 | |
117 | static inline void |
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118 | intel_mode_set_pixel_multiplier(struct drm_display_mode *mode, |
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119 | int multiplier) |
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120 | { |
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121 | mode->clock *= multiplier; |
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122 | mode->private_flags |= multiplier; |
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123 | } |
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124 | |||
125 | static inline int |
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126 | intel_mode_get_pixel_multiplier(const struct drm_display_mode *mode) |
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127 | { |
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128 | return (mode->private_flags & INTEL_MODE_PIXEL_MULTIPLIER_MASK) >> INTEL_MODE_PIXEL_MULTIPLIER_SHIFT; |
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129 | } |
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130 | |||
131 | struct intel_framebuffer { |
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132 | struct drm_framebuffer base; |
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133 | struct drm_i915_gem_object *obj; |
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134 | }; |
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135 | |||
136 | struct intel_fbdev { |
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137 | struct drm_fb_helper helper; |
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138 | struct intel_framebuffer ifb; |
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139 | struct list_head fbdev_list; |
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140 | struct drm_display_mode *our_mode; |
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141 | }; |
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142 | |||
143 | struct intel_encoder { |
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144 | struct drm_encoder base; |
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145 | int type; |
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146 | bool needs_tv_clock; |
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147 | void (*hot_plug)(struct intel_encoder *); |
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148 | int crtc_mask; |
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149 | int clone_mask; |
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150 | }; |
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151 | |||
152 | struct intel_connector { |
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153 | struct drm_connector base; |
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154 | struct intel_encoder *encoder; |
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155 | }; |
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156 | |||
157 | struct intel_crtc { |
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158 | struct drm_crtc base; |
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159 | enum pipe pipe; |
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160 | enum plane plane; |
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161 | u8 lut_r[256], lut_g[256], lut_b[256]; |
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162 | int dpms_mode; |
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163 | bool active; /* is the crtc on? independent of the dpms mode */ |
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164 | bool busy; /* is scanout buffer being updated frequently? */ |
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165 | struct timer_list idle_timer; |
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166 | bool lowfreq_avail; |
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167 | struct intel_overlay *overlay; |
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168 | struct intel_unpin_work *unpin_work; |
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169 | int fdi_lanes; |
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170 | |||
171 | struct drm_i915_gem_object *cursor_bo; |
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172 | uint32_t cursor_addr; |
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173 | int16_t cursor_x, cursor_y; |
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174 | int16_t cursor_width, cursor_height; |
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175 | bool cursor_visible; |
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176 | unsigned int bpp; |
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2342 | Serge | 177 | |
178 | bool no_pll; /* tertiary pipe for IVB */ |
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179 | bool use_pll_a; |
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2326 | Serge | 180 | }; |
181 | |||
2342 | Serge | 182 | struct intel_plane { |
183 | struct drm_plane base; |
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184 | enum pipe pipe; |
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185 | struct drm_i915_gem_object *obj; |
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186 | bool primary_disabled; |
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187 | int max_downscale; |
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188 | u32 lut_r[1024], lut_g[1024], lut_b[1024]; |
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189 | void (*update_plane)(struct drm_plane *plane, |
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190 | struct drm_framebuffer *fb, |
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191 | struct drm_i915_gem_object *obj, |
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192 | int crtc_x, int crtc_y, |
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193 | unsigned int crtc_w, unsigned int crtc_h, |
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194 | uint32_t x, uint32_t y, |
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195 | uint32_t src_w, uint32_t src_h); |
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196 | void (*disable_plane)(struct drm_plane *plane); |
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197 | int (*update_colorkey)(struct drm_plane *plane, |
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198 | struct drm_intel_sprite_colorkey *key); |
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199 | void (*get_colorkey)(struct drm_plane *plane, |
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200 | struct drm_intel_sprite_colorkey *key); |
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201 | }; |
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202 | |||
2326 | Serge | 203 | #define to_intel_crtc(x) container_of(x, struct intel_crtc, base) |
204 | #define to_intel_connector(x) container_of(x, struct intel_connector, base) |
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205 | #define to_intel_encoder(x) container_of(x, struct intel_encoder, base) |
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206 | #define to_intel_framebuffer(x) container_of(x, struct intel_framebuffer, base) |
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2342 | Serge | 207 | #define to_intel_plane(x) container_of(x, struct intel_plane, base) |
2326 | Serge | 208 | |
209 | #define DIP_HEADER_SIZE 5 |
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210 | |||
211 | #define DIP_TYPE_AVI 0x82 |
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212 | #define DIP_VERSION_AVI 0x2 |
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213 | #define DIP_LEN_AVI 13 |
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214 | |||
2342 | Serge | 215 | #define DIP_TYPE_SPD 0x83 |
2326 | Serge | 216 | #define DIP_VERSION_SPD 0x1 |
217 | #define DIP_LEN_SPD 25 |
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218 | #define DIP_SPD_UNKNOWN 0 |
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219 | #define DIP_SPD_DSTB 0x1 |
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220 | #define DIP_SPD_DVDP 0x2 |
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221 | #define DIP_SPD_DVHS 0x3 |
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222 | #define DIP_SPD_HDDVR 0x4 |
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223 | #define DIP_SPD_DVC 0x5 |
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224 | #define DIP_SPD_DSC 0x6 |
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225 | #define DIP_SPD_VCD 0x7 |
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226 | #define DIP_SPD_GAME 0x8 |
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227 | #define DIP_SPD_PC 0x9 |
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228 | #define DIP_SPD_BD 0xa |
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229 | #define DIP_SPD_SCD 0xb |
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230 | |||
231 | struct dip_infoframe { |
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232 | uint8_t type; /* HB0 */ |
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233 | uint8_t ver; /* HB1 */ |
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234 | uint8_t len; /* HB2 - body len, not including checksum */ |
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235 | uint8_t ecc; /* Header ECC */ |
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236 | uint8_t checksum; /* PB0 */ |
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237 | union { |
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238 | struct { |
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239 | /* PB1 - Y 6:5, A 4:4, B 3:2, S 1:0 */ |
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240 | uint8_t Y_A_B_S; |
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241 | /* PB2 - C 7:6, M 5:4, R 3:0 */ |
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242 | uint8_t C_M_R; |
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243 | /* PB3 - ITC 7:7, EC 6:4, Q 3:2, SC 1:0 */ |
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244 | uint8_t ITC_EC_Q_SC; |
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245 | /* PB4 - VIC 6:0 */ |
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246 | uint8_t VIC; |
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247 | /* PB5 - PR 3:0 */ |
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248 | uint8_t PR; |
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249 | /* PB6 to PB13 */ |
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250 | uint16_t top_bar_end; |
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251 | uint16_t bottom_bar_start; |
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252 | uint16_t left_bar_end; |
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253 | uint16_t right_bar_start; |
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254 | } avi; |
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255 | struct { |
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256 | uint8_t vn[8]; |
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257 | uint8_t pd[16]; |
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258 | uint8_t sdi; |
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259 | } spd; |
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260 | uint8_t payload[27]; |
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261 | } __attribute__ ((packed)) body; |
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262 | } __attribute__((packed)); |
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263 | |||
264 | static inline struct drm_crtc * |
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265 | intel_get_crtc_for_pipe(struct drm_device *dev, int pipe) |
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266 | { |
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267 | struct drm_i915_private *dev_priv = dev->dev_private; |
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268 | return dev_priv->pipe_to_crtc_mapping[pipe]; |
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269 | } |
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270 | |||
271 | static inline struct drm_crtc * |
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272 | intel_get_crtc_for_plane(struct drm_device *dev, int plane) |
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273 | { |
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274 | struct drm_i915_private *dev_priv = dev->dev_private; |
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275 | return dev_priv->plane_to_crtc_mapping[plane]; |
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276 | } |
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277 | |||
278 | struct intel_unpin_work { |
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2360 | Serge | 279 | struct work_struct work; |
2326 | Serge | 280 | struct drm_device *dev; |
281 | struct drm_i915_gem_object *old_fb_obj; |
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282 | struct drm_i915_gem_object *pending_flip_obj; |
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283 | struct drm_pending_vblank_event *event; |
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284 | int pending; |
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285 | bool enable_stall_check; |
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286 | }; |
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287 | |||
288 | struct intel_fbc_work { |
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2360 | Serge | 289 | struct delayed_work work; |
2326 | Serge | 290 | struct drm_crtc *crtc; |
291 | struct drm_framebuffer *fb; |
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292 | int interval; |
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293 | }; |
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294 | |||
295 | int intel_ddc_get_modes(struct drm_connector *c, struct i2c_adapter *adapter); |
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296 | extern bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus); |
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297 | |||
298 | extern void intel_attach_force_audio_property(struct drm_connector *connector); |
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299 | extern void intel_attach_broadcast_rgb_property(struct drm_connector *connector); |
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300 | |||
301 | extern void intel_crt_init(struct drm_device *dev); |
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302 | extern void intel_hdmi_init(struct drm_device *dev, int sdvox_reg); |
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303 | void intel_dip_infoframe_csum(struct dip_infoframe *avi_if); |
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304 | extern bool intel_sdvo_init(struct drm_device *dev, int output_device); |
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305 | extern void intel_dvo_init(struct drm_device *dev); |
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306 | extern void intel_tv_init(struct drm_device *dev); |
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307 | extern void intel_mark_busy(struct drm_device *dev, |
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308 | struct drm_i915_gem_object *obj); |
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309 | extern bool intel_lvds_init(struct drm_device *dev); |
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310 | extern void intel_dp_init(struct drm_device *dev, int dp_reg); |
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311 | void |
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312 | intel_dp_set_m_n(struct drm_crtc *crtc, struct drm_display_mode *mode, |
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313 | struct drm_display_mode *adjusted_mode); |
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314 | extern bool intel_dpd_is_edp(struct drm_device *dev); |
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2342 | Serge | 315 | extern void intel_edp_link_config(struct intel_encoder *, int *, int *); |
2326 | Serge | 316 | extern bool intel_encoder_is_pch_edp(struct drm_encoder *encoder); |
2342 | Serge | 317 | extern int intel_plane_init(struct drm_device *dev, enum pipe pipe); |
2326 | Serge | 318 | |
319 | /* intel_panel.c */ |
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320 | extern void intel_fixed_panel_mode(struct drm_display_mode *fixed_mode, |
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321 | struct drm_display_mode *adjusted_mode); |
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322 | extern void intel_pch_panel_fitting(struct drm_device *dev, |
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323 | int fitting_mode, |
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324 | struct drm_display_mode *mode, |
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325 | struct drm_display_mode *adjusted_mode); |
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326 | extern u32 intel_panel_get_max_backlight(struct drm_device *dev); |
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327 | extern u32 intel_panel_get_backlight(struct drm_device *dev); |
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328 | extern void intel_panel_set_backlight(struct drm_device *dev, u32 level); |
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329 | extern int intel_panel_setup_backlight(struct drm_device *dev); |
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330 | extern void intel_panel_enable_backlight(struct drm_device *dev); |
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331 | extern void intel_panel_disable_backlight(struct drm_device *dev); |
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332 | extern void intel_panel_destroy_backlight(struct drm_device *dev); |
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333 | extern enum drm_connector_status intel_panel_detect(struct drm_device *dev); |
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334 | |||
335 | extern void intel_crtc_load_lut(struct drm_crtc *crtc); |
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2342 | Serge | 336 | extern void intel_encoder_prepare(struct drm_encoder *encoder); |
337 | extern void intel_encoder_commit(struct drm_encoder *encoder); |
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2326 | Serge | 338 | extern void intel_encoder_destroy(struct drm_encoder *encoder); |
339 | |||
340 | static inline struct intel_encoder *intel_attached_encoder(struct drm_connector *connector) |
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341 | { |
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342 | return to_intel_connector(connector)->encoder; |
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343 | } |
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344 | |||
345 | extern void intel_connector_attach_encoder(struct intel_connector *connector, |
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346 | struct intel_encoder *encoder); |
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347 | extern struct drm_encoder *intel_best_encoder(struct drm_connector *connector); |
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348 | |||
349 | extern struct drm_display_mode *intel_crtc_mode_get(struct drm_device *dev, |
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350 | struct drm_crtc *crtc); |
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351 | int intel_get_pipe_from_crtc_id(struct drm_device *dev, void *data, |
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352 | struct drm_file *file_priv); |
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353 | extern void intel_wait_for_vblank(struct drm_device *dev, int pipe); |
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354 | extern void intel_wait_for_pipe_off(struct drm_device *dev, int pipe); |
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355 | |||
356 | struct intel_load_detect_pipe { |
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357 | struct drm_framebuffer *release_fb; |
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358 | bool load_detect_temp; |
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359 | int dpms_mode; |
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360 | }; |
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361 | extern bool intel_get_load_detect_pipe(struct intel_encoder *intel_encoder, |
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362 | struct drm_connector *connector, |
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363 | struct drm_display_mode *mode, |
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364 | struct intel_load_detect_pipe *old); |
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365 | extern void intel_release_load_detect_pipe(struct intel_encoder *intel_encoder, |
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366 | struct drm_connector *connector, |
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367 | struct intel_load_detect_pipe *old); |
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368 | |||
369 | extern void intelfb_restore(void); |
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370 | extern void intel_crtc_fb_gamma_set(struct drm_crtc *crtc, u16 red, u16 green, |
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371 | u16 blue, int regno); |
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372 | extern void intel_crtc_fb_gamma_get(struct drm_crtc *crtc, u16 *red, u16 *green, |
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373 | u16 *blue, int regno); |
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374 | extern void intel_enable_clock_gating(struct drm_device *dev); |
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375 | extern void ironlake_enable_drps(struct drm_device *dev); |
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376 | extern void ironlake_disable_drps(struct drm_device *dev); |
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377 | extern void gen6_enable_rps(struct drm_i915_private *dev_priv); |
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378 | extern void gen6_update_ring_freq(struct drm_i915_private *dev_priv); |
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379 | extern void gen6_disable_rps(struct drm_device *dev); |
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380 | extern void intel_init_emon(struct drm_device *dev); |
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381 | |||
382 | extern int intel_pin_and_fence_fb_obj(struct drm_device *dev, |
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383 | struct drm_i915_gem_object *obj, |
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384 | struct intel_ring_buffer *pipelined); |
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385 | |||
386 | extern int intel_framebuffer_init(struct drm_device *dev, |
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387 | struct intel_framebuffer *ifb, |
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2342 | Serge | 388 | struct drm_mode_fb_cmd2 *mode_cmd, |
2326 | Serge | 389 | struct drm_i915_gem_object *obj); |
390 | extern int intel_fbdev_init(struct drm_device *dev); |
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391 | extern void intel_fbdev_fini(struct drm_device *dev); |
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392 | |||
393 | extern void intel_prepare_page_flip(struct drm_device *dev, int plane); |
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394 | extern void intel_finish_page_flip(struct drm_device *dev, int pipe); |
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395 | extern void intel_finish_page_flip_plane(struct drm_device *dev, int plane); |
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396 | |||
397 | extern void intel_setup_overlay(struct drm_device *dev); |
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398 | extern void intel_cleanup_overlay(struct drm_device *dev); |
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399 | extern int intel_overlay_switch_off(struct intel_overlay *overlay); |
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400 | extern int intel_overlay_put_image(struct drm_device *dev, void *data, |
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401 | struct drm_file *file_priv); |
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402 | extern int intel_overlay_attrs(struct drm_device *dev, void *data, |
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403 | struct drm_file *file_priv); |
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404 | |||
405 | extern void intel_fb_output_poll_changed(struct drm_device *dev); |
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406 | extern void intel_fb_restore_mode(struct drm_device *dev); |
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407 | |||
2342 | Serge | 408 | extern void assert_pipe(struct drm_i915_private *dev_priv, enum pipe pipe, |
409 | bool state); |
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410 | #define assert_pipe_enabled(d, p) assert_pipe(d, p, true) |
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411 | #define assert_pipe_disabled(d, p) assert_pipe(d, p, false) |
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412 | |||
2326 | Serge | 413 | extern void intel_init_clock_gating(struct drm_device *dev); |
2342 | Serge | 414 | extern void intel_write_eld(struct drm_encoder *encoder, |
415 | struct drm_display_mode *mode); |
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416 | extern void intel_cpt_verify_modeset(struct drm_device *dev, int pipe); |
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417 | |||
418 | /* For use by IVB LP watermark workaround in intel_sprite.c */ |
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419 | extern void sandybridge_update_wm(struct drm_device *dev); |
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420 | extern void intel_update_sprite_watermarks(struct drm_device *dev, int pipe, |
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421 | uint32_t sprite_width, |
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422 | int pixel_size); |
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423 | |||
424 | extern int intel_sprite_set_colorkey(struct drm_device *dev, void *data, |
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425 | struct drm_file *file_priv); |
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426 | extern int intel_sprite_get_colorkey(struct drm_device *dev, void *data, |
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427 | struct drm_file *file_priv); |
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428 | |||
2326 | Serge | 429 | #endif /* __INTEL_DRV_H__ */><> |