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Rev | Author | Line No. | Line |
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3263 | Serge | 1 | /* |
2 | * Copyright © 2008,2010 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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21 | * IN THE SOFTWARE. |
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22 | * |
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23 | * Authors: |
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24 | * Eric Anholt |
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25 | * Chris Wilson |
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26 | * |
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27 | */ |
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28 | |||
29 | #include |
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30 | #include |
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31 | #include "i915_drv.h" |
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32 | #include "i915_trace.h" |
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33 | #include "intel_drv.h" |
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34 | //#include |
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35 | |||
36 | |||
37 | static unsigned long |
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38 | copy_to_user(void __user *to, const void *from, unsigned long n) |
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39 | { |
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40 | memcpy(to, from, n); |
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41 | return 0; |
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42 | } |
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43 | |||
44 | static unsigned long |
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45 | copy_from_user(void *to, const void __user *from, unsigned long n) |
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46 | { |
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47 | memcpy(to, from, n); |
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48 | return 0; |
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49 | } |
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50 | |||
51 | struct eb_objects { |
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3480 | Serge | 52 | struct list_head objects; |
3263 | Serge | 53 | int and; |
3480 | Serge | 54 | union { |
55 | struct drm_i915_gem_object *lut[0]; |
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3263 | Serge | 56 | struct hlist_head buckets[0]; |
3480 | Serge | 57 | }; |
3263 | Serge | 58 | }; |
59 | |||
60 | static struct eb_objects * |
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3480 | Serge | 61 | eb_create(struct drm_i915_gem_execbuffer2 *args) |
3263 | Serge | 62 | { |
3480 | Serge | 63 | struct eb_objects *eb = NULL; |
64 | |||
65 | if (args->flags & I915_EXEC_HANDLE_LUT) { |
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66 | int size = args->buffer_count; |
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67 | size *= sizeof(struct drm_i915_gem_object *); |
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68 | size += sizeof(struct eb_objects); |
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69 | eb = kmalloc(size, GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY); |
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70 | } |
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71 | |||
72 | if (eb == NULL) { |
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73 | int size = args->buffer_count; |
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3263 | Serge | 74 | int count = PAGE_SIZE / sizeof(struct hlist_head) / 2; |
3480 | Serge | 75 | BUILD_BUG_ON_NOT_POWER_OF_2(PAGE_SIZE / sizeof(struct hlist_head)); |
76 | while (count > 2*size) |
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3263 | Serge | 77 | count >>= 1; |
78 | eb = kzalloc(count*sizeof(struct hlist_head) + |
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79 | sizeof(struct eb_objects), |
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3480 | Serge | 80 | GFP_TEMPORARY); |
3263 | Serge | 81 | if (eb == NULL) |
82 | return eb; |
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83 | |||
84 | eb->and = count - 1; |
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3480 | Serge | 85 | } else |
86 | eb->and = -args->buffer_count; |
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87 | |||
88 | INIT_LIST_HEAD(&eb->objects); |
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3263 | Serge | 89 | return eb; |
90 | } |
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91 | |||
92 | static void |
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93 | eb_reset(struct eb_objects *eb) |
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94 | { |
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3480 | Serge | 95 | if (eb->and >= 0) |
3263 | Serge | 96 | memset(eb->buckets, 0, (eb->and+1)*sizeof(struct hlist_head)); |
97 | } |
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98 | |||
3480 | Serge | 99 | static int |
100 | eb_lookup_objects(struct eb_objects *eb, |
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101 | struct drm_i915_gem_exec_object2 *exec, |
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102 | const struct drm_i915_gem_execbuffer2 *args, |
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103 | struct drm_file *file) |
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3263 | Serge | 104 | { |
3480 | Serge | 105 | int i; |
106 | |||
107 | spin_lock(&file->table_lock); |
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108 | for (i = 0; i < args->buffer_count; i++) { |
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109 | struct drm_i915_gem_object *obj; |
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110 | |||
111 | obj = to_intel_bo(idr_find(&file->object_idr, exec[i].handle)); |
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112 | if (obj == NULL) { |
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113 | spin_unlock(&file->table_lock); |
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114 | DRM_DEBUG("Invalid object handle %d at index %d\n", |
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115 | exec[i].handle, i); |
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116 | return -ENOENT; |
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117 | } |
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118 | |||
119 | if (!list_empty(&obj->exec_list)) { |
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120 | spin_unlock(&file->table_lock); |
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121 | DRM_DEBUG("Object %p [handle %d, index %d] appears more than once in object list\n", |
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122 | obj, exec[i].handle, i); |
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123 | return -EINVAL; |
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124 | } |
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125 | |||
126 | drm_gem_object_reference(&obj->base); |
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127 | list_add_tail(&obj->exec_list, &eb->objects); |
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128 | |||
129 | obj->exec_entry = &exec[i]; |
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130 | if (eb->and < 0) { |
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131 | eb->lut[i] = obj; |
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132 | } else { |
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133 | uint32_t handle = args->flags & I915_EXEC_HANDLE_LUT ? i : exec[i].handle; |
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134 | obj->exec_handle = handle; |
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3263 | Serge | 135 | hlist_add_head(&obj->exec_node, |
3480 | Serge | 136 | &eb->buckets[handle & eb->and]); |
137 | } |
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138 | } |
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139 | spin_unlock(&file->table_lock); |
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140 | |||
141 | return 0; |
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3263 | Serge | 142 | } |
143 | |||
144 | static struct drm_i915_gem_object * |
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145 | eb_get_object(struct eb_objects *eb, unsigned long handle) |
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146 | { |
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3480 | Serge | 147 | if (eb->and < 0) { |
148 | if (handle >= -eb->and) |
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149 | return NULL; |
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150 | return eb->lut[handle]; |
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151 | } else { |
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3263 | Serge | 152 | struct hlist_head *head; |
153 | struct hlist_node *node; |
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154 | |||
155 | head = &eb->buckets[handle & eb->and]; |
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156 | hlist_for_each(node, head) { |
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3480 | Serge | 157 | struct drm_i915_gem_object *obj; |
158 | |||
3263 | Serge | 159 | obj = hlist_entry(node, struct drm_i915_gem_object, exec_node); |
160 | if (obj->exec_handle == handle) |
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161 | return obj; |
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162 | } |
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163 | return NULL; |
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3480 | Serge | 164 | } |
3263 | Serge | 165 | } |
166 | |||
167 | static void |
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168 | eb_destroy(struct eb_objects *eb) |
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169 | { |
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3480 | Serge | 170 | while (!list_empty(&eb->objects)) { |
171 | struct drm_i915_gem_object *obj; |
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172 | |||
173 | obj = list_first_entry(&eb->objects, |
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174 | struct drm_i915_gem_object, |
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175 | exec_list); |
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176 | list_del_init(&obj->exec_list); |
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177 | drm_gem_object_unreference(&obj->base); |
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178 | } |
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3263 | Serge | 179 | kfree(eb); |
180 | } |
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181 | |||
182 | static inline int use_cpu_reloc(struct drm_i915_gem_object *obj) |
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183 | { |
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184 | return (obj->base.write_domain == I915_GEM_DOMAIN_CPU || |
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185 | !obj->map_and_fenceable || |
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186 | obj->cache_level != I915_CACHE_NONE); |
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187 | } |
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188 | |||
189 | static int |
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4371 | Serge | 190 | relocate_entry_cpu(struct drm_i915_gem_object *obj, |
191 | struct drm_i915_gem_relocation_entry *reloc) |
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192 | { |
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193 | uint32_t page_offset = offset_in_page(reloc->offset); |
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194 | char *vaddr; |
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195 | int ret = -EINVAL; |
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196 | |||
197 | ret = i915_gem_object_set_to_cpu_domain(obj, 1); |
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198 | if (ret) |
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199 | return ret; |
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200 | |||
201 | vaddr = (char *)MapIoMem((addr_t)i915_gem_object_get_page(obj, |
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202 | reloc->offset >> PAGE_SHIFT), 4096, 3); |
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203 | *(uint32_t *)(vaddr + page_offset) = reloc->delta; |
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204 | FreeKernelSpace(vaddr); |
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205 | |||
206 | return 0; |
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207 | } |
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208 | |||
209 | static int |
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210 | relocate_entry_gtt(struct drm_i915_gem_object *obj, |
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211 | struct drm_i915_gem_relocation_entry *reloc) |
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212 | { |
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213 | struct drm_device *dev = obj->base.dev; |
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214 | struct drm_i915_private *dev_priv = dev->dev_private; |
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215 | uint32_t __iomem *reloc_entry; |
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216 | void __iomem *reloc_page; |
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217 | int ret = -EINVAL; |
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218 | |||
219 | ret = i915_gem_object_set_to_gtt_domain(obj, true); |
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220 | if (ret) |
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221 | return ret; |
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222 | |||
223 | ret = i915_gem_object_put_fence(obj); |
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224 | if (ret) |
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225 | return ret; |
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226 | |||
227 | /* Map the page containing the relocation we're going to perform. */ |
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228 | reloc->offset += i915_gem_obj_ggtt_offset(obj); |
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229 | reloc_page = (void*)MapIoMem(dev_priv->gtt.mappable_base + |
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230 | (reloc->offset & PAGE_MASK), 4096, 0x18|3); |
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231 | reloc_entry = (uint32_t __iomem *) |
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232 | (reloc_page + offset_in_page(reloc->offset)); |
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233 | iowrite32(reloc->delta, reloc_entry); |
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234 | FreeKernelSpace(reloc_page); |
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235 | |||
236 | return 0; |
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237 | } |
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238 | |||
239 | static int |
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3263 | Serge | 240 | i915_gem_execbuffer_relocate_entry(struct drm_i915_gem_object *obj, |
241 | struct eb_objects *eb, |
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4104 | Serge | 242 | struct drm_i915_gem_relocation_entry *reloc, |
243 | struct i915_address_space *vm) |
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3263 | Serge | 244 | { |
245 | struct drm_device *dev = obj->base.dev; |
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246 | struct drm_gem_object *target_obj; |
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247 | struct drm_i915_gem_object *target_i915_obj; |
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248 | uint32_t target_offset; |
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249 | int ret = -EINVAL; |
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250 | |||
251 | /* we've already hold a reference to all valid objects */ |
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252 | target_obj = &eb_get_object(eb, reloc->target_handle)->base; |
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253 | if (unlikely(target_obj == NULL)) |
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254 | return -ENOENT; |
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255 | |||
256 | target_i915_obj = to_intel_bo(target_obj); |
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4104 | Serge | 257 | target_offset = i915_gem_obj_ggtt_offset(target_i915_obj); |
3263 | Serge | 258 | |
259 | /* Sandybridge PPGTT errata: We need a global gtt mapping for MI and |
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260 | * pipe_control writes because the gpu doesn't properly redirect them |
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261 | * through the ppgtt for non_secure batchbuffers. */ |
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262 | if (unlikely(IS_GEN6(dev) && |
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263 | reloc->write_domain == I915_GEM_DOMAIN_INSTRUCTION && |
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264 | !target_i915_obj->has_global_gtt_mapping)) { |
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265 | i915_gem_gtt_bind_object(target_i915_obj, |
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266 | target_i915_obj->cache_level); |
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267 | } |
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268 | |||
269 | /* Validate that the target is in a valid r/w GPU domain */ |
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270 | if (unlikely(reloc->write_domain & (reloc->write_domain - 1))) { |
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271 | DRM_DEBUG("reloc with multiple write domains: " |
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272 | "obj %p target %d offset %d " |
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273 | "read %08x write %08x", |
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274 | obj, reloc->target_handle, |
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275 | (int) reloc->offset, |
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276 | reloc->read_domains, |
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277 | reloc->write_domain); |
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278 | return ret; |
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279 | } |
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280 | if (unlikely((reloc->write_domain | reloc->read_domains) |
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281 | & ~I915_GEM_GPU_DOMAINS)) { |
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282 | DRM_DEBUG("reloc with read/write non-GPU domains: " |
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283 | "obj %p target %d offset %d " |
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284 | "read %08x write %08x", |
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285 | obj, reloc->target_handle, |
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286 | (int) reloc->offset, |
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287 | reloc->read_domains, |
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288 | reloc->write_domain); |
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289 | return ret; |
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290 | } |
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291 | |||
292 | target_obj->pending_read_domains |= reloc->read_domains; |
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293 | target_obj->pending_write_domain |= reloc->write_domain; |
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294 | |||
295 | /* If the relocation already has the right value in it, no |
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296 | * more work needs to be done. |
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297 | */ |
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298 | if (target_offset == reloc->presumed_offset) |
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299 | return 0; |
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300 | |||
301 | /* Check that the relocation address is valid... */ |
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302 | if (unlikely(reloc->offset > obj->base.size - 4)) { |
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303 | DRM_DEBUG("Relocation beyond object bounds: " |
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304 | "obj %p target %d offset %d size %d.\n", |
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305 | obj, reloc->target_handle, |
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306 | (int) reloc->offset, |
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307 | (int) obj->base.size); |
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308 | return ret; |
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309 | } |
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310 | if (unlikely(reloc->offset & 3)) { |
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311 | DRM_DEBUG("Relocation not 4-byte aligned: " |
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312 | "obj %p target %d offset %d.\n", |
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313 | obj, reloc->target_handle, |
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314 | (int) reloc->offset); |
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315 | return ret; |
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316 | } |
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317 | |||
318 | /* We can't wait for rendering with pagefaults disabled */ |
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319 | |||
320 | reloc->delta += target_offset; |
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4371 | Serge | 321 | if (use_cpu_reloc(obj)) |
322 | ret = relocate_entry_cpu(obj, reloc); |
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323 | else |
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324 | ret = relocate_entry_gtt(obj, reloc); |
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3263 | Serge | 325 | |
326 | if (ret) |
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327 | return ret; |
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328 | |||
329 | /* and update the user's relocation entry */ |
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330 | reloc->presumed_offset = target_offset; |
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331 | |||
332 | return 0; |
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333 | } |
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334 | |||
335 | static int |
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336 | i915_gem_execbuffer_relocate_object(struct drm_i915_gem_object *obj, |
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4104 | Serge | 337 | struct eb_objects *eb, |
338 | struct i915_address_space *vm) |
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3263 | Serge | 339 | { |
340 | #define N_RELOC(x) ((x) / sizeof(struct drm_i915_gem_relocation_entry)) |
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3266 | Serge | 341 | struct drm_i915_gem_relocation_entry stack_reloc[N_RELOC(64)]; |
3263 | Serge | 342 | struct drm_i915_gem_relocation_entry __user *user_relocs; |
343 | struct drm_i915_gem_exec_object2 *entry = obj->exec_entry; |
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344 | int remain, ret; |
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345 | |||
346 | user_relocs = (void __user *)(uintptr_t)entry->relocs_ptr; |
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347 | |||
348 | remain = entry->relocation_count; |
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349 | while (remain) { |
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350 | struct drm_i915_gem_relocation_entry *r = stack_reloc; |
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351 | int count = remain; |
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352 | if (count > ARRAY_SIZE(stack_reloc)) |
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353 | count = ARRAY_SIZE(stack_reloc); |
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354 | remain -= count; |
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355 | |||
356 | memcpy(r, user_relocs, count*sizeof(r[0])); |
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357 | |||
358 | do { |
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359 | u64 offset = r->presumed_offset; |
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360 | |||
4104 | Serge | 361 | ret = i915_gem_execbuffer_relocate_entry(obj, eb, r, |
362 | vm); |
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3263 | Serge | 363 | if (ret) |
364 | return ret; |
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365 | |||
4392 | Serge | 366 | if (r->presumed_offset != offset) |
367 | { |
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3263 | Serge | 368 | memcpy(&user_relocs->presumed_offset, |
369 | &r->presumed_offset, |
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370 | sizeof(r->presumed_offset)); |
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4392 | Serge | 371 | } |
3263 | Serge | 372 | |
373 | user_relocs++; |
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374 | r++; |
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375 | } while (--count); |
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376 | } |
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377 | |||
378 | return 0; |
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379 | #undef N_RELOC |
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380 | } |
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381 | |||
382 | static int |
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383 | i915_gem_execbuffer_relocate_object_slow(struct drm_i915_gem_object *obj, |
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384 | struct eb_objects *eb, |
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4104 | Serge | 385 | struct drm_i915_gem_relocation_entry *relocs, |
386 | struct i915_address_space *vm) |
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3263 | Serge | 387 | { |
388 | const struct drm_i915_gem_exec_object2 *entry = obj->exec_entry; |
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389 | int i, ret; |
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390 | |||
391 | for (i = 0; i < entry->relocation_count; i++) { |
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4104 | Serge | 392 | ret = i915_gem_execbuffer_relocate_entry(obj, eb, &relocs[i], |
393 | vm); |
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3263 | Serge | 394 | if (ret) |
395 | return ret; |
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396 | } |
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397 | |||
398 | return 0; |
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399 | } |
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400 | |||
401 | static int |
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4104 | Serge | 402 | i915_gem_execbuffer_relocate(struct eb_objects *eb, |
403 | struct i915_address_space *vm) |
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3263 | Serge | 404 | { |
405 | struct drm_i915_gem_object *obj; |
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406 | int ret = 0; |
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407 | |||
408 | /* This is the fast path and we cannot handle a pagefault whilst |
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409 | * holding the struct mutex lest the user pass in the relocations |
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410 | * contained within a mmaped bo. For in such a case we, the page |
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411 | * fault handler would call i915_gem_fault() and we would try to |
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412 | * acquire the struct mutex again. Obviously this is bad and so |
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413 | * lockdep complains vehemently. |
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414 | */ |
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4104 | Serge | 415 | // pagefault_disable(); |
3480 | Serge | 416 | list_for_each_entry(obj, &eb->objects, exec_list) { |
4104 | Serge | 417 | ret = i915_gem_execbuffer_relocate_object(obj, eb, vm); |
3263 | Serge | 418 | if (ret) |
419 | break; |
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420 | } |
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421 | // pagefault_enable(); |
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422 | |||
423 | return ret; |
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424 | } |
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425 | |||
426 | #define __EXEC_OBJECT_HAS_PIN (1<<31) |
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427 | #define __EXEC_OBJECT_HAS_FENCE (1<<30) |
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428 | |||
429 | static int |
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430 | need_reloc_mappable(struct drm_i915_gem_object *obj) |
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431 | { |
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432 | struct drm_i915_gem_exec_object2 *entry = obj->exec_entry; |
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433 | return entry->relocation_count && !use_cpu_reloc(obj); |
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434 | } |
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435 | |||
436 | static int |
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437 | i915_gem_execbuffer_reserve_object(struct drm_i915_gem_object *obj, |
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3480 | Serge | 438 | struct intel_ring_buffer *ring, |
4104 | Serge | 439 | struct i915_address_space *vm, |
3480 | Serge | 440 | bool *need_reloc) |
3263 | Serge | 441 | { |
442 | struct drm_i915_private *dev_priv = obj->base.dev->dev_private; |
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443 | struct drm_i915_gem_exec_object2 *entry = obj->exec_entry; |
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444 | bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; |
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445 | bool need_fence, need_mappable; |
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446 | int ret; |
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447 | |||
448 | need_fence = |
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449 | has_fenced_gpu_access && |
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450 | entry->flags & EXEC_OBJECT_NEEDS_FENCE && |
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451 | obj->tiling_mode != I915_TILING_NONE; |
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452 | need_mappable = need_fence || need_reloc_mappable(obj); |
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453 | |||
4104 | Serge | 454 | ret = i915_gem_object_pin(obj, vm, entry->alignment, need_mappable, |
455 | false); |
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3263 | Serge | 456 | if (ret) |
457 | return ret; |
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458 | |||
459 | entry->flags |= __EXEC_OBJECT_HAS_PIN; |
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460 | |||
461 | if (has_fenced_gpu_access) { |
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462 | if (entry->flags & EXEC_OBJECT_NEEDS_FENCE) { |
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463 | ret = i915_gem_object_get_fence(obj); |
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464 | if (ret) |
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465 | return ret; |
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466 | |||
467 | if (i915_gem_object_pin_fence(obj)) |
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468 | entry->flags |= __EXEC_OBJECT_HAS_FENCE; |
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469 | |||
470 | obj->pending_fenced_gpu_access = true; |
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471 | } |
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472 | } |
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473 | |||
474 | /* Ensure ppgtt mapping exists if needed */ |
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475 | if (dev_priv->mm.aliasing_ppgtt && !obj->has_aliasing_ppgtt_mapping) { |
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476 | i915_ppgtt_bind_object(dev_priv->mm.aliasing_ppgtt, |
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477 | obj, obj->cache_level); |
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478 | |||
479 | obj->has_aliasing_ppgtt_mapping = 1; |
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480 | } |
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481 | |||
4104 | Serge | 482 | if (entry->offset != i915_gem_obj_offset(obj, vm)) { |
483 | entry->offset = i915_gem_obj_offset(obj, vm); |
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3480 | Serge | 484 | *need_reloc = true; |
485 | } |
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3266 | Serge | 486 | |
3480 | Serge | 487 | if (entry->flags & EXEC_OBJECT_WRITE) { |
488 | obj->base.pending_read_domains = I915_GEM_DOMAIN_RENDER; |
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489 | obj->base.pending_write_domain = I915_GEM_DOMAIN_RENDER; |
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490 | } |
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491 | |||
492 | if (entry->flags & EXEC_OBJECT_NEEDS_GTT && |
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493 | !obj->has_global_gtt_mapping) |
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494 | i915_gem_gtt_bind_object(obj, obj->cache_level); |
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495 | |||
3263 | Serge | 496 | return 0; |
497 | } |
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498 | |||
499 | static void |
||
500 | i915_gem_execbuffer_unreserve_object(struct drm_i915_gem_object *obj) |
||
501 | { |
||
502 | struct drm_i915_gem_exec_object2 *entry; |
||
503 | |||
4104 | Serge | 504 | if (!i915_gem_obj_bound_any(obj)) |
3263 | Serge | 505 | return; |
506 | |||
507 | entry = obj->exec_entry; |
||
508 | |||
509 | if (entry->flags & __EXEC_OBJECT_HAS_FENCE) |
||
510 | i915_gem_object_unpin_fence(obj); |
||
511 | |||
512 | if (entry->flags & __EXEC_OBJECT_HAS_PIN) |
||
513 | i915_gem_object_unpin(obj); |
||
514 | |||
515 | entry->flags &= ~(__EXEC_OBJECT_HAS_FENCE | __EXEC_OBJECT_HAS_PIN); |
||
516 | } |
||
517 | |||
518 | static int |
||
519 | i915_gem_execbuffer_reserve(struct intel_ring_buffer *ring, |
||
3480 | Serge | 520 | struct list_head *objects, |
4104 | Serge | 521 | struct i915_address_space *vm, |
3480 | Serge | 522 | bool *need_relocs) |
3263 | Serge | 523 | { |
524 | struct drm_i915_gem_object *obj; |
||
525 | struct list_head ordered_objects; |
||
526 | bool has_fenced_gpu_access = INTEL_INFO(ring->dev)->gen < 4; |
||
527 | int retry; |
||
528 | |||
529 | INIT_LIST_HEAD(&ordered_objects); |
||
530 | while (!list_empty(objects)) { |
||
531 | struct drm_i915_gem_exec_object2 *entry; |
||
532 | bool need_fence, need_mappable; |
||
533 | |||
534 | obj = list_first_entry(objects, |
||
535 | struct drm_i915_gem_object, |
||
536 | exec_list); |
||
537 | entry = obj->exec_entry; |
||
538 | |||
539 | need_fence = |
||
540 | has_fenced_gpu_access && |
||
541 | entry->flags & EXEC_OBJECT_NEEDS_FENCE && |
||
542 | obj->tiling_mode != I915_TILING_NONE; |
||
543 | need_mappable = need_fence || need_reloc_mappable(obj); |
||
544 | |||
545 | if (need_mappable) |
||
546 | list_move(&obj->exec_list, &ordered_objects); |
||
547 | else |
||
548 | list_move_tail(&obj->exec_list, &ordered_objects); |
||
549 | |||
3480 | Serge | 550 | obj->base.pending_read_domains = I915_GEM_GPU_DOMAINS & ~I915_GEM_DOMAIN_COMMAND; |
3263 | Serge | 551 | obj->base.pending_write_domain = 0; |
552 | obj->pending_fenced_gpu_access = false; |
||
553 | } |
||
554 | list_splice(&ordered_objects, objects); |
||
555 | |||
556 | /* Attempt to pin all of the buffers into the GTT. |
||
557 | * This is done in 3 phases: |
||
558 | * |
||
559 | * 1a. Unbind all objects that do not match the GTT constraints for |
||
560 | * the execbuffer (fenceable, mappable, alignment etc). |
||
561 | * 1b. Increment pin count for already bound objects. |
||
562 | * 2. Bind new objects. |
||
563 | * 3. Decrement pin count. |
||
564 | * |
||
565 | * This avoid unnecessary unbinding of later objects in order to make |
||
566 | * room for the earlier objects *unless* we need to defragment. |
||
567 | */ |
||
568 | retry = 0; |
||
569 | do { |
||
570 | int ret = 0; |
||
571 | |||
572 | /* Unbind any ill-fitting objects or pin. */ |
||
573 | list_for_each_entry(obj, objects, exec_list) { |
||
574 | struct drm_i915_gem_exec_object2 *entry = obj->exec_entry; |
||
575 | bool need_fence, need_mappable; |
||
4104 | Serge | 576 | u32 obj_offset; |
3263 | Serge | 577 | |
4104 | Serge | 578 | if (!i915_gem_obj_bound(obj, vm)) |
3263 | Serge | 579 | continue; |
580 | |||
4104 | Serge | 581 | obj_offset = i915_gem_obj_offset(obj, vm); |
3263 | Serge | 582 | need_fence = |
583 | has_fenced_gpu_access && |
||
584 | entry->flags & EXEC_OBJECT_NEEDS_FENCE && |
||
585 | obj->tiling_mode != I915_TILING_NONE; |
||
586 | need_mappable = need_fence || need_reloc_mappable(obj); |
||
587 | |||
4246 | Serge | 588 | WARN_ON((need_mappable || need_fence) && |
589 | !i915_is_ggtt(vm)); |
||
4104 | Serge | 590 | |
591 | if ((entry->alignment && |
||
592 | obj_offset & (entry->alignment - 1)) || |
||
3263 | Serge | 593 | (need_mappable && !obj->map_and_fenceable)) |
4104 | Serge | 594 | ret = i915_vma_unbind(i915_gem_obj_to_vma(obj, vm)); |
3263 | Serge | 595 | else |
4104 | Serge | 596 | ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs); |
3263 | Serge | 597 | if (ret) |
598 | goto err; |
||
599 | } |
||
600 | |||
601 | /* Bind fresh objects */ |
||
602 | list_for_each_entry(obj, objects, exec_list) { |
||
4104 | Serge | 603 | if (i915_gem_obj_bound(obj, vm)) |
3263 | Serge | 604 | continue; |
605 | |||
4104 | Serge | 606 | ret = i915_gem_execbuffer_reserve_object(obj, ring, vm, need_relocs); |
3263 | Serge | 607 | if (ret) |
608 | goto err; |
||
609 | } |
||
610 | |||
611 | err: /* Decrement pin count for bound objects */ |
||
612 | list_for_each_entry(obj, objects, exec_list) |
||
613 | i915_gem_execbuffer_unreserve_object(obj); |
||
614 | |||
615 | if (ret != -ENOSPC || retry++) |
||
616 | return ret; |
||
617 | |||
618 | // ret = i915_gem_evict_everything(ring->dev); |
||
619 | if (ret) |
||
620 | return ret; |
||
621 | } while (1); |
||
622 | } |
||
623 | |||
624 | static int |
||
625 | i915_gem_execbuffer_relocate_slow(struct drm_device *dev, |
||
3480 | Serge | 626 | struct drm_i915_gem_execbuffer2 *args, |
3263 | Serge | 627 | struct drm_file *file, |
628 | struct intel_ring_buffer *ring, |
||
629 | struct eb_objects *eb, |
||
4104 | Serge | 630 | struct drm_i915_gem_exec_object2 *exec, |
631 | struct i915_address_space *vm) |
||
3263 | Serge | 632 | { |
633 | struct drm_i915_gem_relocation_entry *reloc; |
||
634 | struct drm_i915_gem_object *obj; |
||
3480 | Serge | 635 | bool need_relocs; |
3263 | Serge | 636 | int *reloc_offset; |
637 | int i, total, ret; |
||
3480 | Serge | 638 | int count = args->buffer_count; |
3263 | Serge | 639 | |
640 | /* We may process another execbuffer during the unlock... */ |
||
3480 | Serge | 641 | while (!list_empty(&eb->objects)) { |
642 | obj = list_first_entry(&eb->objects, |
||
3263 | Serge | 643 | struct drm_i915_gem_object, |
644 | exec_list); |
||
645 | list_del_init(&obj->exec_list); |
||
646 | drm_gem_object_unreference(&obj->base); |
||
647 | } |
||
648 | |||
649 | mutex_unlock(&dev->struct_mutex); |
||
650 | |||
651 | total = 0; |
||
652 | for (i = 0; i < count; i++) |
||
653 | total += exec[i].relocation_count; |
||
654 | |||
655 | reloc_offset = malloc(count * sizeof(*reloc_offset)); |
||
656 | reloc = malloc(total * sizeof(*reloc)); |
||
657 | if (reloc == NULL || reloc_offset == NULL) { |
||
3266 | Serge | 658 | kfree(reloc); |
659 | kfree(reloc_offset); |
||
3263 | Serge | 660 | mutex_lock(&dev->struct_mutex); |
661 | return -ENOMEM; |
||
662 | } |
||
663 | |||
664 | total = 0; |
||
665 | for (i = 0; i < count; i++) { |
||
666 | struct drm_i915_gem_relocation_entry __user *user_relocs; |
||
667 | u64 invalid_offset = (u64)-1; |
||
668 | int j; |
||
669 | |||
670 | user_relocs = (void __user *)(uintptr_t)exec[i].relocs_ptr; |
||
671 | |||
672 | if (copy_from_user(reloc+total, user_relocs, |
||
673 | exec[i].relocation_count * sizeof(*reloc))) { |
||
674 | ret = -EFAULT; |
||
675 | mutex_lock(&dev->struct_mutex); |
||
676 | goto err; |
||
677 | } |
||
678 | |||
679 | /* As we do not update the known relocation offsets after |
||
680 | * relocating (due to the complexities in lock handling), |
||
681 | * we need to mark them as invalid now so that we force the |
||
682 | * relocation processing next time. Just in case the target |
||
683 | * object is evicted and then rebound into its old |
||
684 | * presumed_offset before the next execbuffer - if that |
||
685 | * happened we would make the mistake of assuming that the |
||
686 | * relocations were valid. |
||
687 | */ |
||
688 | for (j = 0; j < exec[i].relocation_count; j++) { |
||
689 | if (copy_to_user(&user_relocs[j].presumed_offset, |
||
690 | &invalid_offset, |
||
691 | sizeof(invalid_offset))) { |
||
692 | ret = -EFAULT; |
||
693 | mutex_lock(&dev->struct_mutex); |
||
694 | goto err; |
||
695 | } |
||
696 | } |
||
697 | |||
698 | reloc_offset[i] = total; |
||
699 | total += exec[i].relocation_count; |
||
700 | } |
||
701 | |||
702 | ret = i915_mutex_lock_interruptible(dev); |
||
703 | if (ret) { |
||
704 | mutex_lock(&dev->struct_mutex); |
||
705 | goto err; |
||
706 | } |
||
707 | |||
708 | /* reacquire the objects */ |
||
709 | eb_reset(eb); |
||
3480 | Serge | 710 | ret = eb_lookup_objects(eb, exec, args, file); |
711 | if (ret) |
||
3263 | Serge | 712 | goto err; |
713 | |||
3480 | Serge | 714 | need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0; |
4104 | Serge | 715 | ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs); |
3263 | Serge | 716 | if (ret) |
717 | goto err; |
||
718 | |||
3480 | Serge | 719 | list_for_each_entry(obj, &eb->objects, exec_list) { |
3263 | Serge | 720 | int offset = obj->exec_entry - exec; |
721 | ret = i915_gem_execbuffer_relocate_object_slow(obj, eb, |
||
4104 | Serge | 722 | reloc + reloc_offset[offset], |
723 | vm); |
||
3263 | Serge | 724 | if (ret) |
725 | goto err; |
||
726 | } |
||
727 | |||
728 | /* Leave the user relocations as are, this is the painfully slow path, |
||
729 | * and we want to avoid the complication of dropping the lock whilst |
||
730 | * having buffers reserved in the aperture and so causing spurious |
||
731 | * ENOSPC for random operations. |
||
732 | */ |
||
733 | |||
734 | err: |
||
3266 | Serge | 735 | kfree(reloc); |
736 | kfree(reloc_offset); |
||
3263 | Serge | 737 | return ret; |
738 | } |
||
739 | |||
740 | static int |
||
741 | i915_gem_execbuffer_move_to_gpu(struct intel_ring_buffer *ring, |
||
742 | struct list_head *objects) |
||
743 | { |
||
744 | struct drm_i915_gem_object *obj; |
||
745 | uint32_t flush_domains = 0; |
||
4104 | Serge | 746 | bool flush_chipset = false; |
3263 | Serge | 747 | int ret; |
748 | |||
749 | list_for_each_entry(obj, objects, exec_list) { |
||
750 | ret = i915_gem_object_sync(obj, ring); |
||
751 | if (ret) |
||
752 | return ret; |
||
753 | |||
754 | if (obj->base.write_domain & I915_GEM_DOMAIN_CPU) |
||
4104 | Serge | 755 | flush_chipset |= i915_gem_clflush_object(obj, false); |
3263 | Serge | 756 | |
757 | flush_domains |= obj->base.write_domain; |
||
758 | } |
||
759 | |||
4104 | Serge | 760 | if (flush_chipset) |
3263 | Serge | 761 | i915_gem_chipset_flush(ring->dev); |
762 | |||
763 | if (flush_domains & I915_GEM_DOMAIN_GTT) |
||
764 | wmb(); |
||
765 | |||
766 | /* Unconditionally invalidate gpu caches and ensure that we do flush |
||
767 | * any residual writes from the previous batch. |
||
768 | */ |
||
769 | return intel_ring_invalidate_all_caches(ring); |
||
770 | } |
||
771 | |||
772 | static bool |
||
773 | i915_gem_check_execbuffer(struct drm_i915_gem_execbuffer2 *exec) |
||
774 | { |
||
3480 | Serge | 775 | if (exec->flags & __I915_EXEC_UNKNOWN_FLAGS) |
776 | return false; |
||
777 | |||
3263 | Serge | 778 | return ((exec->batch_start_offset | exec->batch_len) & 0x7) == 0; |
779 | } |
||
780 | |||
781 | static int |
||
782 | validate_exec_list(struct drm_i915_gem_exec_object2 *exec, |
||
783 | int count) |
||
784 | { |
||
785 | int i; |
||
3480 | Serge | 786 | int relocs_total = 0; |
787 | int relocs_max = INT_MAX / sizeof(struct drm_i915_gem_relocation_entry); |
||
3263 | Serge | 788 | |
789 | for (i = 0; i < count; i++) { |
||
3746 | Serge | 790 | char __user *ptr = to_user_ptr(exec[i].relocs_ptr); |
3263 | Serge | 791 | int length; /* limited by fault_in_pages_readable() */ |
792 | |||
3480 | Serge | 793 | if (exec[i].flags & __EXEC_OBJECT_UNKNOWN_FLAGS) |
3263 | Serge | 794 | return -EINVAL; |
795 | |||
3480 | Serge | 796 | /* First check for malicious input causing overflow in |
797 | * the worst case where we need to allocate the entire |
||
798 | * relocation tree as a single array. |
||
799 | */ |
||
800 | if (exec[i].relocation_count > relocs_max - relocs_total) |
||
801 | return -EINVAL; |
||
802 | relocs_total += exec[i].relocation_count; |
||
803 | |||
3263 | Serge | 804 | length = exec[i].relocation_count * |
805 | sizeof(struct drm_i915_gem_relocation_entry); |
||
3746 | Serge | 806 | /* |
807 | * We must check that the entire relocation array is safe |
||
808 | * to read, but since we may need to update the presumed |
||
809 | * offsets during execution, check for full write access. |
||
810 | */ |
||
3263 | Serge | 811 | |
812 | } |
||
813 | |||
814 | return 0; |
||
815 | } |
||
816 | |||
817 | static void |
||
818 | i915_gem_execbuffer_move_to_active(struct list_head *objects, |
||
4104 | Serge | 819 | struct i915_address_space *vm, |
3263 | Serge | 820 | struct intel_ring_buffer *ring) |
821 | { |
||
822 | struct drm_i915_gem_object *obj; |
||
823 | |||
824 | list_for_each_entry(obj, objects, exec_list) { |
||
825 | u32 old_read = obj->base.read_domains; |
||
826 | u32 old_write = obj->base.write_domain; |
||
827 | |||
3480 | Serge | 828 | obj->base.write_domain = obj->base.pending_write_domain; |
829 | if (obj->base.write_domain == 0) |
||
830 | obj->base.pending_read_domains |= obj->base.read_domains; |
||
3263 | Serge | 831 | obj->base.read_domains = obj->base.pending_read_domains; |
832 | obj->fenced_gpu_access = obj->pending_fenced_gpu_access; |
||
833 | |||
4104 | Serge | 834 | /* FIXME: This lookup gets fixed later <-- danvet */ |
835 | list_move_tail(&i915_gem_obj_to_vma(obj, vm)->mm_list, &vm->active_list); |
||
3263 | Serge | 836 | i915_gem_object_move_to_active(obj, ring); |
837 | if (obj->base.write_domain) { |
||
838 | obj->dirty = 1; |
||
839 | obj->last_write_seqno = intel_ring_get_seqno(ring); |
||
840 | if (obj->pin_count) /* check for potential scanout */ |
||
4104 | Serge | 841 | intel_mark_fb_busy(obj, ring); |
3263 | Serge | 842 | } |
843 | |||
844 | trace_i915_gem_object_change_domain(obj, old_read, old_write); |
||
845 | } |
||
846 | } |
||
847 | |||
848 | static void |
||
849 | i915_gem_execbuffer_retire_commands(struct drm_device *dev, |
||
850 | struct drm_file *file, |
||
4104 | Serge | 851 | struct intel_ring_buffer *ring, |
852 | struct drm_i915_gem_object *obj) |
||
3263 | Serge | 853 | { |
854 | /* Unconditionally force add_request to emit a full flush. */ |
||
855 | ring->gpu_caches_dirty = true; |
||
856 | |||
857 | /* Add a breadcrumb for the completion of the batch buffer */ |
||
4104 | Serge | 858 | (void)__i915_add_request(ring, file, obj, NULL); |
3263 | Serge | 859 | } |
860 | |||
861 | static int |
||
862 | i915_reset_gen7_sol_offsets(struct drm_device *dev, |
||
863 | struct intel_ring_buffer *ring) |
||
864 | { |
||
865 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
866 | int ret, i; |
||
867 | |||
868 | if (!IS_GEN7(dev) || ring != &dev_priv->ring[RCS]) |
||
869 | return 0; |
||
870 | |||
871 | ret = intel_ring_begin(ring, 4 * 3); |
||
872 | if (ret) |
||
873 | return ret; |
||
874 | |||
875 | for (i = 0; i < 4; i++) { |
||
876 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); |
||
877 | intel_ring_emit(ring, GEN7_SO_WRITE_OFFSET(i)); |
||
878 | intel_ring_emit(ring, 0); |
||
879 | } |
||
880 | |||
881 | intel_ring_advance(ring); |
||
882 | |||
883 | return 0; |
||
884 | } |
||
885 | |||
886 | static int |
||
887 | i915_gem_do_execbuffer(struct drm_device *dev, void *data, |
||
888 | struct drm_file *file, |
||
889 | struct drm_i915_gem_execbuffer2 *args, |
||
4104 | Serge | 890 | struct drm_i915_gem_exec_object2 *exec, |
891 | struct i915_address_space *vm) |
||
3263 | Serge | 892 | { |
893 | drm_i915_private_t *dev_priv = dev->dev_private; |
||
894 | struct eb_objects *eb; |
||
895 | struct drm_i915_gem_object *batch_obj; |
||
896 | struct drm_clip_rect *cliprects = NULL; |
||
897 | struct intel_ring_buffer *ring; |
||
898 | u32 ctx_id = i915_execbuffer2_get_context_id(*args); |
||
899 | u32 exec_start, exec_len; |
||
3480 | Serge | 900 | u32 mask, flags; |
3263 | Serge | 901 | int ret, mode, i; |
3480 | Serge | 902 | bool need_relocs; |
3263 | Serge | 903 | |
3480 | Serge | 904 | if (!i915_gem_check_execbuffer(args)) |
3263 | Serge | 905 | return -EINVAL; |
906 | |||
907 | ret = validate_exec_list(exec, args->buffer_count); |
||
908 | if (ret) |
||
909 | return ret; |
||
910 | |||
911 | flags = 0; |
||
912 | if (args->flags & I915_EXEC_SECURE) { |
||
913 | |||
914 | flags |= I915_DISPATCH_SECURE; |
||
915 | } |
||
916 | if (args->flags & I915_EXEC_IS_PINNED) |
||
917 | flags |= I915_DISPATCH_PINNED; |
||
918 | |||
919 | switch (args->flags & I915_EXEC_RING_MASK) { |
||
920 | case I915_EXEC_DEFAULT: |
||
921 | case I915_EXEC_RENDER: |
||
922 | ring = &dev_priv->ring[RCS]; |
||
923 | break; |
||
924 | case I915_EXEC_BSD: |
||
925 | ring = &dev_priv->ring[VCS]; |
||
4104 | Serge | 926 | if (ctx_id != DEFAULT_CONTEXT_ID) { |
3263 | Serge | 927 | DRM_DEBUG("Ring %s doesn't support contexts\n", |
928 | ring->name); |
||
929 | return -EPERM; |
||
930 | } |
||
931 | break; |
||
932 | case I915_EXEC_BLT: |
||
933 | ring = &dev_priv->ring[BCS]; |
||
4104 | Serge | 934 | if (ctx_id != DEFAULT_CONTEXT_ID) { |
3263 | Serge | 935 | DRM_DEBUG("Ring %s doesn't support contexts\n", |
936 | ring->name); |
||
937 | return -EPERM; |
||
938 | } |
||
939 | break; |
||
4104 | Serge | 940 | case I915_EXEC_VEBOX: |
941 | ring = &dev_priv->ring[VECS]; |
||
942 | if (ctx_id != DEFAULT_CONTEXT_ID) { |
||
943 | DRM_DEBUG("Ring %s doesn't support contexts\n", |
||
944 | ring->name); |
||
945 | return -EPERM; |
||
946 | } |
||
947 | break; |
||
948 | |||
3263 | Serge | 949 | default: |
950 | DRM_DEBUG("execbuf with unknown ring: %d\n", |
||
951 | (int)(args->flags & I915_EXEC_RING_MASK)); |
||
952 | return -EINVAL; |
||
953 | } |
||
954 | if (!intel_ring_initialized(ring)) { |
||
955 | DRM_DEBUG("execbuf with invalid ring: %d\n", |
||
956 | (int)(args->flags & I915_EXEC_RING_MASK)); |
||
957 | return -EINVAL; |
||
958 | } |
||
959 | |||
960 | mode = args->flags & I915_EXEC_CONSTANTS_MASK; |
||
961 | mask = I915_EXEC_CONSTANTS_MASK; |
||
962 | switch (mode) { |
||
963 | case I915_EXEC_CONSTANTS_REL_GENERAL: |
||
964 | case I915_EXEC_CONSTANTS_ABSOLUTE: |
||
965 | case I915_EXEC_CONSTANTS_REL_SURFACE: |
||
966 | if (ring == &dev_priv->ring[RCS] && |
||
967 | mode != dev_priv->relative_constants_mode) { |
||
968 | if (INTEL_INFO(dev)->gen < 4) |
||
969 | return -EINVAL; |
||
970 | |||
971 | if (INTEL_INFO(dev)->gen > 5 && |
||
972 | mode == I915_EXEC_CONSTANTS_REL_SURFACE) |
||
973 | return -EINVAL; |
||
974 | |||
975 | /* The HW changed the meaning on this bit on gen6 */ |
||
976 | if (INTEL_INFO(dev)->gen >= 6) |
||
977 | mask &= ~I915_EXEC_CONSTANTS_REL_SURFACE; |
||
978 | } |
||
979 | break; |
||
980 | default: |
||
981 | DRM_DEBUG("execbuf with unknown constants: %d\n", mode); |
||
982 | return -EINVAL; |
||
983 | } |
||
984 | |||
985 | if (args->buffer_count < 1) { |
||
986 | DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count); |
||
987 | return -EINVAL; |
||
988 | } |
||
989 | |||
990 | if (args->num_cliprects != 0) { |
||
991 | if (ring != &dev_priv->ring[RCS]) { |
||
992 | DRM_DEBUG("clip rectangles are only valid with the render ring\n"); |
||
993 | return -EINVAL; |
||
994 | } |
||
995 | |||
996 | if (INTEL_INFO(dev)->gen >= 5) { |
||
997 | DRM_DEBUG("clip rectangles are only valid on pre-gen5\n"); |
||
998 | return -EINVAL; |
||
999 | } |
||
1000 | |||
1001 | if (args->num_cliprects > UINT_MAX / sizeof(*cliprects)) { |
||
1002 | DRM_DEBUG("execbuf with %u cliprects\n", |
||
1003 | args->num_cliprects); |
||
1004 | return -EINVAL; |
||
1005 | } |
||
1006 | |||
1007 | cliprects = kmalloc(args->num_cliprects * sizeof(*cliprects), |
||
1008 | GFP_KERNEL); |
||
1009 | if (cliprects == NULL) { |
||
1010 | ret = -ENOMEM; |
||
1011 | goto pre_mutex_err; |
||
1012 | } |
||
1013 | |||
1014 | if (copy_from_user(cliprects, |
||
3746 | Serge | 1015 | to_user_ptr(args->cliprects_ptr), |
3263 | Serge | 1016 | sizeof(*cliprects)*args->num_cliprects)) { |
1017 | ret = -EFAULT; |
||
1018 | goto pre_mutex_err; |
||
1019 | } |
||
1020 | } |
||
1021 | |||
1022 | ret = i915_mutex_lock_interruptible(dev); |
||
1023 | if (ret) |
||
1024 | goto pre_mutex_err; |
||
1025 | |||
4104 | Serge | 1026 | if (dev_priv->ums.mm_suspended) { |
3263 | Serge | 1027 | mutex_unlock(&dev->struct_mutex); |
1028 | ret = -EBUSY; |
||
1029 | goto pre_mutex_err; |
||
1030 | } |
||
1031 | |||
3480 | Serge | 1032 | eb = eb_create(args); |
3263 | Serge | 1033 | if (eb == NULL) { |
1034 | mutex_unlock(&dev->struct_mutex); |
||
1035 | ret = -ENOMEM; |
||
1036 | goto pre_mutex_err; |
||
1037 | } |
||
1038 | |||
1039 | /* Look up object handles */ |
||
3480 | Serge | 1040 | ret = eb_lookup_objects(eb, exec, args, file); |
1041 | if (ret) |
||
3263 | Serge | 1042 | goto err; |
1043 | |||
1044 | /* take note of the batch buffer before we might reorder the lists */ |
||
3480 | Serge | 1045 | batch_obj = list_entry(eb->objects.prev, |
3263 | Serge | 1046 | struct drm_i915_gem_object, |
1047 | exec_list); |
||
1048 | |||
1049 | /* Move the objects en-masse into the GTT, evicting if necessary. */ |
||
3480 | Serge | 1050 | need_relocs = (args->flags & I915_EXEC_NO_RELOC) == 0; |
4104 | Serge | 1051 | ret = i915_gem_execbuffer_reserve(ring, &eb->objects, vm, &need_relocs); |
3263 | Serge | 1052 | if (ret) |
1053 | goto err; |
||
1054 | |||
1055 | /* The objects are in their final locations, apply the relocations. */ |
||
3480 | Serge | 1056 | if (need_relocs) |
4104 | Serge | 1057 | ret = i915_gem_execbuffer_relocate(eb, vm); |
3263 | Serge | 1058 | if (ret) { |
1059 | if (ret == -EFAULT) { |
||
3480 | Serge | 1060 | ret = i915_gem_execbuffer_relocate_slow(dev, args, file, ring, |
4104 | Serge | 1061 | eb, exec, vm); |
3263 | Serge | 1062 | BUG_ON(!mutex_is_locked(&dev->struct_mutex)); |
1063 | } |
||
1064 | if (ret) |
||
1065 | goto err; |
||
1066 | } |
||
1067 | |||
1068 | /* Set the pending read domains for the batch buffer to COMMAND */ |
||
1069 | if (batch_obj->base.pending_write_domain) { |
||
1070 | DRM_DEBUG("Attempting to use self-modifying batch buffer\n"); |
||
1071 | ret = -EINVAL; |
||
1072 | goto err; |
||
1073 | } |
||
1074 | batch_obj->base.pending_read_domains |= I915_GEM_DOMAIN_COMMAND; |
||
1075 | |||
1076 | /* snb/ivb/vlv conflate the "batch in ppgtt" bit with the "non-secure |
||
1077 | * batch" bit. Hence we need to pin secure batches into the global gtt. |
||
1078 | * hsw should have this fixed, but let's be paranoid and do it |
||
1079 | * unconditionally for now. */ |
||
1080 | if (flags & I915_DISPATCH_SECURE && !batch_obj->has_global_gtt_mapping) |
||
1081 | i915_gem_gtt_bind_object(batch_obj, batch_obj->cache_level); |
||
1082 | |||
3480 | Serge | 1083 | ret = i915_gem_execbuffer_move_to_gpu(ring, &eb->objects); |
3263 | Serge | 1084 | if (ret) |
1085 | goto err; |
||
1086 | |||
1087 | ret = i915_switch_context(ring, file, ctx_id); |
||
1088 | if (ret) |
||
1089 | goto err; |
||
1090 | |||
1091 | if (ring == &dev_priv->ring[RCS] && |
||
1092 | mode != dev_priv->relative_constants_mode) { |
||
1093 | ret = intel_ring_begin(ring, 4); |
||
1094 | if (ret) |
||
1095 | goto err; |
||
1096 | |||
1097 | intel_ring_emit(ring, MI_NOOP); |
||
1098 | intel_ring_emit(ring, MI_LOAD_REGISTER_IMM(1)); |
||
1099 | intel_ring_emit(ring, INSTPM); |
||
1100 | intel_ring_emit(ring, mask << 16 | mode); |
||
1101 | intel_ring_advance(ring); |
||
1102 | |||
1103 | dev_priv->relative_constants_mode = mode; |
||
1104 | } |
||
1105 | |||
1106 | if (args->flags & I915_EXEC_GEN7_SOL_RESET) { |
||
1107 | ret = i915_reset_gen7_sol_offsets(dev, ring); |
||
1108 | if (ret) |
||
1109 | goto err; |
||
1110 | } |
||
1111 | |||
4104 | Serge | 1112 | exec_start = i915_gem_obj_offset(batch_obj, vm) + |
1113 | args->batch_start_offset; |
||
3263 | Serge | 1114 | exec_len = args->batch_len; |
1115 | if (cliprects) { |
||
4246 | Serge | 1116 | for (i = 0; i < args->num_cliprects; i++) { |
1117 | ret = i915_emit_box(dev, &cliprects[i], |
||
1118 | args->DR1, args->DR4); |
||
1119 | if (ret) |
||
1120 | goto err; |
||
3263 | Serge | 1121 | |
4246 | Serge | 1122 | ret = ring->dispatch_execbuffer(ring, |
1123 | exec_start, exec_len, |
||
1124 | flags); |
||
1125 | if (ret) |
||
1126 | goto err; |
||
1127 | } |
||
3263 | Serge | 1128 | } else { |
1129 | ret = ring->dispatch_execbuffer(ring, |
||
1130 | exec_start, exec_len, |
||
1131 | flags); |
||
1132 | if (ret) |
||
1133 | goto err; |
||
1134 | } |
||
1135 | |||
3266 | Serge | 1136 | trace_i915_gem_ring_dispatch(ring, intel_ring_get_seqno(ring), flags); |
3263 | Serge | 1137 | |
4104 | Serge | 1138 | i915_gem_execbuffer_move_to_active(&eb->objects, vm, ring); |
1139 | i915_gem_execbuffer_retire_commands(dev, file, ring, batch_obj); |
||
3266 | Serge | 1140 | |
3263 | Serge | 1141 | err: |
1142 | eb_destroy(eb); |
||
1143 | |||
1144 | mutex_unlock(&dev->struct_mutex); |
||
1145 | |||
1146 | pre_mutex_err: |
||
4104 | Serge | 1147 | kfree(cliprects); |
3263 | Serge | 1148 | return ret; |
1149 | } |
||
1150 | |||
4246 | Serge | 1151 | #if 0 |
1152 | /* |
||
1153 | * Legacy execbuffer just creates an exec2 list from the original exec object |
||
1154 | * list array and passes it to the real function. |
||
1155 | */ |
||
1156 | int |
||
1157 | i915_gem_execbuffer(struct drm_device *dev, void *data, |
||
1158 | struct drm_file *file) |
||
1159 | { |
||
1160 | struct drm_i915_private *dev_priv = dev->dev_private; |
||
1161 | struct drm_i915_gem_execbuffer *args = data; |
||
1162 | struct drm_i915_gem_execbuffer2 exec2; |
||
1163 | struct drm_i915_gem_exec_object *exec_list = NULL; |
||
1164 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; |
||
1165 | int ret, i; |
||
3480 | Serge | 1166 | |
4246 | Serge | 1167 | if (args->buffer_count < 1) { |
1168 | DRM_DEBUG("execbuf with %d buffers\n", args->buffer_count); |
||
1169 | return -EINVAL; |
||
1170 | } |
||
3480 | Serge | 1171 | |
4246 | Serge | 1172 | /* Copy in the exec list from userland */ |
1173 | exec_list = drm_malloc_ab(sizeof(*exec_list), args->buffer_count); |
||
1174 | exec2_list = drm_malloc_ab(sizeof(*exec2_list), args->buffer_count); |
||
1175 | if (exec_list == NULL || exec2_list == NULL) { |
||
1176 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
||
1177 | args->buffer_count); |
||
1178 | drm_free_large(exec_list); |
||
1179 | drm_free_large(exec2_list); |
||
1180 | return -ENOMEM; |
||
1181 | } |
||
1182 | ret = copy_from_user(exec_list, |
||
1183 | to_user_ptr(args->buffers_ptr), |
||
1184 | sizeof(*exec_list) * args->buffer_count); |
||
1185 | if (ret != 0) { |
||
1186 | DRM_DEBUG("copy %d exec entries failed %d\n", |
||
1187 | args->buffer_count, ret); |
||
1188 | drm_free_large(exec_list); |
||
1189 | drm_free_large(exec2_list); |
||
1190 | return -EFAULT; |
||
1191 | } |
||
1192 | |||
1193 | for (i = 0; i < args->buffer_count; i++) { |
||
1194 | exec2_list[i].handle = exec_list[i].handle; |
||
1195 | exec2_list[i].relocation_count = exec_list[i].relocation_count; |
||
1196 | exec2_list[i].relocs_ptr = exec_list[i].relocs_ptr; |
||
1197 | exec2_list[i].alignment = exec_list[i].alignment; |
||
1198 | exec2_list[i].offset = exec_list[i].offset; |
||
1199 | if (INTEL_INFO(dev)->gen < 4) |
||
1200 | exec2_list[i].flags = EXEC_OBJECT_NEEDS_FENCE; |
||
1201 | else |
||
1202 | exec2_list[i].flags = 0; |
||
1203 | } |
||
1204 | |||
1205 | exec2.buffers_ptr = args->buffers_ptr; |
||
1206 | exec2.buffer_count = args->buffer_count; |
||
1207 | exec2.batch_start_offset = args->batch_start_offset; |
||
1208 | exec2.batch_len = args->batch_len; |
||
1209 | exec2.DR1 = args->DR1; |
||
1210 | exec2.DR4 = args->DR4; |
||
1211 | exec2.num_cliprects = args->num_cliprects; |
||
1212 | exec2.cliprects_ptr = args->cliprects_ptr; |
||
1213 | exec2.flags = I915_EXEC_RENDER; |
||
1214 | i915_execbuffer2_set_context_id(exec2, 0); |
||
1215 | |||
1216 | ret = i915_gem_do_execbuffer(dev, data, file, &exec2, exec2_list, |
||
1217 | &dev_priv->gtt.base); |
||
1218 | if (!ret) { |
||
1219 | /* Copy the new buffer offsets back to the user's exec list. */ |
||
1220 | for (i = 0; i < args->buffer_count; i++) |
||
1221 | exec_list[i].offset = exec2_list[i].offset; |
||
1222 | /* ... and back out to userspace */ |
||
1223 | ret = copy_to_user(to_user_ptr(args->buffers_ptr), |
||
1224 | exec_list, |
||
1225 | sizeof(*exec_list) * args->buffer_count); |
||
1226 | if (ret) { |
||
1227 | ret = -EFAULT; |
||
1228 | DRM_DEBUG("failed to copy %d exec entries " |
||
1229 | "back to user (%d)\n", |
||
1230 | args->buffer_count, ret); |
||
1231 | } |
||
1232 | } |
||
1233 | |||
1234 | drm_free_large(exec_list); |
||
1235 | drm_free_large(exec2_list); |
||
1236 | return ret; |
||
1237 | } |
||
1238 | #endif |
||
1239 | |||
3263 | Serge | 1240 | int |
1241 | i915_gem_execbuffer2(struct drm_device *dev, void *data, |
||
1242 | struct drm_file *file) |
||
1243 | { |
||
4104 | Serge | 1244 | struct drm_i915_private *dev_priv = dev->dev_private; |
3263 | Serge | 1245 | struct drm_i915_gem_execbuffer2 *args = data; |
1246 | struct drm_i915_gem_exec_object2 *exec2_list = NULL; |
||
1247 | int ret; |
||
1248 | |||
1249 | if (args->buffer_count < 1 || |
||
1250 | args->buffer_count > UINT_MAX / sizeof(*exec2_list)) { |
||
1251 | DRM_DEBUG("execbuf2 with %d buffers\n", args->buffer_count); |
||
1252 | return -EINVAL; |
||
1253 | } |
||
1254 | |||
3480 | Serge | 1255 | exec2_list = kmalloc(sizeof(*exec2_list)*args->buffer_count, |
1256 | GFP_TEMPORARY | __GFP_NOWARN | __GFP_NORETRY); |
||
3263 | Serge | 1257 | if (exec2_list == NULL) { |
1258 | DRM_DEBUG("Failed to allocate exec list for %d buffers\n", |
||
1259 | args->buffer_count); |
||
1260 | return -ENOMEM; |
||
1261 | } |
||
1262 | ret = copy_from_user(exec2_list, |
||
1263 | (struct drm_i915_relocation_entry __user *) |
||
1264 | (uintptr_t) args->buffers_ptr, |
||
1265 | sizeof(*exec2_list) * args->buffer_count); |
||
1266 | if (ret != 0) { |
||
1267 | DRM_DEBUG("copy %d exec entries failed %d\n", |
||
1268 | args->buffer_count, ret); |
||
3266 | Serge | 1269 | kfree(exec2_list); |
1270 | FAIL(); |
||
3263 | Serge | 1271 | return -EFAULT; |
1272 | } |
||
1273 | |||
4104 | Serge | 1274 | ret = i915_gem_do_execbuffer(dev, data, file, args, exec2_list, |
1275 | &dev_priv->gtt.base); |
||
3263 | Serge | 1276 | if (!ret) { |
1277 | /* Copy the new buffer offsets back to the user's exec list. */ |
||
1278 | ret = copy_to_user((void __user *)(uintptr_t)args->buffers_ptr, |
||
1279 | exec2_list, |
||
1280 | sizeof(*exec2_list) * args->buffer_count); |
||
1281 | if (ret) { |
||
1282 | ret = -EFAULT; |
||
1283 | DRM_DEBUG("failed to copy %d exec entries " |
||
1284 | "back to user (%d)\n", |
||
1285 | args->buffer_count, ret); |
||
1286 | } |
||
1287 | } |
||
1288 | |||
3266 | Serge | 1289 | kfree(exec2_list); |
3263 | Serge | 1290 | return ret; |
1291 | }>>>>>>><>>>>-->>>>>>>30) |