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3254 | Serge | 1 | /************************************************************************** |
2 | |||
3 | Copyright 1998-1999 Precision Insight, Inc., Cedar Park, Texas. |
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4 | Copyright © 2002 David Dawes |
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5 | |||
6 | All Rights Reserved. |
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7 | |||
8 | Permission is hereby granted, free of charge, to any person obtaining a |
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9 | copy of this software and associated documentation files (the |
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10 | "Software"), to deal in the Software without restriction, including |
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11 | without limitation the rights to use, copy, modify, merge, publish, |
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12 | distribute, sub license, and/or sell copies of the Software, and to |
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13 | permit persons to whom the Software is furnished to do so, subject to |
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14 | the following conditions: |
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15 | |||
16 | The above copyright notice and this permission notice (including the |
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17 | next paragraph) shall be included in all copies or substantial portions |
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18 | of the Software. |
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19 | |||
20 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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21 | OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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22 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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23 | IN NO EVENT SHALL PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR |
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24 | ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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25 | TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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26 | SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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27 | |||
28 | **************************************************************************/ |
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29 | |||
30 | /* |
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31 | * Authors: |
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32 | * Keith Whitwell |
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33 | * David Dawes |
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34 | * |
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35 | */ |
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36 | |||
37 | #ifndef _SNA_H_ |
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38 | #define _SNA_H_ |
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39 | |||
40 | #ifdef HAVE_CONFIG_H |
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41 | #include "config.h" |
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42 | #endif |
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43 | |||
44 | #include |
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45 | #include |
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46 | #include |
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47 | |||
48 | |||
49 | #include "intel_driver.h" |
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50 | #include "pciaccess.h" |
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51 | |||
52 | #include "compiler.h" |
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53 | |||
54 | //#define DBG(x) |
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55 | //#define DBG(x) ErrorF x |
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56 | |||
57 | #define assert(x) |
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58 | |||
59 | |||
60 | typedef struct |
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61 | { |
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62 | unsigned handle; |
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63 | unsigned io_code; |
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64 | void *input; |
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65 | int inp_size; |
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66 | void *output; |
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67 | int out_size; |
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68 | }ioctl_t; |
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69 | |||
3256 | Serge | 70 | #define SRV_GET_PCI_INFO 20 |
71 | #define SRV_GET_PARAM 21 |
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72 | #define SRV_I915_GEM_CREATE 22 |
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73 | #define SRV_DRM_GEM_CLOSE 23 |
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74 | #define SRV_I915_GEM_PIN 24 |
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75 | #define SRV_I915_GEM_SET_CACHEING 25 |
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76 | #define SRV_I915_GEM_GET_APERTURE 26 |
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3254 | Serge | 77 | |
78 | static int call_service(ioctl_t *io) |
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79 | { |
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80 | int retval; |
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81 | |||
82 | asm volatile("int $0x40" |
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83 | :"=a"(retval) |
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84 | :"a"(68),"b"(17),"c"(io) |
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85 | :"memory","cc"); |
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86 | |||
87 | return retval; |
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88 | }; |
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89 | |||
90 | |||
91 | #define PIXMAN_FORMAT(bpp,type,a,r,g,b) (((bpp) << 24) | \ |
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92 | ((type) << 16) | \ |
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93 | ((a) << 12) | \ |
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94 | ((r) << 8) | \ |
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95 | ((g) << 4) | \ |
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96 | ((b))) |
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97 | #define PIXMAN_TYPE_OTHER 0 |
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98 | #define PIXMAN_TYPE_A 1 |
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99 | #define PIXMAN_TYPE_ARGB 2 |
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100 | #define PIXMAN_TYPE_ABGR 3 |
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101 | #define PIXMAN_TYPE_COLOR 4 |
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102 | #define PIXMAN_TYPE_GRAY 5 |
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103 | #define PIXMAN_TYPE_YUY2 6 |
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104 | #define PIXMAN_TYPE_YV12 7 |
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105 | #define PIXMAN_TYPE_BGRA 8 |
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106 | #define PIXMAN_TYPE_RGBA 9 |
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107 | #define PIXMAN_TYPE_ARGB_SRGB 10 |
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108 | |||
109 | /* 32bpp formats */ |
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110 | typedef enum { |
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111 | PIXMAN_a8r8g8b8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ARGB,8,8,8,8), |
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112 | PIXMAN_x8r8g8b8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ARGB,0,8,8,8), |
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113 | PIXMAN_a8b8g8r8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ABGR,8,8,8,8), |
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114 | PIXMAN_x8b8g8r8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ABGR,0,8,8,8), |
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115 | PIXMAN_b8g8r8a8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_BGRA,8,8,8,8), |
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116 | PIXMAN_b8g8r8x8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_BGRA,0,8,8,8), |
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117 | PIXMAN_r8g8b8a8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_RGBA,8,8,8,8), |
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118 | PIXMAN_r8g8b8x8 = PIXMAN_FORMAT(32,PIXMAN_TYPE_RGBA,0,8,8,8), |
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119 | PIXMAN_x14r6g6b6 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ARGB,0,6,6,6), |
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120 | PIXMAN_x2r10g10b10 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ARGB,0,10,10,10), |
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121 | PIXMAN_a2r10g10b10 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ARGB,2,10,10,10), |
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122 | PIXMAN_x2b10g10r10 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ABGR,0,10,10,10), |
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123 | PIXMAN_a2b10g10r10 = PIXMAN_FORMAT(32,PIXMAN_TYPE_ABGR,2,10,10,10) |
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124 | |||
125 | } pixman_format_code_t; |
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126 | |||
127 | |||
128 | typedef unsigned long Picture; |
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129 | typedef unsigned long PictFormat; |
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130 | |||
131 | typedef struct _Pixmap *PixmapPtr; |
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132 | typedef struct _Picture *PicturePtr; |
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133 | |||
134 | typedef struct _Drawable { |
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135 | unsigned char type; /* DRAWABLE_ |
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136 | unsigned char class; /* specific to type */ |
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137 | unsigned char depth; |
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138 | unsigned char bitsPerPixel; |
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139 | unsigned int id; /* resource id */ |
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140 | short x; /* window: screen absolute, pixmap: 0 */ |
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141 | short y; /* window: screen absolute, pixmap: 0 */ |
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142 | unsigned short width; |
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143 | unsigned short height; |
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144 | } DrawableRec; |
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145 | |||
146 | /* |
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147 | * PIXMAP -- device dependent |
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148 | */ |
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149 | |||
150 | typedef struct _Pixmap { |
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151 | DrawableRec drawable; |
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152 | // PrivateRec *devPrivates; |
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153 | int refcnt; |
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154 | int devKind; /* This is the pitch of the pixmap, typically width*bpp/8. */ |
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155 | // DevUnion devPrivate; /* When !NULL, devPrivate.ptr points to the raw pixel data. */ |
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156 | #ifdef COMPOSITE |
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157 | short screen_x; |
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158 | short screen_y; |
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159 | #endif |
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160 | unsigned usage_hint; /* see CREATE_PIXMAP_USAGE_* */ |
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161 | |||
162 | PixmapPtr master_pixmap; /* pointer to master copy of pixmap for pixmap sharing */ |
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163 | } PixmapRec; |
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164 | |||
165 | |||
166 | |||
167 | struct pixman_box16 |
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168 | { |
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169 | int16_t x1, y1, x2, y2; |
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170 | }; |
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171 | |||
172 | typedef struct pixman_box16 BoxRec; |
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173 | typedef unsigned int CARD32; |
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174 | typedef unsigned short CARD16; |
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175 | |||
176 | #include "sna_render.h" |
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177 | #include "kgem.h" |
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178 | |||
179 | #define GXclear 0x0 |
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180 | #define GXcopy 0x3 |
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181 | |||
182 | #define PictOpClear 0 |
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183 | #define PictOpSrc 1 |
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184 | #define PictOpDst 2 |
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185 | #define PictOpOver 3 |
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186 | #define PictOpOverReverse 4 |
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187 | #define PictOpIn 5 |
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188 | #define PictOpInReverse 6 |
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189 | #define PictOpOut 7 |
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190 | #define PictOpOutReverse 8 |
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191 | #define PictOpAtop 9 |
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192 | #define PictOpAtopReverse 10 |
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193 | #define PictOpXor 11 |
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194 | #define PictOpAdd 12 |
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195 | #define PictOpSaturate 13 |
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196 | #define PictOpMaximum 13 |
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197 | |||
198 | |||
199 | |||
200 | struct sna { |
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201 | unsigned flags; |
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202 | #define SNA_NO_WAIT 0x1 |
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203 | #define SNA_NO_FLIP 0x2 |
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204 | #define SNA_TRIPLE_BUFFER 0x4 |
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205 | #define SNA_TEAR_FREE 0x10 |
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206 | #define SNA_FORCE_SHADOW 0x20 |
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207 | |||
208 | struct list flush_pixmaps; |
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209 | struct list active_pixmaps; |
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210 | |||
211 | |||
212 | |||
213 | // int vblank_interval; |
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214 | |||
215 | // struct list deferred_free; |
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216 | // struct list dirty_pixmaps; |
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217 | // struct list active_pixmaps; |
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218 | // struct list inactive_clock[2]; |
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219 | |||
220 | unsigned int tiling; |
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221 | #define SNA_TILING_DISABLE 0x0 |
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222 | #define SNA_TILING_FB 0x1 |
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223 | #define SNA_TILING_2D 0x2 |
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224 | #define SNA_TILING_ALL (~0) |
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225 | |||
226 | struct pci_device *PciInfo; |
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227 | const struct intel_device_info *info; |
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228 | |||
229 | // PicturePtr clear; |
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230 | struct { |
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231 | uint32_t fill_bo; |
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232 | uint32_t fill_pixel; |
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233 | uint32_t fill_alu; |
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234 | } blt_state; |
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235 | union { |
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236 | // struct gen2_render_state gen2; |
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237 | // struct gen3_render_state gen3; |
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238 | // struct gen4_render_state gen4; |
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239 | // struct gen5_render_state gen5; |
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240 | struct gen6_render_state gen6; |
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241 | struct gen7_render_state gen7; |
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242 | } render_state; |
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243 | |||
244 | |||
245 | /* Broken-out options. */ |
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246 | // OptionInfoPtr Options; |
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247 | |||
248 | /* Driver phase/state information */ |
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249 | // Bool suspended; |
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250 | |||
251 | struct kgem kgem; |
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252 | struct sna_render render; |
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253 | |||
254 | #if DEBUG_MEMORY |
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255 | struct { |
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256 | int shadow_pixels_allocs; |
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257 | int cpu_bo_allocs; |
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258 | size_t shadow_pixels_bytes; |
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259 | size_t cpu_bo_bytes; |
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260 | } debug_memory; |
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261 | #endif |
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262 | }; |
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263 | |||
264 | static inline int vertex_space(struct sna *sna) |
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265 | { |
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266 | return sna->render.vertex_size - sna->render.vertex_used; |
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267 | } |
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268 | |||
269 | static inline void vertex_emit(struct sna *sna, float v) |
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270 | { |
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271 | assert(sna->render.vertex_used < sna->render.vertex_size); |
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272 | sna->render.vertices[sna->render.vertex_used++] = v; |
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273 | } |
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274 | |||
275 | static inline void vertex_emit_2s(struct sna *sna, int16_t x, int16_t y) |
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276 | { |
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277 | int16_t *v = (int16_t *)&sna->render.vertices[sna->render.vertex_used++]; |
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278 | assert(sna->render.vertex_used <= sna->render.vertex_size); |
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279 | v[0] = x; |
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280 | v[1] = y; |
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281 | } |
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282 | |||
283 | static inline void batch_emit(struct sna *sna, uint32_t dword) |
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284 | { |
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285 | assert(sna->kgem.mode != KGEM_NONE); |
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286 | assert(sna->kgem.nbatch + KGEM_BATCH_RESERVED < sna->kgem.surface); |
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287 | sna->kgem.batch[sna->kgem.nbatch++] = dword; |
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288 | } |
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289 | |||
290 | #ifndef ARRAY_SIZE |
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291 | #define ARRAY_SIZE(x) (sizeof(x) / sizeof(x[0])) |
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292 | #endif |
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293 | |||
294 | #ifndef ALIGN |
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295 | #define ALIGN(i,m) (((i) + (m) - 1) & ~((m) - 1)) |
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296 | #endif |
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297 | |||
298 | #ifndef MIN |
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299 | #define MIN(a,b) ((a) <= (b) ? (a) : (b)) |
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300 | #endif |
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301 | |||
302 | #ifndef MAX |
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303 | #define MAX(a,b) ((a) >= (b) ? (a) : (b)) |
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304 | #endif |
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305 | #endif /* _SNA_H */=>>=>>><>><>><>><>><> |