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Rev | Author | Line No. | Line |
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4304 | Serge | 1 | /************************************************************************** |
2 | |||
3 | Copyright 2001 VA Linux Systems Inc., Fremont, California. |
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4 | Copyright © 2002 by David Dawes |
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5 | |||
6 | All Rights Reserved. |
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7 | |||
8 | Permission is hereby granted, free of charge, to any person obtaining a |
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9 | copy of this software and associated documentation files (the "Software"), |
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10 | to deal in the Software without restriction, including without limitation |
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11 | on the rights to use, copy, modify, merge, publish, distribute, sub |
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12 | license, and/or sell copies of the Software, and to permit persons to whom |
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13 | the Software is furnished to do so, subject to the following conditions: |
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14 | |||
15 | The above copyright notice and this permission notice (including the next |
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16 | paragraph) shall be included in all copies or substantial portions of the |
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17 | Software. |
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18 | |||
19 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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20 | IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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21 | FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. IN NO EVENT SHALL |
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22 | THE COPYRIGHT HOLDERS AND/OR THEIR SUPPLIERS BE LIABLE FOR ANY CLAIM, |
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23 | DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR |
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24 | OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE |
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25 | USE OR OTHER DEALINGS IN THE SOFTWARE. |
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26 | |||
27 | **************************************************************************/ |
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28 | |||
29 | /* |
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30 | * Authors: Jeff Hartmann |
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31 | * Abraham van der Merwe |
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32 | * David Dawes |
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33 | * Alan Hourihane |
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34 | */ |
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35 | |||
36 | #ifdef HAVE_CONFIG_H |
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37 | #include "config.h" |
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38 | #endif |
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39 | |||
40 | #include |
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41 | #include |
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42 | #include "i915_pciids.h" |
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43 | |||
44 | #include "compiler.h" |
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45 | #include "sna.h" |
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46 | |||
4315 | Serge | 47 | #include |
48 | #include |
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49 | |||
4304 | Serge | 50 | #define to_surface(x) (surface_t*)((x)->handle) |
51 | |||
52 | static struct sna_fb sna_fb; |
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53 | static int tls_mask; |
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54 | |||
55 | int tls_alloc(void); |
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56 | |||
57 | static inline void *tls_get(int key) |
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58 | { |
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59 | void *val; |
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60 | __asm__ __volatile__( |
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61 | "movl %%fs:(%1), %0" |
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62 | :"=r"(val) |
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63 | :"r"(key)); |
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64 | |||
65 | return val; |
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66 | }; |
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67 | |||
68 | static inline int |
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69 | tls_set(int key, const void *ptr) |
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70 | { |
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71 | if(!(key & 3)) |
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72 | { |
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73 | __asm__ __volatile__( |
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74 | "movl %0, %%fs:(%1)" |
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75 | ::"r"(ptr),"r"(key)); |
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76 | return 0; |
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77 | } |
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78 | else return -1; |
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79 | } |
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80 | |||
81 | |||
82 | |||
83 | |||
84 | int kgem_init_fb(struct kgem *kgem, struct sna_fb *fb); |
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85 | int kgem_update_fb(struct kgem *kgem, struct sna_fb *fb); |
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86 | uint32_t kgem_surface_size(struct kgem *kgem,bool relaxed_fencing, |
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87 | unsigned flags, uint32_t width, uint32_t height, |
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88 | uint32_t bpp, uint32_t tiling, uint32_t *pitch); |
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89 | struct kgem_bo *kgem_bo_from_handle(struct kgem *kgem, int handle, |
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90 | int pitch, int height); |
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91 | |||
92 | void kgem_close_batches(struct kgem *kgem); |
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93 | void sna_bo_destroy(struct kgem *kgem, struct kgem_bo *bo); |
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94 | |||
95 | |||
96 | static bool sna_solid_cache_init(struct sna *sna); |
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97 | |||
98 | struct sna *sna_device; |
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99 | |||
100 | __LOCK_INIT_RECURSIVE(, __sna_lock); |
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101 | |||
102 | static void no_render_reset(struct sna *sna) |
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103 | { |
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104 | (void)sna; |
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105 | } |
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106 | |||
107 | static void no_render_flush(struct sna *sna) |
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108 | { |
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109 | (void)sna; |
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110 | } |
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111 | |||
112 | static void |
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113 | no_render_context_switch(struct kgem *kgem, |
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114 | int new_mode) |
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115 | { |
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116 | if (!kgem->nbatch) |
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117 | return; |
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118 | |||
119 | if (kgem_ring_is_idle(kgem, kgem->ring)) { |
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120 | DBG(("%s: GPU idle, flushing\n", __FUNCTION__)); |
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121 | _kgem_submit(kgem); |
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122 | } |
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123 | |||
124 | (void)new_mode; |
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125 | } |
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126 | |||
127 | static void |
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128 | no_render_retire(struct kgem *kgem) |
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129 | { |
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130 | (void)kgem; |
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131 | } |
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132 | |||
133 | static void |
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134 | no_render_expire(struct kgem *kgem) |
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135 | { |
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136 | (void)kgem; |
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137 | } |
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138 | |||
139 | static void |
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140 | no_render_fini(struct sna *sna) |
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141 | { |
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142 | (void)sna; |
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143 | } |
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144 | |||
145 | const char *no_render_init(struct sna *sna) |
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146 | { |
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147 | struct sna_render *render = &sna->render; |
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148 | |||
149 | memset (render,0, sizeof (*render)); |
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150 | |||
151 | render->prefer_gpu = PREFER_GPU_BLT; |
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152 | |||
153 | render->vertices = render->vertex_data; |
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154 | render->vertex_size = ARRAY_SIZE(render->vertex_data); |
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155 | |||
156 | render->reset = no_render_reset; |
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157 | render->flush = no_render_flush; |
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158 | render->fini = no_render_fini; |
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159 | |||
160 | sna->kgem.context_switch = no_render_context_switch; |
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161 | sna->kgem.retire = no_render_retire; |
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162 | sna->kgem.expire = no_render_expire; |
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163 | |||
164 | sna->kgem.mode = KGEM_RENDER; |
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165 | sna->kgem.ring = KGEM_RENDER; |
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166 | |||
167 | sna_vertex_init(sna); |
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168 | return "generic"; |
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169 | } |
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170 | |||
171 | void sna_vertex_init(struct sna *sna) |
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172 | { |
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173 | // pthread_mutex_init(&sna->render.lock, NULL); |
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174 | // pthread_cond_init(&sna->render.wait, NULL); |
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175 | sna->render.active = 0; |
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176 | } |
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177 | |||
178 | int sna_accel_init(struct sna *sna) |
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179 | { |
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180 | const char *backend; |
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181 | |||
182 | backend = no_render_init(sna); |
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183 | if (sna->info->gen >= 0100) |
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184 | (void)backend; |
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185 | else if (sna->info->gen >= 070) |
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186 | backend = gen7_render_init(sna, backend); |
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187 | else if (sna->info->gen >= 060) |
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188 | backend = gen6_render_init(sna, backend); |
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189 | else if (sna->info->gen >= 050) |
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190 | backend = gen5_render_init(sna, backend); |
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191 | else if (sna->info->gen >= 040) |
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192 | backend = gen4_render_init(sna, backend); |
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193 | else if (sna->info->gen >= 030) |
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194 | backend = gen3_render_init(sna, backend); |
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195 | |||
196 | DBG(("%s(backend=%s, prefer_gpu=%x)\n", |
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197 | __FUNCTION__, backend, sna->render.prefer_gpu)); |
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198 | |||
199 | kgem_reset(&sna->kgem); |
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200 | |||
201 | sna_device = sna; |
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202 | |||
203 | return kgem_init_fb(&sna->kgem, &sna_fb); |
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204 | } |
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205 | |||
206 | int sna_init(uint32_t service) |
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207 | { |
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208 | ioctl_t io; |
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209 | int caps = 0; |
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210 | |||
211 | static struct pci_device device; |
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212 | struct sna *sna; |
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213 | |||
214 | DBG(("%s\n", __FUNCTION__)); |
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215 | |||
216 | __lock_acquire_recursive(__sna_lock); |
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217 | |||
218 | if(sna_device) |
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219 | goto done; |
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220 | |||
221 | io.handle = service; |
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222 | io.io_code = SRV_GET_PCI_INFO; |
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223 | io.input = &device; |
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224 | io.inp_size = sizeof(device); |
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225 | io.output = NULL; |
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226 | io.out_size = 0; |
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227 | |||
228 | if (call_service(&io)!=0) |
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229 | goto err1; |
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230 | |||
231 | sna = malloc(sizeof(*sna)); |
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232 | if (sna == NULL) |
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233 | goto err1; |
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234 | |||
235 | memset(sna, 0, sizeof(*sna)); |
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236 | |||
237 | sna->cpu_features = sna_cpu_detect(); |
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238 | |||
239 | sna->PciInfo = &device; |
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240 | sna->info = intel_detect_chipset(sna->PciInfo); |
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241 | sna->scrn = service; |
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242 | |||
243 | kgem_init(&sna->kgem, service, sna->PciInfo, sna->info->gen); |
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244 | |||
245 | |||
246 | /* Disable tiling by default */ |
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247 | sna->tiling = 0; |
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248 | |||
249 | /* Default fail-safe value of 75 Hz */ |
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250 | // sna->vblank_interval = 1000 * 1000 * 1000 / 75; |
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251 | |||
252 | sna->flags = 0; |
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253 | |||
254 | sna_accel_init(sna); |
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255 | |||
256 | tls_mask = tls_alloc(); |
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257 | |||
258 | // printf("tls mask %x\n", tls_mask); |
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259 | |||
260 | done: |
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261 | caps = sna_device->render.caps; |
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262 | |||
263 | err1: |
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264 | __lock_release_recursive(__sna_lock); |
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265 | |||
266 | return caps; |
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267 | } |
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268 | |||
269 | void sna_fini() |
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270 | { |
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271 | if( sna_device ) |
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272 | { |
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273 | struct kgem_bo *mask; |
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274 | |||
275 | __lock_acquire_recursive(__sna_lock); |
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276 | |||
277 | mask = tls_get(tls_mask); |
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278 | |||
279 | sna_device->render.fini(sna_device); |
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280 | if(mask) |
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281 | kgem_bo_destroy(&sna_device->kgem, mask); |
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282 | kgem_close_batches(&sna_device->kgem); |
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283 | kgem_cleanup_cache(&sna_device->kgem); |
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284 | |||
285 | sna_device = NULL; |
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286 | __lock_release_recursive(__sna_lock); |
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287 | }; |
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288 | } |
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289 | |||
290 | #if 0 |
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291 | |||
292 | static bool sna_solid_cache_init(struct sna *sna) |
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293 | { |
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294 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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295 | |||
296 | DBG(("%s\n", __FUNCTION__)); |
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297 | |||
298 | cache->cache_bo = |
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299 | kgem_create_linear(&sna->kgem, sizeof(cache->color)); |
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300 | if (!cache->cache_bo) |
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301 | return FALSE; |
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302 | |||
303 | /* |
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304 | * Initialise [0] with white since it is very common and filling the |
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305 | * zeroth slot simplifies some of the checks. |
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306 | */ |
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307 | cache->color[0] = 0xffffffff; |
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308 | cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t)); |
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309 | cache->bo[0]->pitch = 4; |
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310 | cache->dirty = 1; |
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311 | cache->size = 1; |
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312 | cache->last = 0; |
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313 | |||
314 | return TRUE; |
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315 | } |
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316 | |||
317 | void |
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318 | sna_render_flush_solid(struct sna *sna) |
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319 | { |
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320 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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321 | |||
322 | DBG(("sna_render_flush_solid(size=%d)\n", cache->size)); |
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323 | assert(cache->dirty); |
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324 | assert(cache->size); |
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325 | |||
326 | kgem_bo_write(&sna->kgem, cache->cache_bo, |
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327 | cache->color, cache->size*sizeof(uint32_t)); |
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328 | cache->dirty = 0; |
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329 | cache->last = 0; |
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330 | } |
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331 | |||
332 | static void |
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333 | sna_render_finish_solid(struct sna *sna, bool force) |
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334 | { |
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335 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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336 | int i; |
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337 | |||
338 | DBG(("sna_render_finish_solid(force=%d, domain=%d, busy=%d, dirty=%d)\n", |
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339 | force, cache->cache_bo->domain, cache->cache_bo->rq != NULL, cache->dirty)); |
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340 | |||
341 | if (!force && cache->cache_bo->domain != DOMAIN_GPU) |
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342 | return; |
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343 | |||
344 | if (cache->dirty) |
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345 | sna_render_flush_solid(sna); |
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346 | |||
347 | for (i = 0; i < cache->size; i++) { |
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348 | if (cache->bo[i] == NULL) |
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349 | continue; |
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350 | |||
351 | kgem_bo_destroy(&sna->kgem, cache->bo[i]); |
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352 | cache->bo[i] = NULL; |
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353 | } |
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354 | kgem_bo_destroy(&sna->kgem, cache->cache_bo); |
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355 | |||
356 | DBG(("sna_render_finish_solid reset\n")); |
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357 | |||
358 | cache->cache_bo = kgem_create_linear(&sna->kgem, sizeof(cache->color)); |
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359 | cache->bo[0] = kgem_create_proxy(cache->cache_bo, 0, sizeof(uint32_t)); |
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360 | cache->bo[0]->pitch = 4; |
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361 | if (force) |
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362 | cache->size = 1; |
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363 | } |
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364 | |||
365 | |||
366 | struct kgem_bo * |
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367 | sna_render_get_solid(struct sna *sna, uint32_t color) |
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368 | { |
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369 | struct sna_solid_cache *cache = &sna->render.solid_cache; |
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370 | int i; |
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371 | |||
372 | DBG(("%s: %08x\n", __FUNCTION__, color)); |
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373 | |||
374 | // if ((color & 0xffffff) == 0) /* alpha only */ |
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375 | // return kgem_bo_reference(sna->render.alpha_cache.bo[color>>24]); |
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376 | |||
377 | if (color == 0xffffffff) { |
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378 | DBG(("%s(white)\n", __FUNCTION__)); |
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379 | return kgem_bo_reference(cache->bo[0]); |
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380 | } |
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381 | |||
382 | if (cache->color[cache->last] == color) { |
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383 | DBG(("sna_render_get_solid(%d) = %x (last)\n", |
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384 | cache->last, color)); |
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385 | return kgem_bo_reference(cache->bo[cache->last]); |
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386 | } |
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387 | |||
388 | for (i = 1; i < cache->size; i++) { |
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389 | if (cache->color[i] == color) { |
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390 | if (cache->bo[i] == NULL) { |
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391 | DBG(("sna_render_get_solid(%d) = %x (recreate)\n", |
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392 | i, color)); |
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393 | goto create; |
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394 | } else { |
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395 | DBG(("sna_render_get_solid(%d) = %x (old)\n", |
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396 | i, color)); |
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397 | goto done; |
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398 | } |
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399 | } |
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400 | } |
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401 | |||
402 | sna_render_finish_solid(sna, i == ARRAY_SIZE(cache->color)); |
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403 | |||
404 | i = cache->size++; |
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405 | cache->color[i] = color; |
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406 | cache->dirty = 1; |
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407 | DBG(("sna_render_get_solid(%d) = %x (new)\n", i, color)); |
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408 | |||
409 | create: |
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410 | cache->bo[i] = kgem_create_proxy(cache->cache_bo, |
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411 | i*sizeof(uint32_t), sizeof(uint32_t)); |
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412 | cache->bo[i]->pitch = 4; |
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413 | |||
414 | done: |
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415 | cache->last = i; |
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416 | return kgem_bo_reference(cache->bo[i]); |
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417 | } |
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418 | |||
419 | #endif |
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420 | |||
421 | |||
422 | int sna_blit_copy(bitmap_t *src_bitmap, int dst_x, int dst_y, |
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423 | int w, int h, int src_x, int src_y) |
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424 | |||
425 | { |
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426 | struct sna_copy_op copy; |
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427 | struct _Pixmap src, dst; |
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428 | struct kgem_bo *src_bo; |
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429 | |||
430 | char proc_info[1024]; |
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431 | int winx, winy; |
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432 | |||
433 | get_proc_info(proc_info); |
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434 | |||
435 | winx = *(uint32_t*)(proc_info+34); |
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436 | winy = *(uint32_t*)(proc_info+38); |
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437 | |||
438 | memset(&src, 0, sizeof(src)); |
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439 | memset(&dst, 0, sizeof(dst)); |
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440 | |||
441 | src.drawable.bitsPerPixel = 32; |
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442 | src.drawable.width = src_bitmap->width; |
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443 | src.drawable.height = src_bitmap->height; |
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444 | |||
445 | dst.drawable.bitsPerPixel = 32; |
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446 | dst.drawable.width = sna_fb.width; |
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447 | dst.drawable.height = sna_fb.height; |
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448 | |||
449 | memset(©, 0, sizeof(copy)); |
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450 | |||
451 | src_bo = (struct kgem_bo*)src_bitmap->handle; |
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452 | |||
453 | if( sna_device->render.copy(sna_device, GXcopy, |
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454 | &src, src_bo, |
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455 | &dst, sna_fb.fb_bo, ©) ) |
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456 | { |
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457 | copy.blt(sna_device, ©, src_x, src_y, w, h, winx+dst_x, winy+dst_y); |
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458 | copy.done(sna_device, ©); |
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459 | } |
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460 | |||
461 | kgem_submit(&sna_device->kgem); |
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462 | |||
463 | return 0; |
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464 | |||
465 | // __asm__ __volatile__("int3"); |
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466 | |||
467 | }; |
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468 | |||
469 | typedef struct |
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470 | { |
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471 | uint32_t width; |
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472 | uint32_t height; |
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473 | void *data; |
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474 | uint32_t pitch; |
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475 | struct kgem_bo *bo; |
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476 | uint32_t bo_size; |
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477 | uint32_t flags; |
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478 | }surface_t; |
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479 | |||
480 | |||
481 | |||
482 | int sna_create_bitmap(bitmap_t *bitmap) |
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483 | { |
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484 | surface_t *sf; |
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485 | struct kgem_bo *bo; |
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486 | |||
487 | sf = malloc(sizeof(*sf)); |
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488 | if(sf == NULL) |
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489 | goto err_1; |
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490 | |||
491 | __lock_acquire_recursive(__sna_lock); |
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492 | |||
493 | bo = kgem_create_2d(&sna_device->kgem, bitmap->width, bitmap->height, |
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494 | 32,I915_TILING_NONE, CREATE_CPU_MAP); |
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495 | |||
496 | if(bo == NULL) |
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497 | goto err_2; |
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498 | |||
499 | void *map = kgem_bo_map(&sna_device->kgem, bo); |
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500 | if(map == NULL) |
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501 | goto err_3; |
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502 | |||
503 | sf->width = bitmap->width; |
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504 | sf->height = bitmap->height; |
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505 | sf->data = map; |
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506 | sf->pitch = bo->pitch; |
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507 | sf->bo = bo; |
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508 | sf->bo_size = PAGE_SIZE * bo->size.pages.count; |
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509 | sf->flags = bitmap->flags; |
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510 | |||
511 | bitmap->handle = (uint32_t)sf; |
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512 | __lock_release_recursive(__sna_lock); |
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513 | |||
514 | return 0; |
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515 | |||
516 | err_3: |
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517 | kgem_bo_destroy(&sna_device->kgem, bo); |
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518 | err_2: |
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519 | __lock_release_recursive(__sna_lock); |
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520 | free(sf); |
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521 | err_1: |
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522 | return -1; |
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523 | }; |
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524 | |||
525 | int sna_bitmap_from_handle(bitmap_t *bitmap, uint32_t handle) |
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526 | { |
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527 | surface_t *sf; |
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528 | struct kgem_bo *bo; |
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529 | |||
530 | sf = malloc(sizeof(*sf)); |
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531 | if(sf == NULL) |
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532 | goto err_1; |
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533 | |||
534 | __lock_acquire_recursive(__sna_lock); |
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535 | |||
536 | bo = kgem_bo_from_handle(&sna_device->kgem, handle, bitmap->pitch, bitmap->height); |
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537 | |||
538 | __lock_release_recursive(__sna_lock); |
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539 | |||
540 | sf->width = bitmap->width; |
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541 | sf->height = bitmap->height; |
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542 | sf->data = NULL; |
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543 | sf->pitch = bo->pitch; |
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544 | sf->bo = bo; |
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545 | sf->bo_size = PAGE_SIZE * bo->size.pages.count; |
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546 | sf->flags = bitmap->flags; |
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547 | |||
548 | bitmap->handle = (uint32_t)sf; |
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549 | |||
550 | return 0; |
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551 | |||
552 | err_2: |
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553 | __lock_release_recursive(__sna_lock); |
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554 | free(sf); |
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555 | err_1: |
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556 | return -1; |
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557 | }; |
||
558 | |||
559 | void sna_set_bo_handle(bitmap_t *bitmap, int handle) |
||
560 | { |
||
561 | surface_t *sf = to_surface(bitmap); |
||
562 | struct kgem_bo *bo = sf->bo; |
||
563 | bo->handle = handle; |
||
564 | } |
||
565 | |||
566 | int sna_destroy_bitmap(bitmap_t *bitmap) |
||
567 | { |
||
568 | surface_t *sf = to_surface(bitmap); |
||
569 | |||
570 | __lock_acquire_recursive(__sna_lock); |
||
571 | |||
572 | kgem_bo_destroy(&sna_device->kgem, sf->bo); |
||
573 | |||
574 | __lock_release_recursive(__sna_lock); |
||
575 | |||
576 | free(sf); |
||
577 | |||
578 | bitmap->handle = -1; |
||
579 | bitmap->data = (void*)-1; |
||
580 | bitmap->pitch = -1; |
||
581 | |||
582 | return 0; |
||
583 | }; |
||
584 | |||
585 | int sna_lock_bitmap(bitmap_t *bitmap) |
||
586 | { |
||
587 | surface_t *sf = to_surface(bitmap); |
||
588 | |||
589 | // printf("%s\n", __FUNCTION__); |
||
590 | __lock_acquire_recursive(__sna_lock); |
||
591 | |||
592 | kgem_bo_sync__cpu(&sna_device->kgem, sf->bo); |
||
593 | |||
594 | __lock_release_recursive(__sna_lock); |
||
595 | |||
596 | bitmap->data = sf->data; |
||
597 | bitmap->pitch = sf->pitch; |
||
598 | |||
599 | return 0; |
||
600 | }; |
||
601 | |||
602 | int sna_resize_bitmap(bitmap_t *bitmap) |
||
603 | { |
||
604 | surface_t *sf = to_surface(bitmap); |
||
605 | struct kgem *kgem = &sna_device->kgem; |
||
606 | struct kgem_bo *bo = sf->bo; |
||
607 | |||
608 | uint32_t size; |
||
609 | uint32_t pitch; |
||
610 | |||
611 | bitmap->pitch = -1; |
||
612 | bitmap->data = (void *) -1; |
||
613 | |||
614 | size = kgem_surface_size(kgem,kgem->has_relaxed_fencing, CREATE_CPU_MAP, |
||
615 | bitmap->width, bitmap->height, 32, I915_TILING_NONE, &pitch); |
||
616 | assert(size && size <= kgem->max_object_size); |
||
617 | |||
618 | if(sf->bo_size >= size) |
||
619 | { |
||
620 | sf->width = bitmap->width; |
||
621 | sf->height = bitmap->height; |
||
622 | sf->pitch = pitch; |
||
623 | bo->pitch = pitch; |
||
624 | |||
625 | return 0; |
||
626 | } |
||
627 | else |
||
628 | { |
||
629 | __lock_acquire_recursive(__sna_lock); |
||
630 | |||
631 | sna_bo_destroy(kgem, bo); |
||
632 | |||
633 | sf->bo = NULL; |
||
634 | |||
635 | bo = kgem_create_2d(kgem, bitmap->width, bitmap->height, |
||
636 | 32, I915_TILING_NONE, CREATE_CPU_MAP); |
||
637 | |||
638 | if(bo == NULL) |
||
639 | { |
||
640 | __lock_release_recursive(__sna_lock); |
||
641 | return -1; |
||
642 | }; |
||
643 | |||
644 | void *map = kgem_bo_map(kgem, bo); |
||
645 | if(map == NULL) |
||
646 | { |
||
647 | sna_bo_destroy(kgem, bo); |
||
648 | __lock_release_recursive(__sna_lock); |
||
649 | return -1; |
||
650 | }; |
||
651 | |||
652 | __lock_release_recursive(__sna_lock); |
||
653 | |||
654 | sf->width = bitmap->width; |
||
655 | sf->height = bitmap->height; |
||
656 | sf->data = map; |
||
657 | sf->pitch = bo->pitch; |
||
658 | sf->bo = bo; |
||
659 | sf->bo_size = PAGE_SIZE * bo->size.pages.count; |
||
660 | } |
||
661 | |||
662 | return 0; |
||
663 | }; |
||
664 | |||
665 | |||
666 | |||
667 | int sna_create_mask() |
||
668 | { |
||
669 | struct kgem_bo *bo; |
||
670 | |||
671 | // printf("%s width %d height %d\n", __FUNCTION__, sna_fb.width, sna_fb.height); |
||
672 | |||
673 | __lock_acquire_recursive(__sna_lock); |
||
674 | |||
675 | bo = kgem_create_2d(&sna_device->kgem, sna_fb.width, sna_fb.height, |
||
676 | 8,I915_TILING_NONE, CREATE_CPU_MAP); |
||
677 | |||
678 | if(unlikely(bo == NULL)) |
||
679 | goto err_1; |
||
680 | |||
681 | int *map = kgem_bo_map(&sna_device->kgem, bo); |
||
682 | if(map == NULL) |
||
683 | goto err_2; |
||
684 | |||
685 | __lock_release_recursive(__sna_lock); |
||
686 | |||
687 | memset(map, 0, bo->pitch * sna_fb.height); |
||
688 | |||
689 | tls_set(tls_mask, bo); |
||
690 | |||
691 | return 0; |
||
692 | |||
693 | err_2: |
||
694 | kgem_bo_destroy(&sna_device->kgem, bo); |
||
695 | err_1: |
||
696 | __lock_release_recursive(__sna_lock); |
||
697 | return -1; |
||
698 | }; |
||
699 | |||
700 | |||
701 | bool |
||
702 | gen6_composite(struct sna *sna, |
||
703 | uint8_t op, |
||
704 | PixmapPtr src, struct kgem_bo *src_bo, |
||
705 | PixmapPtr mask,struct kgem_bo *mask_bo, |
||
706 | PixmapPtr dst, struct kgem_bo *dst_bo, |
||
707 | int32_t src_x, int32_t src_y, |
||
708 | int32_t msk_x, int32_t msk_y, |
||
709 | int32_t dst_x, int32_t dst_y, |
||
710 | int32_t width, int32_t height, |
||
711 | struct sna_composite_op *tmp); |
||
712 | |||
713 | |||
714 | #define MAP(ptr) ((void*)((uintptr_t)(ptr) & ~3)) |
||
715 | |||
716 | int sna_blit_tex(bitmap_t *bitmap, bool scale, int dst_x, int dst_y, |
||
717 | int w, int h, int src_x, int src_y) |
||
718 | |||
719 | { |
||
720 | surface_t *sf = to_surface(bitmap); |
||
721 | |||
722 | struct drm_i915_mask_update update; |
||
723 | |||
724 | struct sna_composite_op composite; |
||
725 | struct _Pixmap src, dst, mask; |
||
726 | struct kgem_bo *src_bo, *mask_bo; |
||
727 | int winx, winy; |
||
728 | |||
729 | char proc_info[1024]; |
||
730 | |||
731 | get_proc_info(proc_info); |
||
732 | |||
733 | winx = *(uint32_t*)(proc_info+34); |
||
734 | winy = *(uint32_t*)(proc_info+38); |
||
735 | // winw = *(uint32_t*)(proc_info+42)+1; |
||
736 | // winh = *(uint32_t*)(proc_info+46)+1; |
||
737 | |||
738 | mask_bo = tls_get(tls_mask); |
||
739 | |||
740 | if(unlikely(mask_bo == NULL)) |
||
741 | { |
||
742 | sna_create_mask(); |
||
743 | mask_bo = tls_get(tls_mask); |
||
744 | if( mask_bo == NULL) |
||
745 | return -1; |
||
746 | }; |
||
747 | |||
748 | if(kgem_update_fb(&sna_device->kgem, &sna_fb)) |
||
749 | { |
||
750 | __lock_acquire_recursive(__sna_lock); |
||
751 | kgem_bo_destroy(&sna_device->kgem, mask_bo); |
||
752 | __lock_release_recursive(__sna_lock); |
||
753 | |||
754 | sna_create_mask(); |
||
755 | mask_bo = tls_get(tls_mask); |
||
756 | if( mask_bo == NULL) |
||
757 | return -1; |
||
758 | } |
||
759 | |||
760 | VG_CLEAR(update); |
||
761 | update.handle = mask_bo->handle; |
||
762 | update.bo_map = (int)kgem_bo_map__cpu(&sna_device->kgem, mask_bo); |
||
763 | drmIoctl(sna_device->kgem.fd, SRV_MASK_UPDATE, &update); |
||
764 | mask_bo->pitch = update.bo_pitch; |
||
765 | |||
766 | memset(&src, 0, sizeof(src)); |
||
767 | memset(&dst, 0, sizeof(dst)); |
||
768 | memset(&mask, 0, sizeof(dst)); |
||
769 | |||
770 | src.drawable.bitsPerPixel = 32; |
||
771 | |||
772 | src.drawable.width = sf->width; |
||
773 | src.drawable.height = sf->height; |
||
774 | |||
775 | dst.drawable.bitsPerPixel = 32; |
||
776 | dst.drawable.width = sna_fb.width; |
||
777 | dst.drawable.height = sna_fb.height; |
||
778 | |||
779 | mask.drawable.bitsPerPixel = 8; |
||
780 | mask.drawable.width = update.width; |
||
781 | mask.drawable.height = update.height; |
||
782 | |||
783 | memset(&composite, 0, sizeof(composite)); |
||
784 | |||
785 | src_bo = sf->bo; |
||
786 | |||
787 | __lock_acquire_recursive(__sna_lock); |
||
788 | |||
789 | |||
790 | if( sna_device->render.blit_tex(sna_device, PictOpSrc,scale, |
||
791 | &src, src_bo, |
||
792 | &mask, mask_bo, |
||
793 | &dst, sna_fb.fb_bo, |
||
794 | src_x, src_y, |
||
795 | dst_x, dst_y, |
||
796 | winx+dst_x, winy+dst_y, |
||
797 | w, h, |
||
798 | &composite) ) |
||
799 | { |
||
800 | struct sna_composite_rectangles r; |
||
801 | |||
802 | r.src.x = src_x; |
||
803 | r.src.y = src_y; |
||
804 | r.mask.x = dst_x; |
||
805 | r.mask.y = dst_y; |
||
806 | r.dst.x = winx+dst_x; |
||
807 | r.dst.y = winy+dst_y; |
||
808 | r.width = w; |
||
809 | r.height = h; |
||
810 | |||
811 | composite.blt(sna_device, &composite, &r); |
||
812 | composite.done(sna_device, &composite); |
||
813 | |||
814 | }; |
||
815 | |||
816 | kgem_submit(&sna_device->kgem); |
||
817 | |||
818 | __lock_release_recursive(__sna_lock); |
||
819 | |||
820 | bitmap->data = (void*)-1; |
||
821 | bitmap->pitch = -1; |
||
822 | |||
823 | return 0; |
||
824 | } |
||
825 | |||
826 | |||
827 | |||
828 | |||
829 | |||
830 | |||
831 | |||
832 | static const struct intel_device_info intel_generic_info = { |
||
833 | .gen = -1, |
||
834 | }; |
||
835 | |||
836 | static const struct intel_device_info intel_i915_info = { |
||
837 | .gen = 030, |
||
838 | }; |
||
839 | static const struct intel_device_info intel_i945_info = { |
||
840 | .gen = 031, |
||
841 | }; |
||
842 | |||
843 | static const struct intel_device_info intel_g33_info = { |
||
844 | .gen = 033, |
||
845 | }; |
||
846 | |||
847 | static const struct intel_device_info intel_i965_info = { |
||
848 | .gen = 040, |
||
849 | }; |
||
850 | |||
851 | static const struct intel_device_info intel_g4x_info = { |
||
852 | .gen = 045, |
||
853 | }; |
||
854 | |||
855 | static const struct intel_device_info intel_ironlake_info = { |
||
856 | .gen = 050, |
||
857 | }; |
||
858 | |||
859 | static const struct intel_device_info intel_sandybridge_info = { |
||
860 | .gen = 060, |
||
861 | }; |
||
862 | |||
863 | static const struct intel_device_info intel_ivybridge_info = { |
||
864 | .gen = 070, |
||
865 | }; |
||
866 | |||
867 | static const struct intel_device_info intel_valleyview_info = { |
||
868 | .gen = 071, |
||
869 | }; |
||
870 | |||
871 | static const struct intel_device_info intel_haswell_info = { |
||
872 | .gen = 075, |
||
873 | }; |
||
874 | |||
875 | #define INTEL_DEVICE_MATCH(d,i) \ |
||
876 | { 0x8086, (d), PCI_MATCH_ANY, PCI_MATCH_ANY, 0x3 << 16, 0xff << 16, (intptr_t)(i) } |
||
877 | |||
878 | |||
879 | static const struct pci_id_match intel_device_match[] = { |
||
880 | |||
881 | INTEL_I915G_IDS(&intel_i915_info), |
||
882 | INTEL_I915GM_IDS(&intel_i915_info), |
||
883 | INTEL_I945G_IDS(&intel_i945_info), |
||
884 | INTEL_I945GM_IDS(&intel_i945_info), |
||
885 | |||
886 | INTEL_G33_IDS(&intel_g33_info), |
||
887 | INTEL_PINEVIEW_IDS(&intel_g33_info), |
||
888 | |||
889 | INTEL_I965G_IDS(&intel_i965_info), |
||
890 | INTEL_I965GM_IDS(&intel_i965_info), |
||
891 | |||
892 | INTEL_G45_IDS(&intel_g4x_info), |
||
893 | INTEL_GM45_IDS(&intel_g4x_info), |
||
894 | |||
895 | INTEL_IRONLAKE_D_IDS(&intel_ironlake_info), |
||
896 | INTEL_IRONLAKE_M_IDS(&intel_ironlake_info), |
||
897 | |||
898 | INTEL_SNB_D_IDS(&intel_sandybridge_info), |
||
899 | INTEL_SNB_M_IDS(&intel_sandybridge_info), |
||
900 | |||
901 | INTEL_IVB_D_IDS(&intel_ivybridge_info), |
||
902 | INTEL_IVB_M_IDS(&intel_ivybridge_info), |
||
903 | |||
904 | INTEL_HSW_D_IDS(&intel_haswell_info), |
||
905 | INTEL_HSW_M_IDS(&intel_haswell_info), |
||
906 | |||
907 | INTEL_VLV_D_IDS(&intel_valleyview_info), |
||
908 | INTEL_VLV_M_IDS(&intel_valleyview_info), |
||
909 | |||
910 | INTEL_VGA_DEVICE(PCI_MATCH_ANY, &intel_generic_info), |
||
911 | |||
912 | { 0, 0, 0 }, |
||
913 | }; |
||
914 | |||
915 | const struct pci_id_match *PciDevMatch(uint16_t dev,const struct pci_id_match *list) |
||
916 | { |
||
917 | while(list->device_id) |
||
918 | { |
||
919 | if(dev==list->device_id) |
||
920 | return list; |
||
921 | list++; |
||
922 | } |
||
923 | return NULL; |
||
924 | } |
||
925 | |||
926 | const struct intel_device_info * |
||
927 | intel_detect_chipset(struct pci_device *pci) |
||
928 | { |
||
929 | const struct pci_id_match *ent = NULL; |
||
930 | |||
931 | ent = PciDevMatch(pci->device_id, intel_device_match); |
||
932 | |||
933 | if(ent != NULL) |
||
934 | return (const struct intel_device_info*)ent->match_data; |
||
935 | else |
||
936 | return &intel_generic_info; |
||
937 | } |
||
938 | |||
939 | int intel_get_device_id(int fd) |
||
940 | { |
||
941 | struct drm_i915_getparam gp; |
||
942 | int devid = 0; |
||
943 | |||
944 | memset(&gp, 0, sizeof(gp)); |
||
945 | gp.param = I915_PARAM_CHIPSET_ID; |
||
946 | gp.value = &devid; |
||
947 | |||
948 | if (drmIoctl(fd, DRM_IOCTL_I915_GETPARAM, &gp)) |
||
949 | return 0; |
||
950 | |||
951 | return devid; |
||
952 | } |
||
953 | |||
954 | int drmIoctl(int fd, unsigned long request, void *arg) |
||
955 | { |
||
956 | ioctl_t io; |
||
957 | |||
958 | io.handle = fd; |
||
959 | io.io_code = request; |
||
960 | io.input = arg; |
||
961 | io.inp_size = 64; |
||
962 | io.output = NULL; |
||
963 | io.out_size = 0; |
||
964 | |||
965 | return call_service(&io); |
||
966 | }><>><>=>>> |
||
967 |