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6936 | serge | 1 | #ifndef __GENERIC_IO_H |
2 | #define __GENERIC_IO_H |
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3 | |||
4 | #include |
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5 | #include |
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6 | |||
7 | /* |
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8 | * These are the "generic" interfaces for doing new-style |
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9 | * memory-mapped or PIO accesses. Architectures may do |
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10 | * their own arch-optimized versions, these just act as |
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11 | * wrappers around the old-style IO register access functions: |
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12 | * read[bwl]/write[bwl]/in[bwl]/out[bwl] |
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13 | * |
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14 | * Don't include this directly, include it from |
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15 | */ |
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16 | |||
17 | /* |
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18 | * Read/write from/to an (offsettable) iomem cookie. It might be a PIO |
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19 | * access or a MMIO access, these functions don't care. The info is |
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20 | * encoded in the hardware mapping set up by the mapping functions |
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21 | * (or the cookie itself, depending on implementation and hw). |
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22 | * |
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23 | * The generic routines just encode the PIO/MMIO as part of the |
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24 | * cookie, and coldly assume that the MMIO IO mappings are not |
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25 | * in the low address range. Architectures for which this is not |
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26 | * true can't use this generic implementation. |
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27 | */ |
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28 | extern unsigned int ioread8(void __iomem *); |
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29 | extern unsigned int ioread16(void __iomem *); |
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30 | extern unsigned int ioread16be(void __iomem *); |
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31 | //extern unsigned int ioread32(void __iomem *); |
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32 | |||
33 | #ifndef ioread32 |
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34 | #define ioread32 ioread32 |
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35 | static inline u32 ioread32(const volatile void __iomem *addr) |
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36 | { |
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37 | return readl(addr); |
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38 | } |
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39 | #endif |
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40 | |||
41 | extern unsigned int ioread32be(void __iomem *); |
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42 | |||
43 | extern void iowrite8(u8, void __iomem *); |
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44 | extern void iowrite16(u16, void __iomem *); |
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45 | extern void iowrite16be(u16, void __iomem *); |
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46 | //extern void iowrite32(u32, void __iomem *); |
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47 | #ifndef iowrite32 |
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48 | //#define iowrite32 iowrite32 |
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49 | static inline void iowrite32(u32 value, volatile void __iomem *addr) |
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50 | { |
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51 | writel(value, addr); |
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52 | } |
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53 | #endif |
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54 | |||
55 | extern void iowrite32be(u32, void __iomem *); |
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56 | |||
57 | /* |
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58 | * "string" versions of the above. Note that they |
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59 | * use native byte ordering for the accesses (on |
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60 | * the assumption that IO and memory agree on a |
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61 | * byte order, and CPU byteorder is irrelevant). |
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62 | * |
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63 | * They do _not_ update the port address. If you |
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64 | * want MMIO that copies stuff laid out in MMIO |
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65 | * memory across multiple ports, use "memcpy_toio()" |
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66 | * and friends. |
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67 | */ |
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68 | extern void ioread8_rep(void __iomem *port, void *buf, unsigned long count); |
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69 | extern void ioread16_rep(void __iomem *port, void *buf, unsigned long count); |
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70 | extern void ioread32_rep(void __iomem *port, void *buf, unsigned long count); |
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71 | |||
72 | extern void iowrite8_rep(void __iomem *port, const void *buf, unsigned long count); |
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73 | extern void iowrite16_rep(void __iomem *port, const void *buf, unsigned long count); |
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74 | extern void iowrite32_rep(void __iomem *port, const void *buf, unsigned long count); |
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75 | |||
76 | #ifdef CONFIG_HAS_IOPORT_MAP |
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77 | /* Create a virtual mapping cookie for an IO port range */ |
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78 | extern void __iomem *ioport_map(unsigned long port, unsigned int nr); |
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79 | extern void ioport_unmap(void __iomem *); |
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80 | #endif |
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81 | |||
82 | #ifndef ARCH_HAS_IOREMAP_WC |
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83 | #define ioremap_wc ioremap_nocache |
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84 | #endif |
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85 | |||
86 | #ifndef ARCH_HAS_IOREMAP_WT |
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87 | #define ioremap_wt ioremap_nocache |
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88 | #endif |
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89 | |||
90 | #ifdef CONFIG_PCI |
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91 | /* Destroy a virtual mapping cookie for a PCI BAR (memory or IO) */ |
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92 | struct pci_dev; |
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93 | extern void pci_iounmap(struct pci_dev *dev, void __iomem *); |
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94 | #elif defined(CONFIG_GENERIC_IOMAP) |
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95 | struct pci_dev; |
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96 | static inline void pci_iounmap(struct pci_dev *dev, void __iomem *addr) |
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97 | { } |
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98 | #endif |
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99 | |||
100 | #include |
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101 | |||
102 | #endif |