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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5270 | serge | 1 | #ifndef _X86_IRQFLAGS_H_ |
| 2 | #define _X86_IRQFLAGS_H_ |
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| 3 | |||
| 4 | #include |
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| 5 | |||
| 6 | #ifndef __ASSEMBLY__ |
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| 7 | /* |
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| 8 | * Interrupt control: |
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| 9 | */ |
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| 10 | |||
| 11 | static inline unsigned long native_save_fl(void) |
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| 12 | { |
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| 13 | unsigned long flags; |
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| 14 | |||
| 15 | /* |
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| 16 | * "=rm" is safe here, because "pop" adjusts the stack before |
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| 17 | * it evaluates its effective address -- this is part of the |
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| 18 | * documented behavior of the "pop" instruction. |
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| 19 | */ |
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| 20 | asm volatile("# __raw_save_flags\n\t" |
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| 21 | "pushf ; pop %0" |
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| 22 | : "=rm" (flags) |
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| 23 | : /* no input */ |
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| 24 | : "memory"); |
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| 25 | |||
| 26 | return flags; |
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| 27 | } |
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| 28 | |||
| 29 | static inline void native_restore_fl(unsigned long flags) |
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| 30 | { |
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| 31 | asm volatile("push %0 ; popf" |
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| 32 | : /* no output */ |
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| 33 | :"g" (flags) |
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| 34 | :"memory", "cc"); |
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| 35 | } |
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| 36 | |||
| 37 | static inline void native_irq_disable(void) |
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| 38 | { |
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| 39 | asm volatile("cli": : :"memory"); |
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| 40 | } |
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| 41 | |||
| 42 | static inline void native_irq_enable(void) |
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| 43 | { |
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| 44 | asm volatile("sti": : :"memory"); |
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| 45 | } |
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| 46 | |||
| 47 | static inline void native_safe_halt(void) |
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| 48 | { |
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| 49 | asm volatile("sti; hlt": : :"memory"); |
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| 50 | } |
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| 51 | |||
| 52 | static inline void native_halt(void) |
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| 53 | { |
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| 54 | asm volatile("hlt": : :"memory"); |
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| 55 | } |
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| 56 | |||
| 57 | #endif |
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| 58 | |||
| 59 | #ifdef CONFIG_PARAVIRT |
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| 60 | #include |
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| 61 | #else |
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| 62 | #ifndef __ASSEMBLY__ |
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| 63 | #include |
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| 64 | |||
| 65 | static inline notrace unsigned long arch_local_save_flags(void) |
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| 66 | { |
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| 67 | return native_save_fl(); |
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| 68 | } |
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| 69 | |||
| 70 | static inline notrace void arch_local_irq_restore(unsigned long flags) |
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| 71 | { |
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| 72 | native_restore_fl(flags); |
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| 73 | } |
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| 74 | |||
| 75 | static inline notrace void arch_local_irq_disable(void) |
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| 76 | { |
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| 77 | native_irq_disable(); |
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| 78 | } |
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| 79 | |||
| 80 | static inline notrace void arch_local_irq_enable(void) |
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| 81 | { |
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| 82 | native_irq_enable(); |
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| 83 | } |
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| 84 | |||
| 85 | /* |
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| 86 | * Used in the idle loop; sti takes one instruction cycle |
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| 87 | * to complete: |
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| 88 | */ |
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| 89 | static inline void arch_safe_halt(void) |
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| 90 | { |
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| 91 | native_safe_halt(); |
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| 92 | } |
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| 93 | |||
| 94 | /* |
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| 95 | * Used when interrupts are already enabled or to |
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| 96 | * shutdown the processor: |
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| 97 | */ |
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| 98 | static inline void halt(void) |
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| 99 | { |
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| 100 | native_halt(); |
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| 101 | } |
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| 102 | |||
| 103 | /* |
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| 104 | * For spinlocks, etc: |
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| 105 | */ |
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| 106 | static inline notrace unsigned long arch_local_irq_save(void) |
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| 107 | { |
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| 108 | unsigned long flags = arch_local_save_flags(); |
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| 109 | arch_local_irq_disable(); |
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| 110 | return flags; |
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| 111 | } |
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| 112 | #else |
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| 113 | |||
| 114 | #define ENABLE_INTERRUPTS(x) sti |
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| 115 | #define DISABLE_INTERRUPTS(x) cli |
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| 116 | |||
| 117 | #ifdef CONFIG_X86_64 |
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| 118 | #define SWAPGS swapgs |
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| 119 | /* |
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| 120 | * Currently paravirt can't handle swapgs nicely when we |
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| 121 | * don't have a stack we can rely on (such as a user space |
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| 122 | * stack). So we either find a way around these or just fault |
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| 123 | * and emulate if a guest tries to call swapgs directly. |
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| 124 | * |
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| 125 | * Either way, this is a good way to document that we don't |
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| 126 | * have a reliable stack. x86_64 only. |
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| 127 | */ |
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| 128 | #define SWAPGS_UNSAFE_STACK swapgs |
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| 129 | |||
| 130 | #define PARAVIRT_ADJUST_EXCEPTION_FRAME /* */ |
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| 131 | |||
| 132 | #define INTERRUPT_RETURN jmp native_iret |
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| 133 | #define USERGS_SYSRET64 \ |
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| 134 | swapgs; \ |
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| 135 | sysretq; |
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| 136 | #define USERGS_SYSRET32 \ |
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| 137 | swapgs; \ |
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| 138 | sysretl |
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| 139 | #define ENABLE_INTERRUPTS_SYSEXIT32 \ |
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| 140 | swapgs; \ |
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| 141 | sti; \ |
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| 142 | sysexit |
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| 143 | |||
| 144 | #else |
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| 145 | #define INTERRUPT_RETURN iret |
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| 146 | #define ENABLE_INTERRUPTS_SYSEXIT sti; sysexit |
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| 147 | #define GET_CR0_INTO_EAX movl %cr0, %eax |
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| 148 | #endif |
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| 149 | |||
| 150 | |||
| 151 | #endif /* __ASSEMBLY__ */ |
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| 152 | #endif /* CONFIG_PARAVIRT */ |
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| 153 | |||
| 154 | #ifndef __ASSEMBLY__ |
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| 155 | static inline int arch_irqs_disabled_flags(unsigned long flags) |
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| 156 | { |
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| 157 | return !(flags & X86_EFLAGS_IF); |
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| 158 | } |
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| 159 | |||
| 160 | static inline int arch_irqs_disabled(void) |
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| 161 | { |
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| 162 | unsigned long flags = arch_local_save_flags(); |
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| 163 | |||
| 164 | return arch_irqs_disabled_flags(flags); |
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| 165 | } |
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| 166 | |||
| 167 | #else |
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| 168 | |||
| 169 | #ifdef CONFIG_X86_64 |
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| 170 | #define ARCH_LOCKDEP_SYS_EXIT call lockdep_sys_exit_thunk |
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| 171 | #define ARCH_LOCKDEP_SYS_EXIT_IRQ \ |
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| 172 | TRACE_IRQS_ON; \ |
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| 173 | sti; \ |
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| 174 | SAVE_REST; \ |
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| 175 | LOCKDEP_SYS_EXIT; \ |
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| 176 | RESTORE_REST; \ |
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| 177 | cli; \ |
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| 178 | TRACE_IRQS_OFF; |
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| 179 | |||
| 180 | #else |
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| 181 | #define ARCH_LOCKDEP_SYS_EXIT \ |
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| 182 | pushl %eax; \ |
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| 183 | pushl %ecx; \ |
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| 184 | pushl %edx; \ |
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| 185 | call lockdep_sys_exit; \ |
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| 186 | popl %edx; \ |
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| 187 | popl %ecx; \ |
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| 188 | popl %eax; |
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| 189 | |||
| 190 | #define ARCH_LOCKDEP_SYS_EXIT_IRQ |
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| 191 | #endif |
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| 192 | |||
| 193 | #ifdef CONFIG_TRACE_IRQFLAGS |
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| 194 | # define TRACE_IRQS_ON call trace_hardirqs_on_thunk; |
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| 195 | # define TRACE_IRQS_OFF call trace_hardirqs_off_thunk; |
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| 196 | #else |
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| 197 | # define TRACE_IRQS_ON |
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| 198 | # define TRACE_IRQS_OFF |
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| 199 | #endif |
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| 200 | #ifdef CONFIG_DEBUG_LOCK_ALLOC |
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| 201 | # define LOCKDEP_SYS_EXIT ARCH_LOCKDEP_SYS_EXIT |
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| 202 | # define LOCKDEP_SYS_EXIT_IRQ ARCH_LOCKDEP_SYS_EXIT_IRQ |
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| 203 | # else |
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| 204 | # define LOCKDEP_SYS_EXIT |
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| 205 | # define LOCKDEP_SYS_EXIT_IRQ |
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| 206 | # endif |
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| 207 | |||
| 208 | #endif /* __ASSEMBLY__ */ |
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| 209 | #endif |