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Rev | Author | Line No. | Line |
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3545 | hidnplayr | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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8997 | hidnplayr | 3 | ;; Copyright (C) KolibriOS team 2004-2021. All rights reserved. ;; |
3545 | hidnplayr | 4 | ;; Distributed under terms of the GNU General Public License ;; |
5 | ;; ;; |
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6 | ;; RTL8169 driver for KolibriOS ;; |
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7 | ;; ;; |
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8 | ;; Copyright 2007 mike.dld, ;; |
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9 | ;; mike.dld@gmail.com ;; |
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10 | ;; ;; |
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6119 | hidnplayr | 11 | ;; Port to the new network stack by hidnplayr ;; |
3545 | hidnplayr | 12 | ;; ;; |
13 | ;; References: ;; |
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6124 | hidnplayr | 14 | ;; r8169.c - linux driver ;; |
3545 | hidnplayr | 15 | ;; ;; |
16 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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17 | ;; Version 2, June 1991 ;; |
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18 | ;; ;; |
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19 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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20 | |||
5050 | hidnplayr | 21 | format PE DLL native |
22 | entry START |
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3545 | hidnplayr | 23 | |
5050 | hidnplayr | 24 | CURRENT_API = 0x0200 |
25 | COMPATIBLE_API = 0x0100 |
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26 | API_VERSION = (COMPATIBLE_API shl 16) + CURRENT_API |
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3545 | hidnplayr | 27 | |
8997 | hidnplayr | 28 | ; configureable area |
3545 | hidnplayr | 29 | |
8997 | hidnplayr | 30 | MAX_DEVICES = 16 ; Maximum number of devices this driver may handle |
31 | |||
32 | __DEBUG__ = 1 ; 1 = on, 0 = off |
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5050 | hidnplayr | 33 | __DEBUG_LEVEL__ = 2 ; 1 = verbose, 2 = errors only |
3545 | hidnplayr | 34 | |
8997 | hidnplayr | 35 | NUM_TX_DESC = 32 ; Number of packets in send ring buffer |
36 | NUM_RX_DESC = 32 ; Number of packets in receive ring buffer |
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3545 | hidnplayr | 37 | |
8997 | hidnplayr | 38 | ; end configureable area |
39 | |||
5050 | hidnplayr | 40 | section '.flat' readable writable executable |
41 | |||
42 | include '../proc32.inc' |
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4467 | hidnplayr | 43 | include '../struct.inc' |
44 | include '../macros.inc' |
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3545 | hidnplayr | 45 | include '../fdo.inc' |
5074 | hidnplayr | 46 | include '../netdrv.inc' |
3545 | hidnplayr | 47 | |
8997 | hidnplayr | 48 | if (bsr NUM_TX_DESC)>(bsf NUM_TX_DESC) |
49 | display 'NUM_TX_DESC must be a power of two' |
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50 | err |
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51 | end if |
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52 | |||
53 | if (bsr NUM_RX_DESC)>(bsf NUM_RX_DESC) |
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54 | display 'NUM_RX_DESC must be a power of two' |
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55 | err |
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56 | end if |
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57 | |||
3545 | hidnplayr | 58 | REG_MAC0 = 0x0 ; Ethernet hardware address |
59 | REG_MAR0 = 0x8 ; Multicast filter |
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60 | REG_TxDescStartAddr = 0x20 |
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61 | REG_TxHDescStartAddr = 0x28 |
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62 | REG_FLASH = 0x30 |
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63 | REG_ERSR = 0x36 |
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64 | REG_ChipCmd = 0x37 |
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65 | REG_TxPoll = 0x38 |
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66 | REG_IntrMask = 0x3C |
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67 | REG_IntrStatus = 0x3E |
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68 | REG_TxConfig = 0x40 |
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69 | REG_RxConfig = 0x44 |
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70 | REG_RxMissed = 0x4C |
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71 | REG_Cfg9346 = 0x50 |
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72 | REG_Config0 = 0x51 |
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73 | REG_Config1 = 0x52 |
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74 | REG_Config2 = 0x53 |
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75 | REG_Config3 = 0x54 |
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76 | REG_Config4 = 0x55 |
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77 | REG_Config5 = 0x56 |
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78 | REG_MultiIntr = 0x5C |
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79 | REG_PHYAR = 0x60 |
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80 | REG_TBICSR = 0x64 |
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81 | REG_TBI_ANAR = 0x68 |
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82 | REG_TBI_LPAR = 0x6A |
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83 | REG_PHYstatus = 0x6C |
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84 | REG_RxMaxSize = 0xDA |
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85 | REG_CPlusCmd = 0xE0 |
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86 | REG_RxDescStartAddr = 0xE4 |
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87 | REG_ETThReg = 0xEC |
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88 | REG_FuncEvent = 0xF0 |
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89 | REG_FuncEventMask = 0xF4 |
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90 | REG_FuncPresetState = 0xF8 |
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91 | REG_FuncForceEvent = 0xFC |
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92 | |||
93 | ; InterruptStatusBits |
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94 | ISB_SYSErr = 0x8000 |
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95 | ISB_PCSTimeout = 0x4000 |
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96 | ISB_SWInt = 0x0100 |
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97 | ISB_TxDescUnavail = 0x80 |
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98 | ISB_RxFIFOOver = 0x40 |
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99 | ISB_LinkChg = 0x20 |
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100 | ISB_RxOverflow = 0x10 |
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101 | ISB_TxErr = 0x08 |
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102 | ISB_TxOK = 0x04 |
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103 | ISB_RxErr = 0x02 |
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104 | ISB_RxOK = 0x01 |
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105 | |||
106 | ; RxStatusDesc |
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8997 | hidnplayr | 107 | SD_RxBOVF = (1 shl 24) |
108 | SD_RxFOVF = (1 shl 23) |
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109 | SD_RxRWT = (1 shl 22) |
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110 | SD_RxRES = (1 shl 21) |
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111 | SD_RxRUNT = (1 shl 20) |
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112 | SD_RxCRC = (1 shl 19) |
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3545 | hidnplayr | 113 | |
114 | ; ChipCmdBits |
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115 | CMD_Reset = 0x10 |
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116 | CMD_RxEnb = 0x08 |
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117 | CMD_TxEnb = 0x04 |
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118 | CMD_RxBufEmpty = 0x01 |
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119 | |||
120 | ; Cfg9346Bits |
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121 | CFG_9346_Lock = 0x00 |
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122 | CFG_9346_Unlock = 0xC0 |
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123 | |||
124 | ; rx_mode_bits |
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125 | RXM_AcceptErr = 0x20 |
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126 | RXM_AcceptRunt = 0x10 |
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127 | RXM_AcceptBroadcast = 0x08 |
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128 | RXM_AcceptMulticast = 0x04 |
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129 | RXM_AcceptMyPhys = 0x02 |
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130 | RXM_AcceptAllPhys = 0x01 |
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131 | |||
132 | ; RxConfigBits |
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133 | RXC_FIFOShift = 13 |
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134 | RXC_DMAShift = 8 |
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135 | |||
136 | ; TxConfigBits |
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137 | TXC_InterFrameGapShift = 24 |
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138 | TXC_DMAShift = 8 ; DMA burst value (0-7) is shift this many bits |
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139 | |||
140 | ; PHYstatus |
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141 | PHYS_TBI_Enable = 0x80 |
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142 | PHYS_TxFlowCtrl = 0x40 |
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143 | PHYS_RxFlowCtrl = 0x20 |
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144 | PHYS_1000bpsF = 0x10 |
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145 | PHYS_100bps = 0x08 |
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146 | PHYS_10bps = 0x04 |
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147 | PHYS_LinkStatus = 0x02 |
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148 | PHYS_FullDup = 0x01 |
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149 | |||
150 | ; GIGABIT_PHY_registers |
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151 | PHY_CTRL_REG = 0 |
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152 | PHY_STAT_REG = 1 |
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153 | PHY_AUTO_NEGO_REG = 4 |
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154 | PHY_1000_CTRL_REG = 9 |
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155 | |||
156 | ; GIGABIT_PHY_REG_BIT |
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157 | PHY_Restart_Auto_Nego = 0x0200 |
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158 | PHY_Enable_Auto_Nego = 0x1000 |
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159 | |||
160 | ; PHY_STAT_REG = 1 |
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161 | PHY_Auto_Neco_Comp = 0x0020 |
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162 | |||
163 | ; PHY_AUTO_NEGO_REG = 4 |
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164 | PHY_Cap_10_Half = 0x0020 |
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165 | PHY_Cap_10_Full = 0x0040 |
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166 | PHY_Cap_100_Half = 0x0080 |
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167 | PHY_Cap_100_Full = 0x0100 |
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168 | |||
169 | ; PHY_1000_CTRL_REG = 9 |
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170 | PHY_Cap_1000_Full = 0x0200 |
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171 | PHY_Cap_1000_Half = 0x0100 |
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172 | |||
173 | PHY_Cap_PAUSE = 0x0400 |
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174 | PHY_Cap_ASYM_PAUSE = 0x0800 |
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175 | |||
176 | PHY_Cap_Null = 0x0 |
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177 | |||
178 | ; _MediaType |
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179 | MT_10_Half = 0x01 |
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180 | MT_10_Full = 0x02 |
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181 | MT_100_Half = 0x04 |
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182 | MT_100_Full = 0x08 |
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183 | MT_1000_Full = 0x10 |
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184 | |||
185 | ; _TBICSRBit |
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5567 | hidnplayr | 186 | TBI_RESET = 0x80000000 |
187 | TBI_LOOPBACK = 0x40000000 |
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188 | TBI_NW_ENABLE = 0x20000000 |
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189 | TBI_NW_RESTART = 0x10000000 |
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190 | TBI_LINK_OK = 0x02000000 |
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191 | TBI_NW_COMPLETE = 0x01000000 |
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3545 | hidnplayr | 192 | |
193 | ; _DescStatusBit |
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194 | DSB_OWNbit = 0x80000000 |
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195 | DSB_EORbit = 0x40000000 |
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196 | DSB_FSbit = 0x20000000 |
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197 | DSB_LSbit = 0x10000000 |
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198 | |||
5522 | hidnplayr | 199 | RX_BUF_SIZE = 1514 ; Rx Buffer size |
3545 | hidnplayr | 200 | |
201 | ; max supported gigabit ethernet frame size -- must be at least (dev->mtu+14+4) |
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5522 | hidnplayr | 202 | MAX_ETH_FRAME_SIZE = 1514 |
3545 | hidnplayr | 203 | |
204 | TX_FIFO_THRESH = 256 ; In bytes |
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205 | |||
206 | RX_FIFO_THRESH = 7 ; 7 means NO threshold, Rx buffer level before first PCI xfer |
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207 | RX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
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208 | TX_DMA_BURST = 7 ; Maximum PCI burst, '6' is 1024 |
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209 | ETTh = 0x3F ; 0x3F means NO threshold |
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210 | |||
211 | EarlyTxThld = 0x3F ; 0x3F means NO early transmit |
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212 | RxPacketMaxSize = 0x0800 ; Maximum size supported is 16K-1 |
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213 | InterFrameGap = 0x03 ; 3 means InterFrameGap = the shortest one |
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214 | |||
215 | HZ = 1000 |
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216 | |||
217 | RTL_MIN_IO_SIZE = 0x80 |
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218 | TX_TIMEOUT = (6*HZ) |
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219 | |||
220 | TIMER_EXPIRE_TIME = 100 |
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221 | |||
222 | ETH_HDR_LEN = 14 |
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223 | DEFAULT_MTU = 1500 |
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5522 | hidnplayr | 224 | DEFAULT_RX_BUF_LEN = 1514 |
3545 | hidnplayr | 225 | |
226 | |||
227 | ;ifdef JUMBO_FRAME_SUPPORT |
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228 | ; MAX_JUMBO_FRAME_MTU = 10000 |
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229 | ; MAX_RX_SKBDATA_SIZE = (MAX_JUMBO_FRAME_MTU + ETH_HDR_LEN ) |
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230 | ;else |
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231 | MAX_RX_SKBDATA_SIZE = 1600 |
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232 | ;end if |
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233 | |||
234 | MCFG_METHOD_01 = 0x01 |
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235 | MCFG_METHOD_02 = 0x02 |
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236 | MCFG_METHOD_03 = 0x03 |
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237 | MCFG_METHOD_04 = 0x04 |
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238 | MCFG_METHOD_05 = 0x05 |
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239 | MCFG_METHOD_11 = 0x0b |
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240 | MCFG_METHOD_12 = 0x0c |
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241 | MCFG_METHOD_13 = 0x0d |
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242 | MCFG_METHOD_14 = 0x0e |
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243 | MCFG_METHOD_15 = 0x0f |
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244 | |||
245 | PCFG_METHOD_1 = 0x01 ; PHY Reg 0x03 bit0-3 == 0x0000 |
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246 | PCFG_METHOD_2 = 0x02 ; PHY Reg 0x03 bit0-3 == 0x0001 |
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247 | PCFG_METHOD_3 = 0x03 ; PHY Reg 0x03 bit0-3 == 0x0002 |
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248 | |||
5050 | hidnplayr | 249 | struct tx_desc |
250 | status dd ? |
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251 | vlan_tag dd ? |
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252 | buf_addr dq ? |
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253 | ends |
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254 | tx_desc.buf_soft_addr = NUM_TX_DESC*sizeof.tx_desc |
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3545 | hidnplayr | 255 | |
5050 | hidnplayr | 256 | struct rx_desc |
257 | status dd ? |
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258 | vlan_tag dd ? |
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259 | buf_addr dq ? |
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260 | ends |
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261 | rx_desc.buf_soft_addr = NUM_RX_DESC*sizeof.rx_desc |
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3545 | hidnplayr | 262 | |
5050 | hidnplayr | 263 | struct device ETH_DEVICE |
3545 | hidnplayr | 264 | |
5050 | hidnplayr | 265 | io_addr dd ? |
266 | pci_bus dd ? |
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267 | pci_dev dd ? |
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268 | irq_line db ? |
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269 | rb 3 ; align 4 |
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270 | pcfg dd ? |
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271 | mcfg dd ? |
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5498 | hidnplayr | 272 | |
5050 | hidnplayr | 273 | cur_rx dd ? ; Index into the Rx descriptor buffer of next Rx pkt |
274 | cur_tx dd ? ; Index into the Tx descriptor buffer of next Rx pkt |
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5498 | hidnplayr | 275 | last_tx dd ? |
5494 | hidnplayr | 276 | mac_version dd ? |
3545 | hidnplayr | 277 | |
5050 | hidnplayr | 278 | rb 0x100-($ and 0xff) ; align 256 |
279 | tx_ring rb NUM_TX_DESC * sizeof.tx_desc * 2 |
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3545 | hidnplayr | 280 | |
5050 | hidnplayr | 281 | rb 0x100-($ and 0xff) ; align 256 |
282 | rx_ring rb NUM_RX_DESC * sizeof.rx_desc * 2 |
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3545 | hidnplayr | 283 | |
5050 | hidnplayr | 284 | ends |
3545 | hidnplayr | 285 | |
286 | intr_mask = ISB_LinkChg or ISB_RxOverflow or ISB_RxFIFOOver or ISB_TxErr or ISB_TxOK or ISB_RxErr or ISB_RxOK |
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287 | rx_config = (RX_FIFO_THRESH shl RXC_FIFOShift) or (RX_DMA_BURST shl RXC_DMAShift) or 0x0000000E |
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288 | |||
289 | |||
290 | macro udelay msec { |
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291 | |||
4803 | hidnplayr | 292 | push esi ecx |
3545 | hidnplayr | 293 | mov esi, msec |
5050 | hidnplayr | 294 | invoke Sleep |
4803 | hidnplayr | 295 | pop ecx esi |
3545 | hidnplayr | 296 | |
297 | } |
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298 | |||
299 | macro WRITE_GMII_REG RegAddr, value { |
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300 | |||
5050 | hidnplayr | 301 | set_io [ebx + device.io_addr], REG_PHYAR |
3545 | hidnplayr | 302 | if value eq ax |
303 | and eax, 0x0000ffff |
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304 | or eax, 0x80000000 + (RegAddr shl 16) |
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305 | else |
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306 | mov eax, 0x80000000 + (RegAddr shl 16) + value |
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307 | end if |
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308 | out dx, eax |
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309 | |||
310 | call PHY_WAIT_WRITE |
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311 | } |
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312 | |||
313 | macro READ_GMII_REG RegAddr { |
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314 | |||
315 | local .error, .done |
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316 | |||
5050 | hidnplayr | 317 | set_io [ebx + device.io_addr], REG_PHYAR |
3545 | hidnplayr | 318 | mov eax, RegAddr shl 16 |
319 | out dx, eax |
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320 | |||
321 | call PHY_WAIT_READ |
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322 | jz .error |
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323 | |||
324 | in eax, dx |
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325 | and eax, 0xFFFF |
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326 | jmp .done |
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327 | |||
328 | .error: |
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329 | or eax, -1 |
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330 | .done: |
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331 | } |
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332 | |||
333 | align 4 |
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334 | PHY_WAIT_READ: ; io addr must already be set to REG_PHYAR |
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335 | |||
336 | udelay 1 ;;;1000 |
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337 | |||
338 | push ecx |
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339 | mov ecx, 2000 |
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340 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
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341 | @@: |
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342 | in eax, dx |
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343 | test eax, 0x80000000 |
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344 | jnz .exit |
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345 | udelay 1 ;;;100 |
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346 | loop @b |
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347 | .exit: |
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348 | pop ecx |
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349 | ret |
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350 | |||
351 | align 4 |
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352 | PHY_WAIT_WRITE: ; io addr must already be set to REG_PHYAR |
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353 | |||
354 | udelay 1 ;;;1000 |
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355 | |||
356 | push ecx |
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357 | mov ecx, 2000 |
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358 | ; Check if the RTL8169 has completed writing/reading to the specified MII register |
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359 | @@: |
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360 | in eax, dx |
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361 | test eax, 0x80000000 |
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362 | jz .exit |
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363 | udelay 1 ;;;100 |
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364 | loop @b |
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365 | .exit: |
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366 | pop ecx |
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367 | ret |
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368 | |||
369 | |||
370 | |||
371 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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372 | ;; ;; |
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373 | ;; proc START ;; |
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374 | ;; ;; |
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375 | ;; (standard driver proc) ;; |
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376 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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377 | |||
5050 | hidnplayr | 378 | proc START c, reason:dword, cmdline:dword |
3545 | hidnplayr | 379 | |
5050 | hidnplayr | 380 | cmp [reason], DRV_ENTRY |
381 | jne .fail |
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3545 | hidnplayr | 382 | |
5050 | hidnplayr | 383 | DEBUGF 2,"Loading driver\n" |
384 | invoke RegService, my_service, service_proc |
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3545 | hidnplayr | 385 | ret |
386 | |||
387 | .fail: |
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5050 | hidnplayr | 388 | xor eax, eax |
3545 | hidnplayr | 389 | ret |
390 | |||
391 | endp |
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392 | |||
393 | |||
394 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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395 | ;; ;; |
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396 | ;; proc SERVICE_PROC ;; |
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397 | ;; ;; |
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398 | ;; (standard driver proc) ;; |
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399 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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400 | |||
401 | proc service_proc stdcall, ioctl:dword |
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402 | |||
403 | mov edx, [ioctl] |
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4470 | hidnplayr | 404 | mov eax, [edx + IOCTL.io_code] |
3545 | hidnplayr | 405 | |
406 | ;------------------------------------------------------ |
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407 | |||
408 | cmp eax, 0 ;SRV_GETVERSION |
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409 | jne @F |
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410 | |||
4470 | hidnplayr | 411 | cmp [edx + IOCTL.out_size], 4 |
3545 | hidnplayr | 412 | jb .fail |
4470 | hidnplayr | 413 | mov eax, [edx + IOCTL.output] |
3545 | hidnplayr | 414 | mov [eax], dword API_VERSION |
415 | |||
416 | xor eax, eax |
||
417 | ret |
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418 | |||
419 | ;------------------------------------------------------ |
||
420 | @@: |
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421 | cmp eax, 1 ;SRV_HOOK |
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422 | jne .fail |
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423 | |||
4470 | hidnplayr | 424 | cmp [edx + IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
3545 | hidnplayr | 425 | jb .fail |
426 | |||
4470 | hidnplayr | 427 | mov eax, [edx + IOCTL.input] |
3545 | hidnplayr | 428 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
429 | jne .fail ; other types arent supported for this card yet |
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430 | |||
431 | ; check if the device is already listed |
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432 | |||
433 | mov esi, device_list |
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434 | mov ecx, [devices] |
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435 | test ecx, ecx |
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436 | jz .firstdevice |
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437 | |||
4470 | hidnplayr | 438 | ; mov eax, [edx + IOCTL.input] ; get the pci bus and device numbers |
439 | mov ax, [eax+1] ; |
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3545 | hidnplayr | 440 | .nextdevice: |
441 | mov ebx, [esi] |
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5050 | hidnplayr | 442 | cmp al, byte[ebx + device.pci_bus] |
3545 | hidnplayr | 443 | jne @f |
5050 | hidnplayr | 444 | cmp ah, byte[ebx + device.pci_dev] |
3545 | hidnplayr | 445 | je .find_devicenum ; Device is already loaded, let's find it's device number |
446 | @@: |
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447 | add esi, 4 |
||
448 | loop .nextdevice |
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449 | |||
450 | |||
451 | ; This device doesnt have its own eth_device structure yet, lets create one |
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452 | .firstdevice: |
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453 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
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454 | jae .fail |
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455 | |||
5050 | hidnplayr | 456 | allocate_and_clear ebx, sizeof.device, .fail ; Allocate memory to put the device structure in |
3545 | hidnplayr | 457 | |
458 | ; Fill in the direct call addresses into the struct |
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459 | |||
5050 | hidnplayr | 460 | mov [ebx + device.reset], reset |
461 | mov [ebx + device.transmit], transmit |
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462 | mov [ebx + device.unload], unload |
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463 | mov [ebx + device.name], my_service |
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3545 | hidnplayr | 464 | |
465 | ; save the pci bus and device numbers |
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466 | |||
4470 | hidnplayr | 467 | mov eax, [edx + IOCTL.input] |
3545 | hidnplayr | 468 | movzx ecx, byte[eax+1] |
5050 | hidnplayr | 469 | mov [ebx + device.pci_bus], ecx |
3545 | hidnplayr | 470 | movzx ecx, byte[eax+2] |
5050 | hidnplayr | 471 | mov [ebx + device.pci_dev], ecx |
3545 | hidnplayr | 472 | |
473 | ; Now, it's time to find the base io addres of the PCI device |
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474 | |||
5050 | hidnplayr | 475 | stdcall PCI_find_io, [ebx + device.pci_bus], [ebx + device.pci_dev] |
476 | mov [ebx + device.io_addr], eax |
||
3545 | hidnplayr | 477 | |
478 | ; We've found the io address, find IRQ now |
||
479 | |||
5050 | hidnplayr | 480 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.interrupt_line |
481 | mov [ebx + device.irq_line], al |
||
3545 | hidnplayr | 482 | |
483 | DEBUGF 2,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
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5050 | hidnplayr | 484 | [ebx + device.pci_dev]:1,[ebx + device.pci_bus]:1,[ebx + device.irq_line]:1,[ebx + device.io_addr]:8 |
3545 | hidnplayr | 485 | |
486 | ; Ok, the eth_device structure is ready, let's probe the device |
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487 | ; Because initialization fires IRQ, IRQ handler must be aware of this device |
||
488 | mov eax, [devices] ; Add the device structure to our device list |
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489 | mov [device_list + 4*eax], ebx ; (IRQ handler uses this list to find device) |
||
490 | inc [devices] ; |
||
491 | |||
492 | call probe ; this function will output in eax |
||
493 | test eax, eax |
||
494 | jnz .err2 ; If an error occured, exit |
||
495 | |||
5050 | hidnplayr | 496 | mov [ebx + device.type], NET_TYPE_ETH |
497 | invoke NetRegDev |
||
3545 | hidnplayr | 498 | |
499 | cmp eax, -1 |
||
500 | je .destroy |
||
501 | |||
502 | ret |
||
503 | |||
504 | ; If the device was already loaded, find the device number and return it in eax |
||
505 | |||
506 | .find_devicenum: |
||
507 | DEBUGF 2,"Trying to find device number of already registered device\n" |
||
5050 | hidnplayr | 508 | invoke NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
3545 | hidnplayr | 509 | ; into a device number in edi |
510 | mov eax, edi ; Application wants it in eax instead |
||
511 | DEBUGF 2,"Kernel says: %u\n", eax |
||
512 | ret |
||
513 | |||
514 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
||
515 | |||
516 | .destroy: |
||
517 | ; todo: reset device into virgin state |
||
518 | |||
519 | .err2: |
||
520 | dec [devices] |
||
521 | .err: |
||
522 | DEBUGF 2,"removing device structure\n" |
||
5050 | hidnplayr | 523 | invoke KernelFree, ebx |
3545 | hidnplayr | 524 | .fail: |
525 | or eax, -1 |
||
526 | ret |
||
527 | |||
528 | ;------------------------------------------------------ |
||
529 | endp |
||
530 | |||
531 | |||
532 | align 4 |
||
533 | unload: |
||
534 | |||
535 | ret |
||
536 | |||
537 | |||
538 | align 4 |
||
539 | init_board: |
||
540 | |||
541 | DEBUGF 1,"init_board\n" |
||
542 | |||
5050 | hidnplayr | 543 | ; Make the device a bus master |
544 | invoke PciRead32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command |
||
7299 | hidnplayr | 545 | or al, PCI_CMD_MASTER or PCI_CMD_PIO |
5050 | hidnplayr | 546 | invoke PciWrite32, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.command, eax |
3545 | hidnplayr | 547 | |
548 | ; Soft reset the chip |
||
5050 | hidnplayr | 549 | set_io [ebx + device.io_addr], 0 |
550 | set_io [ebx + device.io_addr], REG_ChipCmd |
||
3545 | hidnplayr | 551 | mov al, CMD_Reset |
552 | out dx, al |
||
553 | |||
554 | ; Check that the chip has finished the reset |
||
555 | mov ecx, 1000 |
||
5050 | hidnplayr | 556 | set_io [ebx + device.io_addr], REG_ChipCmd |
5494 | hidnplayr | 557 | @@: |
558 | in al, dx |
||
3545 | hidnplayr | 559 | test al, CMD_Reset |
560 | jz @f |
||
561 | udelay 10 |
||
562 | loop @b |
||
7299 | hidnplayr | 563 | DEBUGF 2,"chip reset timeout\n" |
564 | or eax, -1 |
||
565 | ret |
||
5494 | hidnplayr | 566 | @@: |
3545 | hidnplayr | 567 | |
568 | |||
5050 | hidnplayr | 569 | set_io [ebx + device.io_addr], REG_TxConfig |
3545 | hidnplayr | 570 | in eax, dx |
5494 | hidnplayr | 571 | mov esi, MAC_VERSION_LIST |
572 | @@: |
||
573 | mov ecx, eax |
||
574 | and ecx, dword[esi] |
||
575 | cmp ecx, dword[esi+4] |
||
576 | je @f |
||
577 | add esi, 4*4 |
||
578 | jmp @r |
||
579 | @@: |
||
3545 | hidnplayr | 580 | |
6119 | hidnplayr | 581 | mov ecx, [esi+8] |
582 | mov [ebx + device.mac_version], ecx |
||
583 | mov ecx, [esi+12] |
||
584 | mov [ebx + device.name], ecx |
||
585 | DEBUGF 2, "Detected chip: %s\n", ecx |
||
586 | cmp dword[esi], 0 |
||
587 | jne @f |
||
7299 | hidnplayr | 588 | DEBUGF 1, "TxConfig = 0x%x\n", eax |
6119 | hidnplayr | 589 | @@: |
3545 | hidnplayr | 590 | |
591 | xor eax, eax |
||
592 | ret |
||
593 | |||
594 | |||
595 | |||
596 | ;*************************************************************************** |
||
597 | ; Function |
||
598 | ; probe |
||
599 | ; Description |
||
600 | ; Searches for an ethernet card, enables it and clears the rx buffer |
||
601 | ; If a card was found, it enables the ethernet -> TCPIP link |
||
602 | ; Destroyed registers |
||
603 | ; eax, ebx, ecx, edx |
||
604 | ; |
||
605 | ;*************************************************************************** |
||
606 | align 4 |
||
607 | probe: |
||
608 | |||
609 | DEBUGF 1,"probe\n" |
||
610 | |||
611 | call init_board |
||
612 | call read_mac |
||
613 | call PHY_config |
||
614 | |||
4334 | hidnplayr | 615 | DEBUGF 1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
5050 | hidnplayr | 616 | set_io [ebx + device.io_addr], 0 |
617 | set_io [ebx + device.io_addr], 0x82 |
||
3545 | hidnplayr | 618 | mov al, 0x01 |
619 | out dx, al |
||
5050 | hidnplayr | 620 | cmp [ebx + device.mcfg], MCFG_METHOD_03 |
3545 | hidnplayr | 621 | jae @f |
4334 | hidnplayr | 622 | DEBUGF 1,"Set PCI Latency=0x40\n" |
5050 | hidnplayr | 623 | ; Adjust PCI latency to be at least 64 |
624 | invoke PciRead8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency |
||
625 | cmp al, 64 |
||
626 | jae @f |
||
627 | mov al, 64 |
||
628 | invoke PciWrite8, [ebx + device.pci_bus], [ebx + device.pci_dev], PCI_header00.max_latency, eax |
||
629 | @@: |
||
630 | cmp [ebx + device.mcfg], MCFG_METHOD_02 |
||
3545 | hidnplayr | 631 | jne @f |
4334 | hidnplayr | 632 | DEBUGF 1,"Set MAC Reg C+CR Offset 0x82h = 0x01h\n" |
5050 | hidnplayr | 633 | set_io [ebx + device.io_addr], 0 |
634 | set_io [ebx + device.io_addr], 0x82 |
||
3545 | hidnplayr | 635 | mov al, 0x01 |
636 | out dx, al |
||
4334 | hidnplayr | 637 | DEBUGF 1,"Set PHY Reg 0x0bh = 0x00h\n" |
3545 | hidnplayr | 638 | WRITE_GMII_REG 0x0b, 0x0000 ; w 0x0b 15 0 0 |
639 | @@: |
||
640 | ; if TBI is not enabled |
||
5050 | hidnplayr | 641 | set_io [ebx + device.io_addr], 0 |
642 | set_io [ebx + device.io_addr], REG_PHYstatus |
||
3545 | hidnplayr | 643 | in al, dx |
644 | test al, PHYS_TBI_Enable |
||
645 | jz .tbi_dis |
||
646 | READ_GMII_REG PHY_AUTO_NEGO_REG |
||
647 | |||
648 | ; enable 10/100 Full/Half Mode, leave PHY_AUTO_NEGO_REG bit4:0 unchanged |
||
649 | and eax, 0x0C1F |
||
650 | or eax, PHY_Cap_10_Half or PHY_Cap_10_Full or PHY_Cap_100_Half or PHY_Cap_100_Full |
||
651 | WRITE_GMII_REG PHY_AUTO_NEGO_REG, ax |
||
652 | |||
653 | ; enable 1000 Full Mode |
||
654 | WRITE_GMII_REG PHY_1000_CTRL_REG, PHY_Cap_1000_Full or PHY_Cap_1000_Half ; rtl8168 |
||
655 | |||
656 | ; Enable auto-negotiation and restart auto-nigotiation |
||
657 | WRITE_GMII_REG PHY_CTRL_REG, PHY_Enable_Auto_Nego or PHY_Restart_Auto_Nego |
||
658 | |||
4803 | hidnplayr | 659 | udelay 1 ; 100 |
660 | mov ecx, 200 ; 10000 |
||
661 | DEBUGF 1, "Waiting for auto-negotiation to complete\n" |
||
3545 | hidnplayr | 662 | ; wait for auto-negotiation process |
663 | @@: dec ecx |
||
664 | jz @f |
||
5050 | hidnplayr | 665 | set_io [ebx + device.io_addr], 0 |
3545 | hidnplayr | 666 | READ_GMII_REG PHY_STAT_REG |
4803 | hidnplayr | 667 | udelay 1 ; 100 |
3545 | hidnplayr | 668 | test eax, PHY_Auto_Neco_Comp |
669 | jz @b |
||
5050 | hidnplayr | 670 | set_io [ebx + device.io_addr], REG_PHYstatus |
3545 | hidnplayr | 671 | in al, dx |
672 | jmp @f |
||
673 | .tbi_dis: |
||
4803 | hidnplayr | 674 | udelay 1 ; 100 |
3545 | hidnplayr | 675 | @@: |
4803 | hidnplayr | 676 | DEBUGF 1, "auto-negotiation complete\n" |
3545 | hidnplayr | 677 | |
678 | ;*************************************************************************** |
||
679 | ; Function |
||
680 | ; rt8169_reset |
||
681 | ; Description |
||
682 | ; Place the chip (ie, the ethernet card) into a virgin state |
||
683 | ; Destroyed registers |
||
684 | ; eax, ebx, ecx, edx |
||
685 | ; |
||
686 | ;*************************************************************************** |
||
687 | align 4 |
||
688 | reset: |
||
689 | |||
4803 | hidnplayr | 690 | DEBUGF 1,"resetting\n" |
3545 | hidnplayr | 691 | |
692 | call init_ring |
||
5522 | hidnplayr | 693 | test eax, eax |
694 | jnz .err |
||
695 | |||
3545 | hidnplayr | 696 | call hw_start |
697 | |||
698 | ; clear packet/byte counters |
||
699 | |||
700 | xor eax, eax |
||
5050 | hidnplayr | 701 | lea edi, [ebx + device.bytes_tx] |
3545 | hidnplayr | 702 | mov ecx, 6 |
703 | rep stosd |
||
704 | |||
5050 | hidnplayr | 705 | mov [ebx + device.mtu], 1500 |
5498 | hidnplayr | 706 | call detect_link |
3545 | hidnplayr | 707 | |
4803 | hidnplayr | 708 | DEBUGF 2,"init OK!\n" |
3545 | hidnplayr | 709 | xor eax, eax |
710 | ret |
||
711 | |||
5522 | hidnplayr | 712 | .err: |
7299 | hidnplayr | 713 | DEBUGF 2,"reset failed!\n" |
5522 | hidnplayr | 714 | or eax, -1 |
715 | ret |
||
3545 | hidnplayr | 716 | |
717 | |||
718 | |||
719 | align 4 |
||
720 | PHY_config: |
||
721 | |||
5050 | hidnplayr | 722 | DEBUGF 1,"hw_PHY_config: priv.mcfg=%d, priv.pcfg=%d\n", [ebx + device.mcfg], [ebx + device.pcfg] |
3545 | hidnplayr | 723 | |
5050 | hidnplayr | 724 | cmp [ebx + device.mcfg], MCFG_METHOD_04 |
3545 | hidnplayr | 725 | jne .not_4 |
5050 | hidnplayr | 726 | set_io [ebx + device.io_addr], 0 |
3545 | hidnplayr | 727 | ; WRITE_GMII_REG 0x1F, 0x0001 |
728 | ; WRITE_GMII_REG 0x1b, 0x841e |
||
729 | ; WRITE_GMII_REG 0x0e, 0x7bfb |
||
730 | ; WRITE_GMII_REG 0x09, 0x273a |
||
731 | WRITE_GMII_REG 0x1F, 0x0002 |
||
732 | WRITE_GMII_REG 0x01, 0x90D0 |
||
733 | WRITE_GMII_REG 0x1F, 0x0000 |
||
734 | jmp .exit |
||
735 | .not_4: |
||
5050 | hidnplayr | 736 | cmp [ebx + device.mcfg], MCFG_METHOD_02 |
3545 | hidnplayr | 737 | je @f |
5050 | hidnplayr | 738 | cmp [ebx + device.mcfg], MCFG_METHOD_03 |
3545 | hidnplayr | 739 | jne .not_2_or_3 |
740 | @@: |
||
5050 | hidnplayr | 741 | set_io [ebx + device.io_addr], 0 |
3545 | hidnplayr | 742 | WRITE_GMII_REG 0x1F, 0x0001 |
743 | WRITE_GMII_REG 0x15, 0x1000 |
||
744 | WRITE_GMII_REG 0x18, 0x65C7 |
||
745 | WRITE_GMII_REG 0x04, 0x0000 |
||
746 | WRITE_GMII_REG 0x03, 0x00A1 |
||
747 | WRITE_GMII_REG 0x02, 0x0008 |
||
748 | WRITE_GMII_REG 0x01, 0x1020 |
||
749 | WRITE_GMII_REG 0x00, 0x1000 |
||
750 | WRITE_GMII_REG 0x04, 0x0800 |
||
751 | WRITE_GMII_REG 0x04, 0x0000 |
||
752 | WRITE_GMII_REG 0x04, 0x7000 |
||
753 | WRITE_GMII_REG 0x03, 0xFF41 |
||
754 | WRITE_GMII_REG 0x02, 0xDE60 |
||
755 | WRITE_GMII_REG 0x01, 0x0140 |
||
756 | WRITE_GMII_REG 0x00, 0x0077 |
||
757 | WRITE_GMII_REG 0x04, 0x7800 |
||
758 | WRITE_GMII_REG 0x04, 0x7000 |
||
759 | WRITE_GMII_REG 0x04, 0xA000 |
||
760 | WRITE_GMII_REG 0x03, 0xDF01 |
||
761 | WRITE_GMII_REG 0x02, 0xDF20 |
||
762 | WRITE_GMII_REG 0x01, 0xFF95 |
||
763 | WRITE_GMII_REG 0x00, 0xFA00 |
||
764 | WRITE_GMII_REG 0x04, 0xA800 |
||
765 | WRITE_GMII_REG 0x04, 0xA000 |
||
766 | WRITE_GMII_REG 0x04, 0xB000 |
||
767 | WRITE_GMII_REG 0x03, 0xFF41 |
||
768 | WRITE_GMII_REG 0x02, 0xDE20 |
||
769 | WRITE_GMII_REG 0x01, 0x0140 |
||
770 | WRITE_GMII_REG 0x00, 0x00BB |
||
771 | WRITE_GMII_REG 0x04, 0xB800 |
||
772 | WRITE_GMII_REG 0x04, 0xB000 |
||
773 | WRITE_GMII_REG 0x04, 0xF000 |
||
774 | WRITE_GMII_REG 0x03, 0xDF01 |
||
775 | WRITE_GMII_REG 0x02, 0xDF20 |
||
776 | WRITE_GMII_REG 0x01, 0xFF95 |
||
777 | WRITE_GMII_REG 0x00, 0xBF00 |
||
778 | WRITE_GMII_REG 0x04, 0xF800 |
||
779 | WRITE_GMII_REG 0x04, 0xF000 |
||
780 | WRITE_GMII_REG 0x04, 0x0000 |
||
781 | WRITE_GMII_REG 0x1F, 0x0000 |
||
782 | WRITE_GMII_REG 0x0B, 0x0000 |
||
783 | jmp .exit |
||
784 | .not_2_or_3: |
||
5050 | hidnplayr | 785 | DEBUGF 1,"mcfg=%d, discard hw PHY config\n", [ebx + device.mcfg] |
3545 | hidnplayr | 786 | .exit: |
787 | ret |
||
788 | |||
789 | |||
790 | |||
791 | align 4 |
||
792 | set_rx_mode: |
||
793 | |||
794 | DEBUGF 1,"set_rx_mode\n" |
||
795 | |||
796 | ; IFF_ALLMULTI |
||
797 | ; Too many to filter perfectly -- accept all multicasts |
||
5050 | hidnplayr | 798 | set_io [ebx + device.io_addr], 0 |
799 | set_io [ebx + device.io_addr], REG_RxConfig |
||
3545 | hidnplayr | 800 | in eax, dx |
5494 | hidnplayr | 801 | and eax, 0xff7e1880 |
3545 | hidnplayr | 802 | or eax, rx_config or (RXM_AcceptBroadcast or RXM_AcceptMulticast or RXM_AcceptMyPhys) |
803 | out dx, eax |
||
804 | |||
805 | ; Multicast hash filter |
||
5050 | hidnplayr | 806 | set_io [ebx + device.io_addr], REG_MAR0 + 0 |
3545 | hidnplayr | 807 | or eax, -1 |
808 | out dx, eax |
||
5050 | hidnplayr | 809 | set_io [ebx + device.io_addr], REG_MAR0 + 4 |
3545 | hidnplayr | 810 | out dx, eax |
811 | |||
812 | ret |
||
813 | |||
814 | |||
815 | align 4 |
||
816 | init_ring: |
||
817 | |||
818 | DEBUGF 1,"init_ring\n" |
||
819 | |||
820 | xor eax, eax |
||
5050 | hidnplayr | 821 | mov [ebx + device.cur_rx], eax |
822 | mov [ebx + device.cur_tx], eax |
||
5498 | hidnplayr | 823 | mov [ebx + device.last_tx], eax |
3545 | hidnplayr | 824 | |
5050 | hidnplayr | 825 | lea edi, [ebx + device.tx_ring] |
5498 | hidnplayr | 826 | mov ecx, (NUM_TX_DESC * sizeof.tx_desc) / 4 * 2 |
3545 | hidnplayr | 827 | rep stosd |
828 | |||
5050 | hidnplayr | 829 | lea edi, [ebx + device.rx_ring] |
830 | mov ecx, (NUM_RX_DESC * sizeof.rx_desc) / 4 |
||
3545 | hidnplayr | 831 | rep stosd |
832 | |||
5498 | hidnplayr | 833 | lea edi, [ebx + device.rx_ring] |
3545 | hidnplayr | 834 | mov ecx, NUM_RX_DESC |
835 | .loop: |
||
836 | push ecx |
||
5522 | hidnplayr | 837 | invoke NetAlloc, RX_BUF_SIZE+NET_BUFF.data |
838 | test eax, eax |
||
839 | jz .err |
||
5050 | hidnplayr | 840 | mov dword [edi + rx_desc.buf_soft_addr], eax |
5498 | hidnplayr | 841 | invoke GetPhysAddr |
5522 | hidnplayr | 842 | add eax, NET_BUFF.data |
3545 | hidnplayr | 843 | mov dword [edi + rx_desc.buf_addr], eax |
844 | mov [edi + rx_desc.status], DSB_OWNbit or RX_BUF_SIZE |
||
5050 | hidnplayr | 845 | add edi, sizeof.rx_desc |
3545 | hidnplayr | 846 | pop ecx |
5050 | hidnplayr | 847 | dec ecx |
848 | jnz .loop |
||
849 | or [edi - sizeof.rx_desc + rx_desc.status], DSB_EORbit |
||
3545 | hidnplayr | 850 | |
5522 | hidnplayr | 851 | xor eax, eax |
3545 | hidnplayr | 852 | ret |
853 | |||
5522 | hidnplayr | 854 | .err: |
855 | pop eax |
||
856 | or eax, -1 |
||
857 | ret |
||
3545 | hidnplayr | 858 | |
859 | align 4 |
||
860 | hw_start: |
||
861 | |||
862 | DEBUGF 1,"hw_start\n" |
||
863 | |||
864 | ; attach int handler |
||
5050 | hidnplayr | 865 | movzx eax, [ebx + device.irq_line] |
3545 | hidnplayr | 866 | DEBUGF 1,"Attaching int handler to irq %x\n", eax:1 |
5050 | hidnplayr | 867 | invoke AttachIntHandler, eax, int_handler, ebx |
868 | test eax, eax |
||
869 | jnz @f |
||
870 | DEBUGF 2,"Could not attach int handler!\n" |
||
871 | or eax, -1 |
||
872 | ret |
||
873 | @@: |
||
3545 | hidnplayr | 874 | |
875 | ; Soft reset the chip |
||
5050 | hidnplayr | 876 | set_io [ebx + device.io_addr], 0 |
877 | set_io [ebx + device.io_addr], REG_ChipCmd |
||
3545 | hidnplayr | 878 | mov al, CMD_Reset |
879 | out dx, al |
||
880 | |||
881 | DEBUGF 1,"Waiting for chip to reset... " |
||
882 | ; Check that the chip has finished the reset |
||
883 | mov ecx, 1000 |
||
5050 | hidnplayr | 884 | set_io [ebx + device.io_addr], REG_ChipCmd |
3545 | hidnplayr | 885 | @@: in al, dx |
886 | test al, CMD_Reset |
||
887 | jz @f |
||
888 | udelay 10 |
||
889 | loop @b |
||
890 | @@: |
||
891 | DEBUGF 1,"done!\n" |
||
892 | |||
5050 | hidnplayr | 893 | set_io [ebx + device.io_addr], REG_Cfg9346 |
3545 | hidnplayr | 894 | mov al, CFG_9346_Unlock |
895 | out dx, al |
||
896 | |||
5050 | hidnplayr | 897 | set_io [ebx + device.io_addr], REG_ChipCmd |
3545 | hidnplayr | 898 | mov al, CMD_TxEnb or CMD_RxEnb |
899 | out dx, al |
||
900 | |||
5050 | hidnplayr | 901 | set_io [ebx + device.io_addr], REG_ETThReg |
3545 | hidnplayr | 902 | mov al, ETTh |
903 | out dx, al |
||
904 | |||
905 | ; For gigabit rtl8169 |
||
5050 | hidnplayr | 906 | set_io [ebx + device.io_addr], REG_RxMaxSize |
3545 | hidnplayr | 907 | mov ax, RxPacketMaxSize |
908 | out dx, ax |
||
909 | |||
910 | ; Set Rx Config register |
||
5050 | hidnplayr | 911 | set_io [ebx + device.io_addr], REG_RxConfig |
3545 | hidnplayr | 912 | in ax, dx |
5494 | hidnplayr | 913 | and eax, 0xff7e1880 |
3545 | hidnplayr | 914 | or eax, rx_config |
915 | out dx, eax |
||
916 | |||
917 | ; Set DMA burst size and Interframe Gap Time |
||
5050 | hidnplayr | 918 | set_io [ebx + device.io_addr], REG_TxConfig |
3545 | hidnplayr | 919 | mov eax, (TX_DMA_BURST shl TXC_DMAShift) or (InterFrameGap shl TXC_InterFrameGapShift) |
920 | out dx, eax |
||
921 | |||
5050 | hidnplayr | 922 | set_io [ebx + device.io_addr], REG_CPlusCmd |
3545 | hidnplayr | 923 | in ax, dx |
924 | out dx, ax |
||
925 | |||
926 | in ax, dx |
||
927 | or ax, 1 shl 3 |
||
5050 | hidnplayr | 928 | cmp [ebx + device.mcfg], MCFG_METHOD_02 |
3545 | hidnplayr | 929 | jne @f |
5050 | hidnplayr | 930 | cmp [ebx + device.mcfg], MCFG_METHOD_03 |
3545 | hidnplayr | 931 | jne @f |
932 | or ax,1 shl 14 |
||
933 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3 and bit-14\n" |
||
934 | jmp .set |
||
935 | @@: |
||
936 | DEBUGF 1,"Set MAC Reg C+CR Offset 0xE0: bit-3\n" |
||
937 | .set: |
||
5050 | hidnplayr | 938 | set_io [ebx + device.io_addr], REG_CPlusCmd |
3545 | hidnplayr | 939 | out dx, ax |
940 | |||
5050 | hidnplayr | 941 | set_io [ebx + device.io_addr], 0xE2 |
3545 | hidnplayr | 942 | ; mov ax, 0x1517 |
943 | ; out dx, ax |
||
944 | ; mov ax, 0x152a |
||
945 | ; out dx, ax |
||
946 | ; mov ax, 0x282a |
||
947 | ; out dx, ax |
||
948 | xor ax, ax |
||
949 | out dx, ax |
||
950 | |||
951 | xor eax, eax |
||
5050 | hidnplayr | 952 | mov [ebx + device.cur_rx], eax |
953 | lea eax, [ebx + device.tx_ring] |
||
954 | invoke GetPhysAddr |
||
955 | set_io [ebx + device.io_addr], REG_TxDescStartAddr |
||
3545 | hidnplayr | 956 | out dx, eax |
5050 | hidnplayr | 957 | set_io [ebx + device.io_addr], REG_TxDescStartAddr + 4 |
4301 | clevermous | 958 | xor eax, eax |
959 | out dx, eax |
||
3545 | hidnplayr | 960 | |
5050 | hidnplayr | 961 | lea eax, [ebx + device.rx_ring] |
962 | invoke GetPhysAddr |
||
963 | set_io [ebx + device.io_addr], REG_RxDescStartAddr |
||
3545 | hidnplayr | 964 | out dx, eax |
4301 | clevermous | 965 | xor eax, eax |
5050 | hidnplayr | 966 | set_io [ebx + device.io_addr], REG_RxDescStartAddr + 4 |
4301 | clevermous | 967 | out dx, eax |
3545 | hidnplayr | 968 | |
5050 | hidnplayr | 969 | set_io [ebx + device.io_addr], REG_Cfg9346 |
3545 | hidnplayr | 970 | mov al, CFG_9346_Lock |
971 | out dx, al |
||
972 | |||
973 | udelay 10 |
||
974 | |||
975 | xor eax, eax |
||
5050 | hidnplayr | 976 | set_io [ebx + device.io_addr], REG_RxMissed |
3545 | hidnplayr | 977 | out dx, eax |
978 | |||
979 | call set_rx_mode |
||
980 | |||
5050 | hidnplayr | 981 | set_io [ebx + device.io_addr], 0 |
3545 | hidnplayr | 982 | ; no early-rx interrupts |
5050 | hidnplayr | 983 | set_io [ebx + device.io_addr], REG_MultiIntr |
3545 | hidnplayr | 984 | in ax, dx |
985 | and ax, 0xF000 |
||
986 | out dx, ax |
||
987 | |||
988 | ; set interrupt mask |
||
5050 | hidnplayr | 989 | set_io [ebx + device.io_addr], REG_IntrMask |
3545 | hidnplayr | 990 | mov ax, intr_mask |
991 | out dx, ax |
||
992 | |||
993 | xor eax, eax |
||
994 | ret |
||
995 | |||
996 | |||
997 | align 4 |
||
998 | read_mac: |
||
999 | |||
5050 | hidnplayr | 1000 | set_io [ebx + device.io_addr], 0 |
1001 | set_io [ebx + device.io_addr], REG_MAC0 |
||
3545 | hidnplayr | 1002 | xor ecx, ecx |
5050 | hidnplayr | 1003 | lea edi, [ebx + device.mac] |
3545 | hidnplayr | 1004 | mov ecx, 6 |
1005 | |||
1006 | ; Get MAC address. FIXME: read EEPROM |
||
5498 | hidnplayr | 1007 | @@: |
1008 | in al, dx |
||
3545 | hidnplayr | 1009 | stosb |
1010 | inc edx |
||
1011 | loop @r |
||
1012 | |||
1013 | DEBUGF 1,"MAC = %x-%x-%x-%x-%x-%x\n",\ |
||
5050 | hidnplayr | 1014 | [ebx + device.mac+0]:2,[ebx + device.mac+1]:2,[ebx + device.mac+2]:2,[ebx + device.mac+3]:2,[ebx + device.mac+4]:2,[ebx + device.mac+5]:2 |
3545 | hidnplayr | 1015 | |
1016 | ret |
||
1017 | |||
1018 | align 4 |
||
1019 | write_mac: |
||
1020 | |||
1021 | ret 6 |
||
1022 | |||
1023 | |||
1024 | ;*************************************************************************** |
||
1025 | ; Function |
||
1026 | ; transmit |
||
1027 | ; Description |
||
1028 | ; Transmits a packet of data via the ethernet card |
||
1029 | ; |
||
9148 | hidnplayr | 1030 | ; In: pointer to device structure in ebx |
1031 | ; Out: eax = 0 on success |
||
3545 | hidnplayr | 1032 | ; |
1033 | ;*************************************************************************** |
||
9148 | hidnplayr | 1034 | align 16 |
5522 | hidnplayr | 1035 | proc transmit stdcall bufferptr |
5050 | hidnplayr | 1036 | |
9148 | hidnplayr | 1037 | spin_lock_irqsave |
5050 | hidnplayr | 1038 | |
5522 | hidnplayr | 1039 | mov esi, [bufferptr] |
1040 | DEBUGF 1,"Transmitting packet, buffer:%x, size:%u\n", [bufferptr], [esi + NET_BUFF.length] |
||
1041 | lea eax, [esi + NET_BUFF.data] |
||
3545 | hidnplayr | 1042 | DEBUGF 1,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
1043 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
||
1044 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
||
1045 | [eax+13]:2,[eax+12]:2 |
||
1046 | |||
5522 | hidnplayr | 1047 | cmp [esi + NET_BUFF.length], 1514 |
8997 | hidnplayr | 1048 | ja .error |
5522 | hidnplayr | 1049 | cmp [esi + NET_BUFF.length], 60 |
8997 | hidnplayr | 1050 | jb .error |
3545 | hidnplayr | 1051 | |
1052 | ;---------------------------------- |
||
1053 | ; Find currentTX descriptor address |
||
1054 | |||
5050 | hidnplayr | 1055 | mov eax, sizeof.tx_desc |
1056 | mul [ebx + device.cur_tx] |
||
1057 | lea esi, [ebx + device.tx_ring + eax] |
||
3545 | hidnplayr | 1058 | |
1059 | DEBUGF 1,"Using TX desc: %x\n", esi |
||
1060 | |||
5498 | hidnplayr | 1061 | ;---------------------------------- |
1062 | ; Check if the descriptor is in use |
||
1063 | |||
1064 | test [esi + tx_desc.status], DSB_OWNbit |
||
8997 | hidnplayr | 1065 | jnz .overrun |
5498 | hidnplayr | 1066 | |
3545 | hidnplayr | 1067 | ;--------------------------- |
1068 | ; Program the packet pointer |
||
1069 | |||
5050 | hidnplayr | 1070 | mov eax, [bufferptr] |
5522 | hidnplayr | 1071 | mov ecx, [eax + NET_BUFF.length] |
3545 | hidnplayr | 1072 | mov [esi + tx_desc.buf_soft_addr], eax |
5522 | hidnplayr | 1073 | add eax, [eax + NET_BUFF.offset] |
5050 | hidnplayr | 1074 | invoke GetPhysAddr |
3545 | hidnplayr | 1075 | mov dword [esi + tx_desc.buf_addr], eax |
1076 | |||
1077 | ;------------------------ |
||
1078 | ; Program the packet size |
||
1079 | |||
5522 | hidnplayr | 1080 | mov eax, ecx |
5498 | hidnplayr | 1081 | or eax, DSB_OWNbit or DSB_FSbit or DSB_LSbit |
5050 | hidnplayr | 1082 | cmp [ebx + device.cur_tx], NUM_TX_DESC - 1 |
3545 | hidnplayr | 1083 | jne @f |
1084 | or eax, DSB_EORbit |
||
5498 | hidnplayr | 1085 | @@: |
1086 | mov [esi + tx_desc.status], eax |
||
3545 | hidnplayr | 1087 | |
1088 | ;----------------------------------------- |
||
1089 | ; Set the polling bit (start transmission) |
||
1090 | |||
5050 | hidnplayr | 1091 | set_io [ebx + device.io_addr], 0 |
1092 | set_io [ebx + device.io_addr], REG_TxPoll |
||
3545 | hidnplayr | 1093 | mov al, 0x40 ; set polling bit |
1094 | out dx, al |
||
1095 | |||
1096 | ;----------------------- |
||
1097 | ; Update TX descriptor |
||
1098 | |||
5050 | hidnplayr | 1099 | inc [ebx + device.cur_tx] |
1100 | and [ebx + device.cur_tx], NUM_TX_DESC - 1 |
||
3545 | hidnplayr | 1101 | |
1102 | ;------------- |
||
1103 | ; Update stats |
||
1104 | |||
5050 | hidnplayr | 1105 | inc [ebx + device.packets_tx] |
5522 | hidnplayr | 1106 | add dword [ebx + device.bytes_tx], ecx |
5050 | hidnplayr | 1107 | adc dword [ebx + device.bytes_tx + 4], 0 |
3545 | hidnplayr | 1108 | |
9148 | hidnplayr | 1109 | spin_unlock_irqrestore |
3545 | hidnplayr | 1110 | xor eax, eax |
5050 | hidnplayr | 1111 | ret |
3545 | hidnplayr | 1112 | |
8997 | hidnplayr | 1113 | .error: |
1114 | DEBUGF 2, "TX packet error\n" |
||
1115 | inc [ebx + device.packets_tx_err] |
||
5522 | hidnplayr | 1116 | invoke NetFree, [bufferptr] |
8997 | hidnplayr | 1117 | |
9148 | hidnplayr | 1118 | spin_unlock_irqrestore |
3545 | hidnplayr | 1119 | or eax, -1 |
5050 | hidnplayr | 1120 | ret |
3545 | hidnplayr | 1121 | |
8997 | hidnplayr | 1122 | .overrun: |
1123 | DEBUGF 2, "TX overrun\n" |
||
1124 | inc [ebx + device.packets_tx_ovr] |
||
1125 | invoke NetFree, [bufferptr] |
||
1126 | |||
9148 | hidnplayr | 1127 | spin_unlock_irqrestore |
8997 | hidnplayr | 1128 | or eax, -1 |
1129 | ret |
||
1130 | |||
5050 | hidnplayr | 1131 | endp |
3545 | hidnplayr | 1132 | |
5050 | hidnplayr | 1133 | |
3545 | hidnplayr | 1134 | |
1135 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
1136 | ;; ;; |
||
1137 | ;; Interrupt handler ;; |
||
1138 | ;; ;; |
||
1139 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
9148 | hidnplayr | 1140 | align 16 |
3545 | hidnplayr | 1141 | int_handler: |
1142 | |||
1143 | push ebx esi edi |
||
1144 | |||
9148 | hidnplayr | 1145 | mov ebx, [esp+4*4] |
1146 | DEBUGF 1,"INT for 0x%x\n", ebx |
||
3545 | hidnplayr | 1147 | |
9148 | hidnplayr | 1148 | ; TODO? if we are paranoid, we can check that the value from ebx is present in the current device_list |
3545 | hidnplayr | 1149 | |
5050 | hidnplayr | 1150 | set_io [ebx + device.io_addr], 0 |
1151 | set_io [ebx + device.io_addr], REG_IntrStatus |
||
3545 | hidnplayr | 1152 | in ax, dx |
1153 | test ax, ax |
||
9148 | hidnplayr | 1154 | jz .nothing |
1155 | cmp ax, 0xffff ; if so, hardware is no longer present |
||
1156 | je .nothing ; |
||
1157 | test ax, ax |
||
1158 | jz .nothing |
||
1159 | out dx, ax ; ACK all interrupts |
||
3545 | hidnplayr | 1160 | |
9148 | hidnplayr | 1161 | DEBUGF 1,"Status: %x\n", ax |
3545 | hidnplayr | 1162 | |
1163 | ;-------- |
||
1164 | ; Receive |
||
1165 | test ax, ISB_RxOK |
||
1166 | jz .no_rx |
||
1167 | |||
1168 | push ax |
||
1169 | push ebx |
||
1170 | |||
5567 | hidnplayr | 1171 | .rx_loop: |
3545 | hidnplayr | 1172 | pop ebx |
5050 | hidnplayr | 1173 | mov eax, sizeof.rx_desc |
1174 | mul [ebx + device.cur_rx] |
||
1175 | lea esi, [ebx + device.rx_ring + eax] |
||
3545 | hidnplayr | 1176 | |
1177 | DEBUGF 1,"RxDesc.status = 0x%x\n", [esi + rx_desc.status] |
||
5522 | hidnplayr | 1178 | mov ecx, [esi + rx_desc.status] |
5567 | hidnplayr | 1179 | test ecx, DSB_OWNbit |
8997 | hidnplayr | 1180 | jnz .rx_done |
3545 | hidnplayr | 1181 | |
5050 | hidnplayr | 1182 | DEBUGF 1,"cur_rx = %u\n", [ebx + device.cur_rx] |
8997 | hidnplayr | 1183 | |
5522 | hidnplayr | 1184 | test ecx, SD_RxRES |
8997 | hidnplayr | 1185 | jnz .rx_error |
3545 | hidnplayr | 1186 | |
1187 | push ebx |
||
5567 | hidnplayr | 1188 | push .rx_loop |
5522 | hidnplayr | 1189 | and ecx, 0x00001FFF |
1190 | add ecx, -4 ; we dont need CRC |
||
1191 | DEBUGF 1,"data length = %u\n", ecx |
||
1192 | mov eax, [esi + rx_desc.buf_soft_addr] |
||
3545 | hidnplayr | 1193 | push eax |
5522 | hidnplayr | 1194 | mov [eax + NET_BUFF.length], ecx |
1195 | mov [eax + NET_BUFF.device], ebx |
||
1196 | mov [eax + NET_BUFF.offset], NET_BUFF.data |
||
3545 | hidnplayr | 1197 | |
5522 | hidnplayr | 1198 | ;------------- |
1199 | ; Update stats |
||
3545 | hidnplayr | 1200 | |
6480 | hidnplayr | 1201 | add dword [ebx + device.bytes_rx], ecx |
5050 | hidnplayr | 1202 | adc dword [ebx + device.bytes_rx + 4], 0 |
1203 | inc [ebx + device.packets_rx] |
||
3545 | hidnplayr | 1204 | |
5522 | hidnplayr | 1205 | ;---------------------- |
1206 | ; Allocate a new buffer |
||
3545 | hidnplayr | 1207 | |
5567 | hidnplayr | 1208 | mov [esi + rx_desc.status], 0 |
5522 | hidnplayr | 1209 | invoke NetAlloc, RX_BUF_SIZE+NET_BUFF.data |
5567 | hidnplayr | 1210 | test eax, eax |
8997 | hidnplayr | 1211 | jz .rx_overrun |
3545 | hidnplayr | 1212 | mov [esi + rx_desc.buf_soft_addr], eax |
5050 | hidnplayr | 1213 | invoke GetPhysAddr |
5522 | hidnplayr | 1214 | add eax, NET_BUFF.data |
3545 | hidnplayr | 1215 | mov dword [esi + rx_desc.buf_addr], eax |
1216 | |||
5522 | hidnplayr | 1217 | ;--------------- |
1218 | ; re set OWN bit |
||
3545 | hidnplayr | 1219 | |
1220 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
||
5050 | hidnplayr | 1221 | cmp [ebx + device.cur_rx], NUM_RX_DESC - 1 |
3545 | hidnplayr | 1222 | jne @f |
1223 | or eax, DSB_EORbit |
||
5050 | hidnplayr | 1224 | @@: |
1225 | mov [esi + rx_desc.status], eax |
||
3545 | hidnplayr | 1226 | |
5522 | hidnplayr | 1227 | ;-------------- |
1228 | ; Update rx ptr |
||
3545 | hidnplayr | 1229 | |
5050 | hidnplayr | 1230 | inc [ebx + device.cur_rx] |
1231 | and [ebx + device.cur_rx], NUM_RX_DESC - 1 |
||
3545 | hidnplayr | 1232 | |
5522 | hidnplayr | 1233 | jmp [EthInput] |
5567 | hidnplayr | 1234 | |
8997 | hidnplayr | 1235 | .rx_overrun: |
1236 | DEBUGF 2,"RX FIFO overrun\n" |
||
1237 | inc [ebx + device.packets_rx_ovr] |
||
1238 | jmp .rx_next |
||
1239 | |||
1240 | .rx_error: |
||
1241 | inc [ebx + device.packets_rx_err] |
||
1242 | test ecx, SD_RxRWT or SD_RxRUNT |
||
1243 | jz @f |
||
1244 | DEBUGF 2,"RX length error" |
||
1245 | @@: |
||
1246 | test ecx, SD_RxCRC |
||
1247 | jz @f |
||
1248 | DEBUGF 2,"RX CRC error" |
||
1249 | @@: |
||
1250 | test ecx, SD_RxFOVF |
||
1251 | jz @f |
||
1252 | DEBUGF 2,"RX FIFO error" |
||
1253 | @@: |
||
1254 | |||
1255 | .rx_next: |
||
5567 | hidnplayr | 1256 | mov eax, DSB_OWNbit or RX_BUF_SIZE |
1257 | cmp [ebx + device.cur_rx], NUM_RX_DESC - 1 |
||
1258 | jne @f |
||
1259 | or eax, DSB_EORbit |
||
1260 | @@: |
||
1261 | mov [esi + rx_desc.status], eax |
||
1262 | push ebx |
||
1263 | jmp .rx_loop |
||
1264 | |||
8997 | hidnplayr | 1265 | .rx_done: |
3545 | hidnplayr | 1266 | pop ax |
1267 | .no_rx: |
||
1268 | |||
5498 | hidnplayr | 1269 | ;----------------- |
1270 | ; Transmit cleanup |
||
3545 | hidnplayr | 1271 | |
5498 | hidnplayr | 1272 | test ax, ISB_TxOK or ISB_TxErr or ISB_TxDescUnavail |
3545 | hidnplayr | 1273 | jz .no_tx |
5522 | hidnplayr | 1274 | push ax |
3545 | hidnplayr | 1275 | |
5498 | hidnplayr | 1276 | DEBUGF 1,"TX done!\n" |
5522 | hidnplayr | 1277 | |
1278 | mov ecx, NUM_TX_DESC |
||
1279 | lea esi, [ebx + device.tx_ring] |
||
5498 | hidnplayr | 1280 | .txloop: |
5050 | hidnplayr | 1281 | cmp dword [esi + tx_desc.buf_soft_addr], 0 |
5522 | hidnplayr | 1282 | jz .maybenext |
3545 | hidnplayr | 1283 | |
1284 | test [esi + tx_desc.status], DSB_OWNbit |
||
5522 | hidnplayr | 1285 | jnz .maybenext |
3545 | hidnplayr | 1286 | |
5522 | hidnplayr | 1287 | push ecx |
1288 | DEBUGF 1,"Freeing up TX desc: %x\n", esi |
||
1289 | invoke NetFree, [esi + tx_desc.buf_soft_addr] |
||
1290 | pop ecx |
||
5050 | hidnplayr | 1291 | and dword [esi + tx_desc.buf_soft_addr], 0 |
3545 | hidnplayr | 1292 | |
5522 | hidnplayr | 1293 | .maybenext: |
1294 | add esi, sizeof.tx_desc |
||
1295 | dec ecx |
||
1296 | jnz .txloop |
||
1297 | |||
1298 | pop ax |
||
3545 | hidnplayr | 1299 | .no_tx: |
1300 | |||
5498 | hidnplayr | 1301 | test ax, ISB_LinkChg |
1302 | jz .no_linkchange |
||
1303 | DEBUGF 2, "Link change detected\n" |
||
1304 | call detect_link |
||
1305 | .no_linkchange: |
||
3545 | hidnplayr | 1306 | |
1307 | pop edi esi ebx |
||
1308 | xor eax, eax |
||
1309 | inc eax |
||
1310 | |||
1311 | ret |
||
1312 | |||
9148 | hidnplayr | 1313 | .nothing: |
1314 | pop edi esi ebx |
||
1315 | xor eax, eax |
||
3545 | hidnplayr | 1316 | |
9148 | hidnplayr | 1317 | ret |
3545 | hidnplayr | 1318 | |
9148 | hidnplayr | 1319 | |
1320 | |||
5498 | hidnplayr | 1321 | align 4 |
1322 | detect_link: |
||
1323 | |||
1324 | set_io [ebx + device.io_addr], 0 |
||
1325 | |||
1326 | ; set_io [ebx + device.io_addr], REG_TBICSR |
||
1327 | ; in eax, dx |
||
1328 | ; test eax, TBI_LinkOK |
||
1329 | ; jz .down |
||
1330 | |||
1331 | ; mov [ebx + device.state], ETH_LINK_UNKNOWN |
||
1332 | ; invoke NetLinkChanged |
||
1333 | ; ret |
||
1334 | |||
1335 | set_io [ebx + device.io_addr], REG_PHYstatus |
||
1336 | in al, dx |
||
1337 | test al, PHYS_LinkStatus |
||
1338 | jz .down |
||
1339 | DEBUGF 2, "Link is up, phystatus=0x%x\n", al |
||
1340 | xor ecx, ecx |
||
1341 | test al, PHYS_10bps |
||
1342 | jz @f |
||
1343 | or cl, ETH_LINK_10M |
||
1344 | @@: |
||
1345 | test al, PHYS_100bps |
||
1346 | jz @f |
||
1347 | or cl, ETH_LINK_100M |
||
1348 | @@: |
||
1349 | test al, PHYS_1000bpsF |
||
1350 | jz @f |
||
1351 | or cl, ETH_LINK_1G ;or ETH_LINK_FD |
||
1352 | @@: |
||
1353 | test al, PHYS_FullDup |
||
1354 | jz @f |
||
1355 | or cl, ETH_LINK_FD |
||
1356 | @@: |
||
1357 | mov [ebx + device.state], ecx |
||
1358 | invoke NetLinkChanged |
||
1359 | ret |
||
1360 | |||
1361 | .down: |
||
1362 | DEBUGF 2, "Link is down\n" |
||
1363 | mov [ebx + device.state], ETH_LINK_DOWN |
||
1364 | invoke NetLinkChanged |
||
1365 | ret |
||
1366 | |||
1367 | |||
1368 | |||
5050 | hidnplayr | 1369 | ; End of code |
3545 | hidnplayr | 1370 | |
5050 | hidnplayr | 1371 | data fixups |
1372 | end data |
||
3545 | hidnplayr | 1373 | |
5050 | hidnplayr | 1374 | include '../peimport.inc' |
3545 | hidnplayr | 1375 | |
1376 | my_service db 'RTL8169',0 ; max 16 chars include zero |
||
1377 | |||
1378 | include_debug_strings ; All data wich FDO uses will be included here |
||
1379 | |||
5494 | hidnplayr | 1380 | MAC_VERSION_LIST: |
3545 | hidnplayr | 1381 | |
7299 | hidnplayr | 1382 | ; 8168E+ family |
1383 | dd 0x7cf00000, 0x50200000, 51, sz_rtl8168ep |
||
1384 | dd 0x7cf00000, 0x50100000, 50, sz_rtl8168ep |
||
1385 | dd 0x7cf00000, 0x50000000, 49, sz_rtl8168ep |
||
3545 | hidnplayr | 1386 | |
7299 | hidnplayr | 1387 | ; 8168H family |
1388 | dd 0x7cf00000, 0x54100000, 46, sz_rtl8168h |
||
1389 | dd 0x7cf00000, 0x54000000, 45, sz_rtl8168h |
||
3545 | hidnplayr | 1390 | |
7299 | hidnplayr | 1391 | ; 8168G family |
1392 | dd 0x7cf00000, 0x5c800000, 44, sz_rtl8411 |
||
1393 | dd 0x7cf00000, 0x50900000, 42, sz_rtl8168g |
||
1394 | dd 0x7cf00000, 0x4c100000, 41, sz_rtl8168g |
||
1395 | dd 0x7cf00000, 0x4c000000, 40, sz_rtl8168g |
||
5494 | hidnplayr | 1396 | |
7299 | hidnplayr | 1397 | ; 8168F family |
1398 | dd 0x7c800000, 0x48800000, 38, sz_rtl8411 |
||
1399 | dd 0x7cf00000, 0x48100000, 36, sz_rtl8168f |
||
1400 | dd 0x7cf00000, 0x48000000, 35, sz_rtl8168f |
||
5494 | hidnplayr | 1401 | |
7299 | hidnplayr | 1402 | ; 8168E family |
1403 | dd 0x7c800000, 0x2c800000, 34, sz_rtl8168evl |
||
1404 | dd 0x7cf00000, 0x2c200000, 33, sz_rtl8168e |
||
1405 | dd 0x7cf00000, 0x2c100000, 32, sz_rtl8168e |
||
1406 | dd 0x7c800000, 0x2c000000, 33, sz_rtl8168e |
||
5494 | hidnplayr | 1407 | |
7299 | hidnplayr | 1408 | ; 8168D family |
1409 | dd 0x7cf00000, 0x28300000, 26, sz_rtl8168d |
||
1410 | dd 0x7cf00000, 0x28100000, 25, sz_rtl8168d |
||
1411 | dd 0x7c800000, 0x28000000, 26, sz_rtl8168d |
||
5494 | hidnplayr | 1412 | |
7299 | hidnplayr | 1413 | ; 8168D+ family |
1414 | dd 0x7cf00000, 0x28800000, 27, sz_rtl8168dp |
||
1415 | dd 0x7cf00000, 0x28a00000, 28, sz_rtl8168dp |
||
5494 | hidnplayr | 1416 | |
7299 | hidnplayr | 1417 | ; 8168C family |
1418 | dd 0x7cf00000, 0x3cb00000, 24, sz_rtl8168p |
||
1419 | dd 0x7cf00000, 0x3c900000, 23, sz_rtl8168p |
||
1420 | dd 0x7cf00000, 0x3c800000, 18, sz_rtl8168p |
||
1421 | dd 0x7c800000, 0x3c800000, 24, sz_rtl8168p |
||
1422 | dd 0x7cf00000, 0x3c000000, 19, sz_rtl8168c |
||
1423 | dd 0x7cf00000, 0x3c200000, 20, sz_rtl8168c |
||
1424 | dd 0x7cf00000, 0x3c300000, 21, sz_rtl8168c |
||
1425 | dd 0x7cf00000, 0x3c400000, 22, sz_rtl8168c |
||
1426 | dd 0x7c800000, 0x3c000000, 22, sz_rtl8168c |
||
5494 | hidnplayr | 1427 | |
7299 | hidnplayr | 1428 | ; 8168B family |
1429 | dd 0x7cf00000, 0x38000000, 12, sz_rtl8168b |
||
1430 | dd 0x7cf00000, 0x38500000, 17, sz_rtl8101e |
||
1431 | dd 0x7c800000, 0x38000000, 17, sz_rtl8101e |
||
1432 | dd 0x7c800000, 0x30000000, 11, sz_rtl8168b |
||
5494 | hidnplayr | 1433 | |
7299 | hidnplayr | 1434 | ; 8101 family |
1435 | dd 0x7cf00000, 0x44900000, 39, sz_rtl8106e |
||
1436 | dd 0x7c800000, 0x44800000, 39, sz_rtl8106e |
||
1437 | dd 0x7c800000, 0x44000000, 37, sz_rtl8402 |
||
1438 | dd 0x7cf00000, 0x40b00000, 30, sz_rtl8105e |
||
1439 | dd 0x7cf00000, 0x40a00000, 30, sz_rtl8105e |
||
1440 | dd 0x7cf00000, 0x40900000, 29, sz_rtl8105e |
||
1441 | dd 0x7c800000, 0x40800000, 30, sz_rtl8105e |
||
1442 | dd 0x7cf00000, 0x34a00000, 09, sz_rtl8102e |
||
1443 | dd 0x7cf00000, 0x24a00000, 09, sz_rtl8102e |
||
1444 | dd 0x7cf00000, 0x34900000, 08, sz_rtl8102e |
||
1445 | dd 0x7cf00000, 0x24900000, 08, sz_rtl8102e |
||
1446 | dd 0x7cf00000, 0x34800000, 07, sz_rtl8102e |
||
1447 | dd 0x7cf00000, 0x24800000, 07, sz_rtl8102e |
||
1448 | dd 0x7cf00000, 0x34000000, 13, sz_rtl8101e |
||
1449 | dd 0x7cf00000, 0x34300000, 10, sz_rtl8101e |
||
1450 | dd 0x7cf00000, 0x34200000, 16, sz_rtl8168b |
||
1451 | dd 0x7c800000, 0x34800000, 09, sz_rtl8102e |
||
1452 | dd 0x7c800000, 0x24800000, 09, sz_rtl8102e |
||
1453 | dd 0x7c800000, 0x34000000, 16, sz_rtl8168b |
||
1454 | dd 0xfc800000, 0x38800000, 15, sz_rtl8100e |
||
1455 | dd 0xfc800000, 0x30800000, 14, sz_rtl8100e |
||
5494 | hidnplayr | 1456 | |
7299 | hidnplayr | 1457 | ; 8110 family |
1458 | dd 0xfc800000, 0x98000000, 06, sz_rtl8169sc |
||
1459 | dd 0xfc800000, 0x18000000, 05, sz_rtl8169sc |
||
1460 | dd 0xfc800000, 0x10000000, 04, sz_rtl8169sb |
||
1461 | dd 0xfc800000, 0x04000000, 03, sz_rtl8110s |
||
1462 | dd 0xfc800000, 0x00800000, 02, sz_rtl8169s |
||
1463 | dd 0xfc800000, 0x00000000, 01, sz_rtl8169 |
||
5494 | hidnplayr | 1464 | |
1465 | ; Catch-all |
||
7299 | hidnplayr | 1466 | dd 0x00000000, 0x00000000, 0, sz_unknown |
5494 | hidnplayr | 1467 | |
7299 | hidnplayr | 1468 | sz_rtl8169 db "Realtek 8169",0 |
1469 | sz_rtl8169s db "Realtek 8169s",0 |
||
1470 | sz_rtl8110s db "Realtek 8110s",0 |
||
1471 | sz_rtl8169sb db "Realtek 8169sb/8110sb",0 |
||
1472 | sz_rtl8169sc db "Realtek 8169sc/8110sc",0 |
||
1473 | sz_rtl8102e db "Realtek 8102e",0 |
||
1474 | sz_rtl8101e db "Realtek 8101e",0 |
||
1475 | sz_rtl8168b db "Realtek 8168b/8111b",0 |
||
1476 | sz_rtl8100e db "Realtek 8100e",0 |
||
1477 | sz_rtl8168p db "Realtek 8168c+/8111c+",0 |
||
1478 | sz_rtl8168c db "Realtek 8168c/8111c",0 |
||
1479 | sz_rtl8168d db "Realtek 8168d/8111d",0 |
||
1480 | sz_rtl8168dp db "Realtek 8168d+/8111d+",0 |
||
1481 | sz_rtl8105e db "Realtek 8105e",0 |
||
1482 | sz_rtl8168e db "Realtek 8168e/8111e",0 |
||
1483 | sz_rtl8168evl db "Realtek 8168evl/8111evl",0 |
||
1484 | sz_rtl8168f db "Realtek 8168f/8111f",0 |
||
1485 | sz_rtl8402 db "Realtek 8402",0 |
||
1486 | sz_rtl8411 db "Realtek 8411",0 |
||
1487 | sz_rtl8106e db "Realtek 8106e",0 |
||
1488 | sz_rtl8168ep db "Realtek 8168e+",0 |
||
1489 | sz_rtl8168g db "Realtek 8168g/8111g",0 |
||
1490 | sz_rtl8168h db "Realtek 8168h/8111h",0 |
||
1491 | sz_unknown db "unknown RTL8169 rev",0 |
||
5494 | hidnplayr | 1492 | |
5050 | hidnplayr | 1493 | align 4 |
1494 | devices dd 0 |
||
3545 | hidnplayr | 1495 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling |
1496 |