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Rev | Author | Line No. | Line |
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3545 | hidnplayr | 1 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
2 | ;; ;; |
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3 | ;; Copyright (C) KolibriOS team 2004-2013. All rights reserved. ;; |
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4 | ;; Distributed under terms of the GNU General Public License ;; |
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5 | ;; ;; |
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6 | ;; R6040 driver for KolibriOS ;; |
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7 | ;; ;; |
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8 | ;; based on R6040.c from linux ;; |
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9 | ;; ;; |
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10 | ;; Written by Asper (asper.85@mail.ru) ;; |
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11 | ;; and hidnplayr (hidnplayr@gmail.com) ;; |
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12 | ;; ;; |
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13 | ;; GNU GENERAL PUBLIC LICENSE ;; |
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14 | ;; Version 2, June 1991 ;; |
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15 | ;; ;; |
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16 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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17 | |||
18 | format MS COFF |
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19 | |||
20 | API_VERSION = 0x01000100 |
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21 | DRIVER_VERSION = 5 |
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22 | |||
23 | MAX_DEVICES = 16 |
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24 | |||
25 | DEBUG = 1 |
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26 | __DEBUG__ = 1 |
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27 | __DEBUG_LEVEL__ = 2 |
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28 | |||
29 | W_MAX_TIMEOUT = 0x0FFF ; max time out delay time |
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30 | |||
31 | TX_TIMEOUT = 6000 ; Time before concluding the transmitter is hung, in ms |
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32 | |||
33 | TX_RING_SIZE = 4 ; RING sizes must be a power of 2 |
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34 | RX_RING_SIZE = 4 |
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35 | |||
36 | RX_BUF_LEN_IDX = 3 ; 0==8K, 1==16K, 2==32K, 3==64K |
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37 | |||
38 | ; Threshold is bytes transferred to chip before transmission starts. |
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39 | |||
40 | TX_FIFO_THRESH = 256 ; In bytes, rounded down to 32 byte units. |
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41 | |||
42 | ; The following settings are log_2(bytes)-4: 0 == 16 bytes .. 6==1024. |
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43 | |||
44 | RX_FIFO_THRESH = 4 ; Rx buffer level before first PCI xfer. |
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45 | RX_DMA_BURST = 4 ; Maximum PCI burst, '4' is 256 bytes |
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46 | TX_DMA_BURST = 4 |
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47 | |||
48 | |||
49 | |||
50 | include '../proc32.inc' |
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51 | include '../imports.inc' |
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52 | include '../fdo.inc' |
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53 | include '../netdrv.inc' |
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54 | |||
55 | public START |
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56 | public service_proc |
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57 | public version |
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58 | |||
59 | ; Operational parameters that usually are not changed. |
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60 | |||
61 | PHY1_ADDR = 1 ;For MAC1 |
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62 | PHY2_ADDR = 3 ;For MAC2 |
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63 | PHY_MODE = 0x3100 ;PHY CHIP Register 0 |
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64 | PHY_CAP = 0x01E1 ;PHY CHIP Register 4 |
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65 | |||
66 | ;************************************************************************** |
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67 | ; RDC R6040 Register Definitions |
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68 | ;************************************************************************** |
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69 | MCR0 = 0x00 ;Control register 0 |
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70 | MCR1 = 0x01 ;Control register 1 |
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71 | MAC_RST = 0x0001 ;Reset the MAC |
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72 | MBCR = 0x08 ;Bus control |
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73 | MT_ICR = 0x0C ;TX interrupt control |
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74 | MR_ICR = 0x10 ;RX interrupt control |
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75 | MTPR = 0x14 ;TX poll command register |
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76 | MR_BSR = 0x18 ;RX buffer size |
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77 | MR_DCR = 0x1A ;RX descriptor control |
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78 | MLSR = 0x1C ;Last status |
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79 | MMDIO = 0x20 ;MDIO control register |
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80 | MDIO_WRITE = 0x4000 ;MDIO write |
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81 | MDIO_READ = 0x2000 ;MDIO read |
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82 | MMRD = 0x24 ;MDIO read data register |
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83 | MMWD = 0x28 ;MDIO write data register |
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84 | MTD_SA0 = 0x2C ;TX descriptor start address 0 |
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85 | MTD_SA1 = 0x30 ;TX descriptor start address 1 |
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86 | MRD_SA0 = 0x34 ;RX descriptor start address 0 |
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87 | MRD_SA1 = 0x38 ;RX descriptor start address 1 |
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88 | MISR = 0x3C ;Status register |
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89 | MIER = 0x40 ;INT enable register |
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90 | MSK_INT = 0x0000 ;Mask off interrupts |
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91 | RX_FINISH = 0x0001 ;RX finished |
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92 | RX_NO_DESC = 0x0002 ;No RX descriptor available |
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93 | RX_FIFO_FULL = 0x0004 ;RX FIFO full |
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94 | RX_EARLY = 0x0008 ;RX early |
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95 | TX_FINISH = 0x0010 ;TX finished |
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96 | TX_EARLY = 0x0080 ;TX early |
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97 | EVENT_OVRFL = 0x0100 ;Event counter overflow |
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98 | LINK_CHANGED = 0x0200 ;PHY link changed |
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99 | ME_CISR = 0x44 ;Event counter INT status |
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100 | ME_CIER = 0x48 ;Event counter INT enable |
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101 | MR_CNT = 0x50 ;Successfully received packet counter |
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102 | ME_CNT0 = 0x52 ;Event counter 0 |
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103 | ME_CNT1 = 0x54 ;Event counter 1 |
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104 | ME_CNT2 = 0x56 ;Event counter 2 |
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105 | ME_CNT3 = 0x58 ;Event counter 3 |
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106 | MT_CNT = 0x5A ;Successfully transmit packet counter |
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107 | ME_CNT4 = 0x5C ;Event counter 4 |
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108 | MP_CNT = 0x5E ;Pause frame counter register |
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109 | MAR0 = 0x60 ;Hash table 0 |
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110 | MAR1 = 0x62 ;Hash table 1 |
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111 | MAR2 = 0x64 ;Hash table 2 |
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112 | MAR3 = 0x66 ;Hash table 3 |
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113 | MID_0L = 0x68 ;Multicast address MID0 Low |
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114 | MID_0M = 0x6A ;Multicast address MID0 Medium |
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115 | MID_0H = 0x6C ;Multicast address MID0 High |
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116 | MID_1L = 0x70 ;MID1 Low |
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117 | MID_1M = 0x72 ;MID1 Medium |
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118 | MID_1H = 0x74 ;MID1 High |
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119 | MID_2L = 0x78 ;MID2 Low |
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120 | MID_2M = 0x7A ;MID2 Medium |
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121 | MID_2H = 0x7C ;MID2 High |
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122 | MID_3L = 0x80 ;MID3 Low |
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123 | MID_3M = 0x82 ;MID3 Medium |
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124 | MID_3H = 0x84 ;MID3 High |
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125 | PHY_CC = 0x88 ;PHY status change configuration register |
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126 | PHY_ST = 0x8A ;PHY status register |
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127 | MAC_SM = 0xAC ;MAC status machine |
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128 | MAC_ID = 0xBE ;Identifier register |
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129 | |||
130 | MAX_BUF_SIZE = 0x600 ;1536 |
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131 | |||
132 | MBCR_DEFAULT = 0x012A ;MAC Bus Control Register |
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133 | MCAST_MAX = 3 ;Max number multicast addresses to filter |
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134 | |||
135 | ;Descriptor status |
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136 | DSC_OWNER_MAC = 0x8000 ;MAC is the owner of this descriptor |
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137 | DSC_RX_OK = 0x4000 ;RX was successfull |
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138 | DSC_RX_ERR = 0x0800 ;RX PHY error |
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139 | DSC_RX_ERR_DRI = 0x0400 ;RX dribble packet |
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140 | DSC_RX_ERR_BUF = 0x0200 ;RX length exceeds buffer size |
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141 | DSC_RX_ERR_LONG = 0x0100 ;RX length > maximum packet length |
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142 | DSC_RX_ERR_RUNT = 0x0080 ;RX packet length < 64 byte |
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143 | DSC_RX_ERR_CRC = 0x0040 ;RX CRC error |
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144 | DSC_RX_BCAST = 0x0020 ;RX broadcast (no error) |
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145 | DSC_RX_MCAST = 0x0010 ;RX multicast (no error) |
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146 | DSC_RX_MCH_HIT = 0x0008 ;RX multicast hit in hash table (no error) |
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147 | DSC_RX_MIDH_HIT = 0x0004 ;RX MID table hit (no error) |
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148 | DSC_RX_IDX_MID_MASK = 3 ;RX mask for the index of matched MIDx |
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149 | |||
150 | ;PHY settings |
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151 | ICPLUS_PHY_ID = 0x0243 |
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152 | |||
153 | RX_INTS = RX_FIFO_FULL or RX_NO_DESC or RX_FINISH |
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154 | TX_INTS = TX_FINISH |
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155 | INT_MASK = RX_INTS or TX_INTS |
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156 | |||
157 | RX_BUF_LEN equ (8192 << RX_BUF_LEN_IDX) ; Size of the in-memory receive ring. |
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158 | |||
159 | IO_SIZE = 256 ; RDC MAC I/O Size |
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160 | MAX_MAC = 2 ; MAX RDC MAC |
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161 | |||
162 | |||
163 | virtual at 0 |
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164 | x_head: |
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165 | .status dw ? ;0-1 |
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166 | .len dw ? ;2-3 |
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167 | .buf dd ? ;4-7 |
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168 | .ndesc dd ? ;8-B |
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169 | .rev1 dd ? ;C-F |
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170 | .vbufp dd ? ;10-13 |
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171 | .vndescp dd ? ;14-17 |
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172 | .skb_ptr dd ? ;18-1B |
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173 | .rev2 dd ? ;1C-1F |
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174 | .sizeof: |
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175 | end virtual |
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176 | |||
177 | |||
178 | virtual at ebx |
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179 | |||
180 | device: |
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181 | |||
182 | ETH_DEVICE |
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183 | |||
184 | .io_addr dd ? |
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185 | |||
186 | .cur_rx dw ? |
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187 | .cur_tx dw ? |
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188 | .last_tx dw ? |
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189 | .phy_addr dw ? |
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190 | .phy_mode dw ? |
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191 | .mcr0 dw ? |
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192 | .mcr1 dw ? |
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193 | .switch_sig dw ? |
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194 | |||
195 | .pci_bus dd ? |
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196 | .pci_dev dd ? |
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197 | .irq_line db ? |
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198 | |||
199 | rb 3 ; dword alignment |
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200 | |||
201 | .tx_ring: rb (((x_head.sizeof*TX_RING_SIZE)+32) and 0xfffffff0) |
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202 | .rx_ring: rb (((x_head.sizeof*RX_RING_SIZE)+32) and 0xfffffff0) |
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203 | |||
204 | .size = $ - device |
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205 | |||
206 | end virtual |
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207 | |||
208 | |||
209 | |||
210 | section '.flat' code readable align 16 |
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211 | |||
212 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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213 | ;; ;; |
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214 | ;; proc START ;; |
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215 | ;; ;; |
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216 | ;; (standard driver proc) ;; |
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217 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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218 | |||
219 | align 4 |
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220 | proc START stdcall, state:dword |
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221 | |||
222 | cmp [state], 1 |
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223 | jne .exit |
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224 | |||
225 | .entry: |
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226 | |||
227 | DEBUGF 2,"Loading %s driver\n", my_service |
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228 | stdcall RegService, my_service, service_proc |
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229 | ret |
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230 | |||
231 | .fail: |
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232 | .exit: |
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233 | xor eax, eax |
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234 | ret |
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235 | |||
236 | endp |
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237 | |||
238 | |||
239 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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240 | ;; ;; |
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241 | ;; proc SERVICE_PROC ;; |
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242 | ;; ;; |
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243 | ;; (standard driver proc) ;; |
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244 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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245 | |||
246 | align 4 |
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247 | proc service_proc stdcall, ioctl:dword |
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248 | |||
249 | mov edx, [ioctl] |
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250 | mov eax, [IOCTL.io_code] |
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251 | |||
252 | ;------------------------------------------------------ |
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253 | |||
254 | cmp eax, 0 ;SRV_GETVERSION |
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255 | jne @F |
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256 | |||
257 | cmp [IOCTL.out_size], 4 |
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258 | jb .fail |
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259 | mov eax, [IOCTL.output] |
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260 | mov [eax], dword API_VERSION |
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261 | |||
262 | xor eax, eax |
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263 | ret |
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264 | |||
265 | ;------------------------------------------------------ |
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266 | @@: |
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267 | cmp eax, 1 ;SRV_HOOK |
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268 | jne .fail |
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269 | |||
270 | cmp [IOCTL.inp_size], 3 ; Data input must be at least 3 bytes |
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271 | jb .fail |
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272 | |||
273 | mov eax, [IOCTL.input] |
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274 | cmp byte [eax], 1 ; 1 means device number and bus number (pci) are given |
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275 | jne .fail ; other types arent supported for this card yet |
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276 | |||
277 | ; check if the device is already listed |
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278 | |||
279 | mov esi, device_list |
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280 | mov ecx, [devices] |
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281 | test ecx, ecx |
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282 | jz .firstdevice |
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283 | |||
284 | ; mov eax, [IOCTL.input] ; get the pci bus and device numbers |
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285 | mov ax , [eax+1] ; |
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286 | .nextdevice: |
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287 | mov ebx, [esi] |
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288 | cmp al, byte[device.pci_bus] |
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289 | jne @f |
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290 | cmp ah, byte[device.pci_dev] |
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291 | je .find_devicenum ; Device is already loaded, let's find it's device number |
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292 | @@: |
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293 | add esi, 4 |
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294 | loop .nextdevice |
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295 | |||
296 | |||
297 | ; This device doesnt have its own eth_device structure yet, lets create one |
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298 | .firstdevice: |
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299 | cmp [devices], MAX_DEVICES ; First check if the driver can handle one more card |
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300 | jae .fail |
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301 | |||
302 | allocate_and_clear ebx, device.size, .fail ; Allocate the buffer for device structure |
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303 | |||
304 | ; Fill in the direct call addresses into the struct |
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305 | |||
306 | mov [device.reset], reset |
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307 | mov [device.transmit], transmit |
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308 | mov [device.unload], unload |
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309 | mov [device.name], my_service |
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310 | |||
311 | ; save the pci bus and device numbers |
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312 | |||
313 | mov eax, [IOCTL.input] |
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314 | movzx ecx, byte[eax+1] |
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315 | mov [device.pci_bus], ecx |
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316 | movzx ecx, byte[eax+2] |
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317 | mov [device.pci_dev], ecx |
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318 | |||
319 | ; Now, it's time to find the base io addres of the PCI device |
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320 | |||
321 | PCI_find_io |
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322 | |||
323 | ; We've found the io address, find IRQ now |
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324 | |||
325 | PCI_find_irq |
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326 | |||
327 | DEBUGF 1,"Hooking into device, dev:%x, bus:%x, irq:%x, addr:%x\n",\ |
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328 | [device.pci_dev]:1,[device.pci_bus]:1,[device.irq_line]:1,[device.io_addr]:4 |
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329 | |||
330 | ; Ok, the eth_device structure is ready, let's probe the device |
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331 | cli |
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332 | |||
333 | call probe ; this function will output in eax |
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334 | test eax, eax |
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335 | jnz .err_sti ; If an error occured, exit |
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336 | |||
337 | mov eax, [devices] ; Add the device structure to our device list |
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338 | mov [device_list+4*eax], ebx ; (IRQ handler uses this list to find device) |
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339 | inc [devices] ; |
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340 | |||
341 | mov [device.type], NET_TYPE_ETH |
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342 | call NetRegDev |
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343 | sti |
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344 | |||
345 | cmp eax, -1 |
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346 | je .destroy |
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347 | |||
348 | ret |
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349 | |||
350 | ; If the device was already loaded, find the device number and return it in eax |
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351 | |||
352 | .find_devicenum: |
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353 | DEBUGF 1,"Trying to find device number of already registered device\n" |
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354 | call NetPtrToNum ; This kernel procedure converts a pointer to device struct in ebx |
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355 | ; into a device number in edi |
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356 | mov eax, edi ; Application wants it in eax instead |
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357 | DEBUGF 1,"Kernel says: %u\n", eax |
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358 | ret |
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359 | |||
360 | ; If an error occured, remove all allocated data and exit (returning -1 in eax) |
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361 | |||
362 | .destroy: |
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363 | ; todo: reset device into virgin state |
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364 | |||
365 | .err_sti: |
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366 | sti |
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367 | |||
368 | .err: |
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369 | stdcall KernelFree, ebx |
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370 | |||
371 | .fail: |
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372 | or eax, -1 |
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373 | ret |
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374 | |||
375 | ;------------------------------------------------------ |
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376 | endp |
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377 | |||
378 | |||
379 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
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380 | ;; ;; |
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381 | ;; Actual Hardware dependent code starts here ;; |
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382 | ;; ;; |
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383 | ;;/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\/\;; |
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384 | |||
385 | |||
386 | macro mdio_write reg, val { |
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387 | stdcall phy_read, [device.io_addr], [device.phy_addr], reg |
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388 | } |
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389 | |||
390 | macro mdio_write reg, val { |
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391 | stdcall phy_write, [device.io_addr], [devce.phy_addr], reg, val |
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392 | } |
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393 | |||
394 | |||
395 | align 4 |
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396 | unload: |
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397 | ; TODO: (in this particular order) |
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398 | ; |
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399 | ; - Stop the device |
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400 | ; - Detach int handler |
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401 | ; - Remove device from local list (RTL8139_LIST) |
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402 | ; - call unregister function in kernel |
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403 | ; - Remove all allocated structures and buffers the card used |
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404 | |||
405 | or eax,-1 |
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406 | |||
407 | ret |
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408 | |||
409 | |||
410 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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411 | ;; |
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412 | ;; probe: enables the device (if it really is RTL8139) |
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413 | ;; |
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414 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
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415 | |||
416 | align 4 |
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417 | probe: |
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418 | DEBUGF 2,"Probing R6040 device\n" |
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419 | |||
420 | PCI_make_bus_master |
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421 | |||
422 | ; If PHY status change register is still set to zero |
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423 | ; it means the bootloader didn't initialize it |
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424 | |||
425 | set_io 0 |
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426 | set_io PHY_CC |
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427 | in ax, dx |
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428 | test ax, ax |
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429 | jnz @f |
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430 | mov ax, 0x9F07 |
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431 | out dx, ax |
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432 | @@: |
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433 | |||
434 | call read_mac |
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435 | |||
436 | ; Some bootloaders/BIOSes do not initialize MAC address, warn about that |
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437 | and eax, 0xFF |
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438 | or eax, dword [device.mac] |
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439 | test eax, eax |
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440 | jnz @f |
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441 | DEBUGF 2, "ERROR: MAC address not initialized!\n" |
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442 | |||
443 | @@: |
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444 | ; Init RDC private data |
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445 | mov [device.mcr0], 0x1002 |
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446 | ;mov [private.phy_addr], 1 ; Asper: Only one network card is supported now. |
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447 | mov [device.switch_sig], 0 |
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448 | |||
449 | ; Check the vendor ID on the PHY, if 0xFFFF assume none attached |
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450 | stdcall phy_read, 1, 2 |
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451 | cmp ax, 0xFFFF |
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452 | jne @f |
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453 | DEBUGF 2, "Failed to detect an attached PHY\n" ;, generating random" |
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454 | mov eax, -1 |
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455 | ret |
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456 | @@: |
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457 | |||
458 | ; Set MAC address |
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459 | call init_mac_regs |
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460 | |||
461 | ; Initialize and alloc RX/TX buffers |
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462 | call init_txbufs |
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463 | call init_rxbufs |
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464 | |||
465 | ; Read the PHY ID |
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466 | mov [device.phy_mode], 0x8000 |
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467 | stdcall phy_read, 0, 2 |
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468 | mov [device.switch_sig], ax |
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469 | cmp ax, ICPLUS_PHY_ID |
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470 | jne @f |
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471 | stdcall phy_write, 29, 31, 0x175C ; Enable registers |
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472 | jmp .phy_readen |
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473 | @@: |
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474 | |||
475 | ; PHY Mode Check |
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476 | movzx eax, [device.phy_addr] |
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477 | stdcall phy_write, eax, 4, PHY_CAP |
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478 | stdcall phy_write, eax, 0, PHY_MODE |
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479 | |||
480 | if PHY_MODE = 0x3100 |
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481 | call phy_mode_chk |
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482 | mov [device.phy_mode], ax |
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483 | jmp .phy_readen |
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484 | end if |
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485 | |||
486 | if not (PHY_MODE and 0x0100) |
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487 | mov [device.phy_mode], 0 |
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488 | end if |
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489 | |||
490 | .phy_readen: |
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491 | |||
492 | ; Set duplex mode |
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493 | mov ax, [device.phy_mode] |
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494 | or [device.mcr0], ax |
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495 | |||
496 | ; improve performance (by RDC guys) |
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497 | stdcall phy_read, 30, 17 |
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498 | or ax, 0x4000 |
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499 | stdcall phy_write, 30, 17, eax |
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500 | |||
501 | stdcall phy_read, 30, 17 |
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502 | and ax, not 0x2000 |
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503 | stdcall phy_write, 30, 17, eax |
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504 | |||
505 | stdcall phy_write, 0, 19, 0x0000 |
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506 | stdcall phy_write, 0, 30, 0x01F0 |
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507 | |||
508 | ; Initialize all Mac registers |
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509 | call init_mac_regs |
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510 | |||
511 | |||
512 | |||
513 | align 4 |
||
514 | reset: |
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515 | |||
516 | DEBUGF 2,"Resetting R6040\n" |
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517 | |||
518 | ; Mask off Interrupt |
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519 | xor ax, ax |
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520 | set_io 0 |
||
521 | set_io MIER |
||
522 | out dx, ax |
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523 | |||
524 | |||
525 | ; attach int handler |
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526 | |||
527 | movzx eax, [device.irq_line] |
||
528 | DEBUGF 2,"Attaching int handler to irq %x\n", eax:1 |
||
529 | stdcall AttachIntHandler, eax, int_handler, dword 0 |
||
530 | test eax, eax |
||
531 | jnz @f |
||
532 | DEBUGF 2,"\nCould not attach int handler!\n" |
||
533 | ; or eax, -1 |
||
534 | ; ret |
||
535 | @@: |
||
536 | |||
537 | |||
538 | ;Reset RDC MAC |
||
539 | mov eax, MAC_RST |
||
540 | set_io 0 |
||
541 | set_io MCR1 |
||
542 | out dx, ax |
||
543 | |||
544 | mov ecx, 2048 ;limit |
||
545 | .read: |
||
546 | in ax, dx |
||
547 | test ax, 0x1 |
||
548 | jnz @f |
||
549 | dec ecx |
||
550 | test ecx, ecx |
||
551 | jnz .read |
||
552 | @@: |
||
553 | ;Reset internal state machine |
||
554 | mov ax, 2 |
||
555 | set_io MAC_SM |
||
556 | out dx, ax |
||
557 | |||
558 | xor ax, ax |
||
559 | out dx, ax |
||
560 | |||
561 | mov esi, 5 |
||
562 | stdcall Sleep |
||
563 | |||
564 | ;MAC Bus Control Register |
||
565 | mov ax, MBCR_DEFAULT |
||
566 | set_io 0 |
||
567 | set_io MBCR |
||
568 | out dx, ax |
||
569 | |||
570 | ;Buffer Size Register |
||
571 | mov ax, MAX_BUF_SIZE |
||
572 | set_io MR_BSR |
||
573 | out dx, ax |
||
574 | |||
575 | ;Write TX ring start address |
||
576 | lea eax, [device.tx_ring] |
||
577 | GetRealAddr |
||
578 | set_io MTD_SA0 |
||
579 | out dx, ax |
||
580 | shr eax, 16 |
||
581 | set_io MTD_SA1 |
||
582 | out dx, ax |
||
583 | |||
584 | ;Write RX ring start address |
||
585 | lea eax, [device.rx_ring] |
||
586 | GetRealAddr |
||
587 | set_io MRD_SA0 |
||
588 | out dx, ax |
||
589 | shr eax, 16 |
||
590 | set_io MRD_SA1 |
||
591 | out dx, ax |
||
592 | |||
593 | ;Set interrupt waiting time and packet numbers |
||
594 | xor ax, ax |
||
595 | set_io MT_ICR |
||
596 | out dx, ax |
||
597 | |||
598 | ;Enable interrupts |
||
599 | mov ax, INT_MASK |
||
600 | set_io MIER |
||
601 | out dx, ax |
||
602 | |||
603 | ;Enable TX and RX |
||
604 | mov ax, [device.mcr0] |
||
605 | or ax, 0x0002 |
||
606 | set_io 0 |
||
607 | out dx, ax |
||
608 | |||
609 | ;Let TX poll the descriptors |
||
610 | ;we may got called by tx_timeout which has left |
||
611 | ;some unset tx buffers |
||
612 | xor ax, ax |
||
613 | inc ax |
||
614 | set_io 0 |
||
615 | set_io MTPR |
||
616 | out dx, ax |
||
617 | |||
618 | ; Set the mtu, kernel will be able to send now |
||
619 | mov [device.mtu], 1514 |
||
620 | |||
621 | ; Set link state to unknown |
||
622 | mov [device.state], ETH_LINK_UNKOWN |
||
623 | |||
624 | DEBUGF 1,"Reset ok\n" |
||
625 | xor eax, eax |
||
626 | ret |
||
627 | |||
628 | |||
629 | |||
630 | align 4 |
||
631 | init_txbufs: |
||
632 | |||
633 | DEBUGF 1,"Init TxBufs\n" |
||
634 | |||
635 | lea esi, [device.tx_ring] |
||
636 | lea eax, [device.tx_ring + x_head.sizeof] |
||
637 | GetRealAddr |
||
638 | mov ecx, TX_RING_SIZE |
||
639 | |||
640 | .next_desc: |
||
641 | mov [esi + x_head.ndesc], eax |
||
642 | mov [esi + x_head.skb_ptr], 0 |
||
643 | mov [esi + x_head.status], DSC_OWNER_MAC |
||
644 | |||
645 | add eax, x_head.sizeof |
||
646 | add esi, x_head.sizeof |
||
647 | |||
648 | dec ecx |
||
649 | jnz .next_desc |
||
650 | |||
651 | lea eax, [device.tx_ring] |
||
652 | GetRealAddr |
||
653 | mov [device.tx_ring + x_head.sizeof*(TX_RING_SIZE - 1) + x_head.ndesc], eax |
||
654 | |||
655 | ret |
||
656 | |||
657 | |||
658 | |||
659 | align 4 |
||
660 | init_rxbufs: |
||
661 | |||
662 | DEBUGF 1,"Init RxBufs\n" |
||
663 | |||
664 | lea esi, [device.rx_ring] |
||
665 | lea eax, [device.rx_ring + x_head.sizeof] |
||
666 | GetRealAddr |
||
667 | mov edx, eax |
||
668 | mov ecx, RX_RING_SIZE |
||
669 | |||
670 | .next_desc: |
||
671 | mov [esi + x_head.ndesc], edx |
||
672 | |||
673 | push esi ecx |
||
674 | stdcall KernelAlloc, MAX_BUF_SIZE |
||
675 | pop ecx esi |
||
676 | |||
677 | mov [esi + x_head.skb_ptr], eax |
||
678 | GetRealAddr |
||
679 | mov [esi + x_head.buf], eax |
||
680 | mov [esi + x_head.status], DSC_OWNER_MAC |
||
681 | |||
682 | add edx, x_head.sizeof |
||
683 | add esi, x_head.sizeof |
||
684 | |||
685 | dec ecx |
||
686 | jnz .next_desc |
||
687 | |||
688 | ; complete the ring by linking the last to the first |
||
689 | |||
690 | lea eax, [device.rx_ring] |
||
691 | GetRealAddr |
||
692 | mov [device.rx_ring + x_head.sizeof*(RX_RING_SIZE - 1) + x_head.ndesc], eax |
||
693 | |||
694 | ret |
||
695 | |||
696 | |||
697 | |||
698 | align 4 |
||
699 | phy_mode_chk: |
||
700 | |||
701 | DEBUGF 1,"Checking PHY mode\n" |
||
702 | |||
703 | ; PHY Link Status Check |
||
704 | movzx eax, [device.phy_addr] |
||
705 | stdcall phy_read, eax, 1 |
||
706 | test eax, 0x4 |
||
707 | jz .ret_0x8000 |
||
708 | |||
709 | ; PHY Chip Auto-Negotiation Status |
||
710 | movzx eax, [device.phy_addr] |
||
711 | stdcall phy_read, eax, 1 |
||
712 | test eax, 0x0020 |
||
713 | jnz .auto_nego |
||
714 | |||
715 | ; Force Mode |
||
716 | movzx eax, [device.phy_addr] |
||
717 | stdcall phy_read, eax, 0 |
||
718 | test eax, 0x100 |
||
719 | jnz .ret_0x8000 |
||
720 | |||
721 | .auto_nego: |
||
722 | ; Auto Negotiation Mode |
||
723 | movzx eax, [device.phy_addr] |
||
724 | stdcall phy_read, eax, 5 |
||
725 | mov ecx, eax |
||
726 | movzx eax, [device.phy_addr] |
||
727 | stdcall phy_read, eax, 4 |
||
728 | and eax, ecx |
||
729 | test eax, 0x140 |
||
730 | jnz .ret_0x8000 |
||
731 | |||
732 | xor eax, eax |
||
733 | ret |
||
734 | |||
735 | .ret_0x8000: |
||
736 | mov eax, 0x8000 |
||
737 | ret |
||
738 | |||
739 | |||
740 | |||
741 | |||
742 | |||
743 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
744 | ;; ;; |
||
745 | ;; Transmit ;; |
||
746 | ;; ;; |
||
747 | ;; In: buffer pointer in [esp+4] ;; |
||
748 | ;; size of buffer in [esp+8] ;; |
||
749 | ;; pointer to device structure in ebx ;; |
||
750 | ;; ;; |
||
751 | ;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;;; |
||
752 | align 4 |
||
753 | transmit: |
||
754 | DEBUGF 2,"\nTransmitting packet, buffer:%x, size:%u\n", [esp+4], [esp+8] |
||
755 | mov eax, [esp+4] |
||
756 | DEBUGF 2,"To: %x-%x-%x-%x-%x-%x From: %x-%x-%x-%x-%x-%x Type:%x%x\n",\ |
||
757 | [eax+00]:2,[eax+01]:2,[eax+02]:2,[eax+03]:2,[eax+04]:2,[eax+05]:2,\ |
||
758 | [eax+06]:2,[eax+07]:2,[eax+08]:2,[eax+09]:2,[eax+10]:2,[eax+11]:2,\ |
||
759 | [eax+13]:2,[eax+12]:2 |
||
760 | |||
761 | cmp dword [esp+8], 1514 |
||
762 | ja .fail |
||
763 | cmp dword [esp+8], 60 |
||
764 | jb .fail |
||
765 | |||
766 | movzx edi, [device.cur_tx] |
||
767 | shl edi, 5 |
||
768 | add edi, ebx |
||
769 | add edi, device.tx_ring - ebx |
||
770 | |||
771 | DEBUGF 2,"TX buffer status: 0x%x\n", [edi + x_head.status]:4 |
||
772 | |||
773 | test [edi + x_head.status], DSC_OWNER_MAC ; check if buffer is available |
||
774 | jnz .wait_to_send |
||
775 | |||
776 | .do_send: |
||
777 | |||
778 | DEBUGF 2,"Sending now\n" |
||
779 | |||
780 | mov eax, [esp+4] |
||
781 | mov [edi + x_head.skb_ptr], eax |
||
782 | GetRealAddr |
||
783 | mov [edi + x_head.buf], eax |
||
784 | mov ecx, [esp+8] |
||
785 | mov [edi + x_head.len], cx |
||
786 | mov [edi + x_head.status], DSC_OWNER_MAC |
||
787 | |||
788 | ; Trigger the MAC to check the TX descriptor |
||
789 | mov ax, 0x01 |
||
790 | set_io 0 |
||
791 | set_io MTPR |
||
792 | out dx, ax |
||
793 | |||
794 | inc [device.cur_tx] |
||
795 | and [device.cur_tx], TX_RING_SIZE - 1 |
||
796 | xor eax, eax |
||
797 | |||
798 | ; Update stats |
||
799 | inc [device.packets_tx] |
||
800 | mov eax, [esp+8] |
||
801 | add dword [device.bytes_tx], eax |
||
802 | adc dword [device.bytes_tx + 4], 0 |
||
803 | |||
804 | ret 8 |
||
805 | |||
806 | .wait_to_send: |
||
807 | |||
808 | DEBUGF 2,"Waiting for TX buffer\n" |
||
809 | |||
810 | call GetTimerTicks ; returns in eax |
||
811 | lea edx, [eax + 100] |
||
812 | .l2: |
||
813 | test [edi + x_head.status], DSC_OWNER_MAC |
||
814 | jz .do_send |
||
815 | mov esi, 10 |
||
816 | call Sleep |
||
817 | call GetTimerTicks |
||
818 | cmp edx, eax |
||
819 | jb .l2 |
||
820 | |||
821 | DEBUGF 1,"Send timeout\n" |
||
822 | xor eax, eax |
||
823 | dec eax |
||
824 | .fail: |
||
825 | DEBUGF 1,"Send failed\n" |
||
4334 | hidnplayr | 826 | stdcall KernelFree, [esp+4] |
827 | or eax, -1 |
||
3545 | hidnplayr | 828 | ret 8 |
829 | |||
830 | |||
831 | |||
832 | |||
833 | |||
834 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
835 | ;; ;; |
||
836 | ;; Interrupt handler ;; |
||
837 | ;; ;; |
||
838 | ;;;;;;;;;;;;;;;;;;;;;;; |
||
839 | |||
840 | align 4 |
||
841 | int_handler: |
||
842 | |||
843 | push ebx esi edi |
||
844 | |||
845 | DEBUGF 1,"\n%s int\n", my_service |
||
846 | |||
847 | ; Find pointer of device wich made IRQ occur |
||
848 | |||
849 | mov ecx, [devices] |
||
850 | test ecx, ecx |
||
851 | jz .nothing |
||
852 | mov esi, device_list |
||
853 | .nextdevice: |
||
854 | mov ebx, [esi] |
||
855 | |||
856 | set_io 0 |
||
857 | set_io MISR |
||
858 | in ax, dx |
||
859 | out dx, ax ; send it back to ACK |
||
860 | test ax, ax |
||
861 | jnz .got_it |
||
862 | .continue: |
||
863 | add esi, 4 |
||
864 | dec ecx |
||
865 | jnz .nextdevice |
||
866 | .nothing: |
||
867 | pop edi esi ebx |
||
868 | xor eax, eax |
||
869 | |||
870 | ret ; If no device was found, abort (The irq was probably for a device, not registered to this driver) |
||
871 | |||
872 | |||
873 | ; At this point, test for all possible reasons, and handle accordingly |
||
874 | |||
875 | .got_it: |
||
876 | |||
877 | DEBUGF 1,"Device: %x Status: %x ", ebx, ax |
||
878 | |||
879 | push ax |
||
880 | |||
881 | test word [esp], RX_FINISH |
||
882 | jz .no_RX |
||
883 | |||
884 | push ebx |
||
885 | .more_RX: |
||
886 | pop ebx |
||
887 | |||
888 | ; Find the current RX descriptor |
||
889 | |||
890 | movzx edx, [device.cur_rx] |
||
891 | shl edx, 5 |
||
892 | lea edx, [device.rx_ring + edx] |
||
893 | |||
894 | ; Check the descriptor status |
||
895 | |||
896 | mov cx, [edx + x_head.status] |
||
897 | test cx, DSC_OWNER_MAC |
||
898 | jnz .no_RX |
||
899 | |||
900 | DEBUGF 2,"packet status=0x%x\n", cx |
||
901 | |||
902 | test cx, DSC_RX_ERR ; Global error status set |
||
903 | jnz .no_RX |
||
904 | |||
905 | ; Packet successfully received |
||
906 | |||
907 | movzx ecx, [edx + x_head.len] |
||
908 | and ecx, 0xFFF |
||
909 | sub ecx, 4 ; Do not count the CRC |
||
910 | |||
911 | ; Update stats |
||
912 | add dword [device.bytes_rx], ecx |
||
913 | adc dword [device.bytes_rx + 4], 0 |
||
914 | inc dword [device.packets_rx] |
||
915 | |||
916 | ; Push packet size and pointer, kernel will need it.. |
||
917 | |||
918 | push ebx |
||
919 | push .more_RX |
||
920 | |||
921 | push ecx |
||
922 | push [edx + x_head.skb_ptr] |
||
923 | |||
924 | DEBUGF 2,"packet ptr=0x%x\n", [edx + x_head.skb_ptr] |
||
925 | |||
926 | ; reset the RX descriptor |
||
927 | |||
928 | push edx |
||
929 | stdcall KernelAlloc, MAX_BUF_SIZE |
||
930 | pop edx |
||
931 | mov [edx + x_head.skb_ptr], eax |
||
932 | GetRealAddr |
||
933 | mov [edx + x_head.buf], eax |
||
934 | mov [edx + x_head.status], DSC_OWNER_MAC |
||
935 | |||
936 | ; Use next descriptor next time |
||
937 | |||
938 | inc [device.cur_rx] |
||
939 | and [device.cur_rx], RX_RING_SIZE - 1 |
||
940 | |||
941 | ; At last, send packet to kernel |
||
942 | |||
943 | jmp Eth_input |
||
944 | |||
945 | |||
946 | .no_RX: |
||
947 | |||
948 | test word [esp], TX_FINISH |
||
949 | jz .no_TX |
||
950 | |||
951 | .loop_tx: |
||
952 | movzx edi, [device.last_tx] |
||
953 | shl edi, 5 |
||
954 | lea edi, [device.tx_ring + edi] |
||
955 | |||
956 | test [edi + x_head.status], DSC_OWNER_MAC |
||
957 | jnz .no_TX |
||
958 | |||
959 | cmp [edi + x_head.skb_ptr], 0 |
||
960 | je .no_TX |
||
961 | |||
962 | DEBUGF 2,"Freeing buffer 0x%x\n", [edi + x_head.skb_ptr] |
||
963 | |||
964 | push [edi + x_head.skb_ptr] |
||
965 | mov [edi + x_head.skb_ptr], 0 |
||
966 | call KernelFree |
||
967 | |||
968 | inc [device.last_tx] |
||
969 | and [device.last_tx], TX_RING_SIZE - 1 |
||
970 | |||
971 | jmp .loop_tx |
||
972 | |||
973 | .no_TX: |
||
974 | pop ax |
||
975 | |||
976 | pop edi esi ebx |
||
977 | |||
978 | ret |
||
979 | |||
980 | |||
981 | |||
982 | |||
983 | align 4 |
||
984 | init_mac_regs: |
||
985 | |||
986 | DEBUGF 2,"initializing MAC regs\n" |
||
987 | |||
988 | ; MAC operation register |
||
989 | mov ax, 1 |
||
990 | set_io 0 |
||
991 | set_io MCR1 |
||
992 | out dx, ax |
||
993 | ; Reset MAC |
||
994 | mov ax, 2 |
||
995 | set_io MAC_SM |
||
996 | out dx, ax |
||
997 | ; Reset internal state machine |
||
998 | xor ax, ax |
||
999 | out dx, ax |
||
1000 | mov esi, 5 |
||
1001 | stdcall Sleep |
||
1002 | |||
1003 | call read_mac |
||
1004 | |||
1005 | ret |
||
1006 | |||
1007 | |||
1008 | |||
1009 | |||
1010 | ; Read a word data from PHY Chip |
||
1011 | |||
1012 | align 4 |
||
1013 | proc phy_read stdcall, phy_addr:dword, reg:dword |
||
1014 | |||
1015 | DEBUGF 2,"PHY read, addr=0x%x reg=0x%x\n", [phy_addr]:8, [reg]:8 |
||
1016 | |||
1017 | mov eax, [phy_addr] |
||
1018 | shl eax, 8 |
||
1019 | add eax, [reg] |
||
1020 | add eax, MDIO_READ |
||
1021 | set_io 0 |
||
1022 | set_io MMDIO |
||
1023 | out dx, ax |
||
1024 | |||
1025 | ;Wait for the read bit to be cleared. |
||
1026 | mov ecx, 2048 ;limit |
||
1027 | .read: |
||
1028 | in ax, dx |
||
1029 | test ax, MDIO_READ |
||
1030 | jz @f |
||
1031 | dec ecx |
||
1032 | jnz .read |
||
1033 | @@: |
||
1034 | |||
1035 | set_io MMRD |
||
1036 | in ax, dx |
||
1037 | and eax, 0xFFFF |
||
1038 | |||
1039 | DEBUGF 2,"PHY read, val=0x%x\n", eax:4 |
||
1040 | |||
1041 | ret |
||
1042 | |||
1043 | endp |
||
1044 | |||
1045 | |||
1046 | |||
1047 | |||
1048 | ; Write a word data to PHY Chip |
||
1049 | |||
1050 | align 4 |
||
1051 | proc phy_write stdcall, phy_addr:dword, reg:dword, val:dword |
||
1052 | |||
1053 | DEBUGF 2,"PHY write, addr=0x%x reg=0x%x val=0x%x\n", [phy_addr]:8, [reg]:8, [val]:8 |
||
1054 | |||
1055 | mov eax, [val] |
||
1056 | set_io 0 |
||
1057 | set_io MMWD |
||
1058 | out dx, ax |
||
1059 | |||
1060 | ;Write the command to the MDIO bus |
||
1061 | |||
1062 | mov eax, [phy_addr] |
||
1063 | shl eax, 8 |
||
1064 | add eax, [reg] |
||
1065 | add eax, MDIO_WRITE |
||
1066 | set_io MMDIO |
||
1067 | out dx, ax |
||
1068 | |||
1069 | ;Wait for the write bit to be cleared. |
||
1070 | mov ecx, 2048 ;limit |
||
1071 | .write: |
||
1072 | in ax, dx |
||
1073 | test ax, MDIO_WRITE |
||
1074 | jz @f |
||
1075 | dec ecx |
||
1076 | jnz .write |
||
1077 | @@: |
||
1078 | |||
1079 | DEBUGF 2,"PHY write ok\n" |
||
1080 | |||
1081 | ret |
||
1082 | endp |
||
1083 | |||
1084 | |||
1085 | |||
1086 | align 4 |
||
1087 | read_mac: |
||
1088 | |||
1089 | DEBUGF 2,"Reading MAC: " |
||
1090 | |||
1091 | mov cx, 3 |
||
1092 | lea edi, [device.mac] |
||
1093 | set_io 0 |
||
1094 | set_io MID_0L |
||
1095 | .mac: |
||
1096 | in ax, dx |
||
1097 | stosw |
||
1098 | inc dx |
||
1099 | inc dx |
||
1100 | dec cx |
||
1101 | jnz .mac |
||
1102 | |||
1103 | DEBUGF 2,"%x-%x-%x-%x-%x-%x\n",[edi-6]:2, [edi-5]:2, [edi-4]:2, [edi-3]:2, [edi-2]:2, [edi-1]:2 |
||
1104 | |||
1105 | ret |
||
1106 | |||
1107 | |||
1108 | |||
1109 | |||
1110 | ; End of code |
||
1111 | |||
1112 | section '.data' data readable writable align 16 ; place all uninitialized data place here |
||
1113 | align 4 ; Place all initialised data here |
||
1114 | |||
1115 | devices dd 0 |
||
1116 | version dd (DRIVER_VERSION shl 16) or (API_VERSION and 0xFFFF) |
||
1117 | my_service db 'R6040',0 ; max 16 chars include zero |
||
1118 | |||
1119 | include_debug_strings ; All data wich FDO uses will be included here |
||
1120 | |||
1121 | device_list rd MAX_DEVICES ; This list contains all pointers to device structures the driver is handling><>> |
||
1122 |