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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 6515 | serge | 1 | #define _FP_W_TYPE_SIZE 32 |
| 2 | #define _FP_W_TYPE unsigned int |
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| 3 | #define _FP_WS_TYPE signed int |
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| 4 | #define _FP_I_TYPE int |
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| 5 | |||
| 6 | #define __FP_FRAC_ADD_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ |
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| 7 | __asm__ ("add{l} {%11,%3|%3,%11}\n\t" \ |
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| 8 | "adc{l} {%9,%2|%2,%9}\n\t" \ |
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| 9 | "adc{l} {%7,%1|%1,%7}\n\t" \ |
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| 10 | "adc{l} {%5,%0|%0,%5}" \ |
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| 11 | : "=r" ((USItype) (r3)), \ |
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| 12 | "=&r" ((USItype) (r2)), \ |
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| 13 | "=&r" ((USItype) (r1)), \ |
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| 14 | "=&r" ((USItype) (r0)) \ |
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| 15 | : "%0" ((USItype) (x3)), \ |
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| 16 | "g" ((USItype) (y3)), \ |
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| 17 | "%1" ((USItype) (x2)), \ |
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| 18 | "g" ((USItype) (y2)), \ |
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| 19 | "%2" ((USItype) (x1)), \ |
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| 20 | "g" ((USItype) (y1)), \ |
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| 21 | "%3" ((USItype) (x0)), \ |
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| 22 | "g" ((USItype) (y0))) |
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| 23 | #define __FP_FRAC_ADD_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ |
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| 24 | __asm__ ("add{l} {%8,%2|%2,%8}\n\t" \ |
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| 25 | "adc{l} {%6,%1|%1,%6}\n\t" \ |
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| 26 | "adc{l} {%4,%0|%0,%4}" \ |
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| 27 | : "=r" ((USItype) (r2)), \ |
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| 28 | "=&r" ((USItype) (r1)), \ |
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| 29 | "=&r" ((USItype) (r0)) \ |
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| 30 | : "%0" ((USItype) (x2)), \ |
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| 31 | "g" ((USItype) (y2)), \ |
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| 32 | "%1" ((USItype) (x1)), \ |
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| 33 | "g" ((USItype) (y1)), \ |
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| 34 | "%2" ((USItype) (x0)), \ |
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| 35 | "g" ((USItype) (y0))) |
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| 36 | #define __FP_FRAC_SUB_4(r3,r2,r1,r0,x3,x2,x1,x0,y3,y2,y1,y0) \ |
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| 37 | __asm__ ("sub{l} {%11,%3|%3,%11}\n\t" \ |
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| 38 | "sbb{l} {%9,%2|%2,%9}\n\t" \ |
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| 39 | "sbb{l} {%7,%1|%1,%7}\n\t" \ |
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| 40 | "sbb{l} {%5,%0|%0,%5}" \ |
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| 41 | : "=r" ((USItype) (r3)), \ |
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| 42 | "=&r" ((USItype) (r2)), \ |
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| 43 | "=&r" ((USItype) (r1)), \ |
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| 44 | "=&r" ((USItype) (r0)) \ |
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| 45 | : "0" ((USItype) (x3)), \ |
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| 46 | "g" ((USItype) (y3)), \ |
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| 47 | "1" ((USItype) (x2)), \ |
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| 48 | "g" ((USItype) (y2)), \ |
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| 49 | "2" ((USItype) (x1)), \ |
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| 50 | "g" ((USItype) (y1)), \ |
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| 51 | "3" ((USItype) (x0)), \ |
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| 52 | "g" ((USItype) (y0))) |
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| 53 | #define __FP_FRAC_SUB_3(r2,r1,r0,x2,x1,x0,y2,y1,y0) \ |
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| 54 | __asm__ ("sub{l} {%8,%2|%2,%8}\n\t" \ |
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| 55 | "sbb{l} {%6,%1|%1,%6}\n\t" \ |
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| 56 | "sbb{l} {%4,%0|%0,%4}" \ |
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| 57 | : "=r" ((USItype) (r2)), \ |
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| 58 | "=&r" ((USItype) (r1)), \ |
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| 59 | "=&r" ((USItype) (r0)) \ |
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| 60 | : "0" ((USItype) (x2)), \ |
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| 61 | "g" ((USItype) (y2)), \ |
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| 62 | "1" ((USItype) (x1)), \ |
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| 63 | "g" ((USItype) (y1)), \ |
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| 64 | "2" ((USItype) (x0)), \ |
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| 65 | "g" ((USItype) (y0))) |
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| 66 | #define __FP_FRAC_ADDI_4(x3,x2,x1,x0,i) \ |
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| 67 | __asm__ ("add{l} {%4,%3|%3,%4}\n\t" \ |
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| 68 | "adc{l} {$0,%2|%2,0}\n\t" \ |
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| 69 | "adc{l} {$0,%1|%1,0}\n\t" \ |
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| 70 | "adc{l} {$0,%0|%0,0}" \ |
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| 71 | : "+r" ((USItype) (x3)), \ |
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| 72 | "+&r" ((USItype) (x2)), \ |
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| 73 | "+&r" ((USItype) (x1)), \ |
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| 74 | "+&r" ((USItype) (x0)) \ |
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| 75 | : "g" ((USItype) (i))) |
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| 76 | |||
| 77 | |||
| 78 | #define _FP_MUL_MEAT_S(R,X,Y) \ |
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| 79 | _FP_MUL_MEAT_1_wide(_FP_WFRACBITS_S,R,X,Y,umul_ppmm) |
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| 80 | #define _FP_MUL_MEAT_D(R,X,Y) \ |
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| 81 | _FP_MUL_MEAT_2_wide(_FP_WFRACBITS_D,R,X,Y,umul_ppmm) |
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| 82 | #define _FP_MUL_MEAT_Q(R,X,Y) \ |
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| 83 | _FP_MUL_MEAT_4_wide(_FP_WFRACBITS_Q,R,X,Y,umul_ppmm) |
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| 84 | |||
| 85 | #define _FP_DIV_MEAT_S(R,X,Y) _FP_DIV_MEAT_1_loop(S,R,X,Y) |
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| 86 | #define _FP_DIV_MEAT_D(R,X,Y) _FP_DIV_MEAT_2_udiv(D,R,X,Y) |
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| 87 | #define _FP_DIV_MEAT_Q(R,X,Y) _FP_DIV_MEAT_4_udiv(Q,R,X,Y) |
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| 88 | |||
| 89 | #define _FP_NANFRAC_S _FP_QNANBIT_S |
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| 90 | #define _FP_NANFRAC_D _FP_QNANBIT_D, 0 |
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| 91 | /* Even if XFmode is 12byte, we have to pad it to |
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| 92 | 16byte since soft-fp emulation is done in 16byte. */ |
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| 93 | #define _FP_NANFRAC_E _FP_QNANBIT_E, 0, 0, 0 |
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| 94 | #define _FP_NANFRAC_Q _FP_QNANBIT_Q, 0, 0, 0 |
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| 95 | |||
| 96 | #ifndef _SOFT_FLOAT |
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| 97 | #define FP_EX_SHIFT 0 |
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| 98 | |||
| 99 | #define _FP_DECL_EX \ |
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| 100 | unsigned short _fcw __attribute__ ((unused)) = FP_RND_NEAREST; |
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| 101 | |||
| 102 | #define FP_RND_NEAREST 0 |
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| 103 | #define FP_RND_ZERO 0xc00 |
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| 104 | #define FP_RND_PINF 0x800 |
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| 105 | #define FP_RND_MINF 0x400 |
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| 106 | |||
| 107 | #define FP_RND_MASK 0xc00 |
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| 108 | |||
| 109 | #define FP_INIT_ROUNDMODE \ |
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| 110 | do { \ |
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| 111 | __asm__ __volatile__ ("fnstcw\t%0" : "=m" (_fcw)); \ |
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| 112 | } while (0) |
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| 113 | #endif |