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Rev | Author | Line No. | Line |
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5221 | serge | 1 | /* Select disassembly routine for specified architecture. |
6324 | serge | 2 | Copyright (C) 1994-2015 Free Software Foundation, Inc. |
5221 | serge | 3 | |
4 | This file is part of the GNU opcodes library. |
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5 | |||
6 | This library is free software; you can redistribute it and/or modify |
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7 | it under the terms of the GNU General Public License as published by |
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8 | the Free Software Foundation; either version 3 of the License, or |
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9 | (at your option) any later version. |
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10 | |||
11 | This program is distributed in the hope that it will be useful, |
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12 | but WITHOUT ANY WARRANTY; without even the implied warranty of |
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13 | MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the |
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14 | GNU General Public License for more details. |
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15 | |||
16 | You should have received a copy of the GNU General Public License |
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17 | along with this program; if not, write to the Free Software |
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18 | Foundation, Inc., 51 Franklin Street - Fifth Floor, Boston, |
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19 | MA 02110-1301, USA. */ |
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20 | |||
21 | #include "sysdep.h" |
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22 | #include "dis-asm.h" |
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23 | |||
24 | #ifdef ARCH_all |
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25 | #define ARCH_aarch64 |
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26 | #define ARCH_alpha |
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27 | #define ARCH_arc |
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28 | #define ARCH_arm |
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29 | #define ARCH_avr |
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30 | #define ARCH_bfin |
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31 | #define ARCH_cr16 |
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32 | #define ARCH_cris |
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33 | #define ARCH_crx |
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34 | #define ARCH_d10v |
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35 | #define ARCH_d30v |
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36 | #define ARCH_dlx |
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37 | #define ARCH_epiphany |
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38 | #define ARCH_fr30 |
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39 | #define ARCH_frv |
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6324 | serge | 40 | #define ARCH_ft32 |
5221 | serge | 41 | #define ARCH_h8300 |
42 | #define ARCH_h8500 |
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43 | #define ARCH_hppa |
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44 | #define ARCH_i370 |
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45 | #define ARCH_i386 |
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46 | #define ARCH_i860 |
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47 | #define ARCH_i960 |
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48 | #define ARCH_ia64 |
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49 | #define ARCH_ip2k |
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50 | #define ARCH_iq2000 |
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51 | #define ARCH_lm32 |
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52 | #define ARCH_m32c |
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53 | #define ARCH_m32r |
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54 | #define ARCH_m68hc11 |
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55 | #define ARCH_m68hc12 |
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56 | #define ARCH_m68k |
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57 | #define ARCH_m88k |
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58 | #define ARCH_mcore |
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59 | #define ARCH_mep |
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60 | #define ARCH_metag |
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61 | #define ARCH_microblaze |
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62 | #define ARCH_mips |
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63 | #define ARCH_mmix |
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64 | #define ARCH_mn10200 |
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65 | #define ARCH_mn10300 |
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66 | #define ARCH_moxie |
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67 | #define ARCH_mt |
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68 | #define ARCH_msp430 |
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6324 | serge | 69 | #define ARCH_nds32 |
5221 | serge | 70 | #define ARCH_nios2 |
71 | #define ARCH_ns32k |
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6324 | serge | 72 | #define ARCH_or1k |
5221 | serge | 73 | #define ARCH_pdp11 |
74 | #define ARCH_pj |
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75 | #define ARCH_powerpc |
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76 | #define ARCH_rs6000 |
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77 | #define ARCH_rl78 |
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78 | #define ARCH_rx |
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79 | #define ARCH_s390 |
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80 | #define ARCH_score |
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81 | #define ARCH_sh |
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82 | #define ARCH_sparc |
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83 | #define ARCH_spu |
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84 | #define ARCH_tic30 |
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85 | #define ARCH_tic4x |
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86 | #define ARCH_tic54x |
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87 | #define ARCH_tic6x |
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88 | #define ARCH_tic80 |
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89 | #define ARCH_tilegx |
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90 | #define ARCH_tilepro |
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91 | #define ARCH_v850 |
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92 | #define ARCH_vax |
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6324 | serge | 93 | #define ARCH_visium |
5221 | serge | 94 | #define ARCH_w65 |
95 | #define ARCH_xstormy16 |
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96 | #define ARCH_xc16x |
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97 | #define ARCH_xgate |
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98 | #define ARCH_xtensa |
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99 | #define ARCH_z80 |
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100 | #define ARCH_z8k |
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101 | #define INCLUDE_SHMEDIA |
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102 | #endif |
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103 | |||
104 | #ifdef ARCH_m32c |
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105 | #include "m32c-desc.h" |
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106 | #endif |
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107 | |||
108 | disassembler_ftype |
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109 | disassembler (abfd) |
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110 | bfd *abfd; |
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111 | { |
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112 | enum bfd_architecture a = bfd_get_arch (abfd); |
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113 | disassembler_ftype disassemble; |
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114 | |||
115 | switch (a) |
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116 | { |
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117 | /* If you add a case to this table, also add it to the |
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118 | ARCH_all definition right above this function. */ |
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119 | #ifdef ARCH_aarch64 |
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120 | case bfd_arch_aarch64: |
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121 | disassemble = print_insn_aarch64; |
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122 | break; |
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123 | #endif |
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124 | #ifdef ARCH_alpha |
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125 | case bfd_arch_alpha: |
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126 | disassemble = print_insn_alpha; |
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127 | break; |
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128 | #endif |
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129 | #ifdef ARCH_arc |
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130 | case bfd_arch_arc: |
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131 | disassemble = arc_get_disassembler (abfd); |
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132 | break; |
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133 | #endif |
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134 | #ifdef ARCH_arm |
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135 | case bfd_arch_arm: |
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136 | if (bfd_big_endian (abfd)) |
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137 | disassemble = print_insn_big_arm; |
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138 | else |
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139 | disassemble = print_insn_little_arm; |
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140 | break; |
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141 | #endif |
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142 | #ifdef ARCH_avr |
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143 | case bfd_arch_avr: |
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144 | disassemble = print_insn_avr; |
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145 | break; |
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146 | #endif |
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147 | #ifdef ARCH_bfin |
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148 | case bfd_arch_bfin: |
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149 | disassemble = print_insn_bfin; |
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150 | break; |
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151 | #endif |
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152 | #ifdef ARCH_cr16 |
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153 | case bfd_arch_cr16: |
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154 | disassemble = print_insn_cr16; |
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155 | break; |
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156 | #endif |
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157 | #ifdef ARCH_cris |
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158 | case bfd_arch_cris: |
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159 | disassemble = cris_get_disassembler (abfd); |
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160 | break; |
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161 | #endif |
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162 | #ifdef ARCH_crx |
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163 | case bfd_arch_crx: |
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164 | disassemble = print_insn_crx; |
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165 | break; |
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166 | #endif |
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167 | #ifdef ARCH_d10v |
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168 | case bfd_arch_d10v: |
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169 | disassemble = print_insn_d10v; |
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170 | break; |
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171 | #endif |
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172 | #ifdef ARCH_d30v |
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173 | case bfd_arch_d30v: |
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174 | disassemble = print_insn_d30v; |
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175 | break; |
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176 | #endif |
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177 | #ifdef ARCH_dlx |
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178 | case bfd_arch_dlx: |
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179 | /* As far as I know we only handle big-endian DLX objects. */ |
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180 | disassemble = print_insn_dlx; |
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181 | break; |
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182 | #endif |
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183 | #ifdef ARCH_h8300 |
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184 | case bfd_arch_h8300: |
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185 | if (bfd_get_mach (abfd) == bfd_mach_h8300h |
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186 | || bfd_get_mach (abfd) == bfd_mach_h8300hn) |
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187 | disassemble = print_insn_h8300h; |
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188 | else if (bfd_get_mach (abfd) == bfd_mach_h8300s |
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189 | || bfd_get_mach (abfd) == bfd_mach_h8300sn |
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190 | || bfd_get_mach (abfd) == bfd_mach_h8300sx |
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191 | || bfd_get_mach (abfd) == bfd_mach_h8300sxn) |
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192 | disassemble = print_insn_h8300s; |
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193 | else |
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194 | disassemble = print_insn_h8300; |
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195 | break; |
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196 | #endif |
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197 | #ifdef ARCH_h8500 |
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198 | case bfd_arch_h8500: |
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199 | disassemble = print_insn_h8500; |
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200 | break; |
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201 | #endif |
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202 | #ifdef ARCH_hppa |
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203 | case bfd_arch_hppa: |
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204 | disassemble = print_insn_hppa; |
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205 | break; |
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206 | #endif |
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207 | #ifdef ARCH_i370 |
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208 | case bfd_arch_i370: |
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209 | disassemble = print_insn_i370; |
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210 | break; |
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211 | #endif |
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212 | #ifdef ARCH_i386 |
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213 | case bfd_arch_i386: |
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6324 | serge | 214 | case bfd_arch_iamcu: |
5221 | serge | 215 | case bfd_arch_l1om: |
216 | case bfd_arch_k1om: |
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217 | disassemble = print_insn_i386; |
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218 | break; |
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219 | #endif |
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220 | #ifdef ARCH_i860 |
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221 | case bfd_arch_i860: |
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222 | disassemble = print_insn_i860; |
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223 | break; |
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224 | #endif |
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225 | #ifdef ARCH_i960 |
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226 | case bfd_arch_i960: |
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227 | disassemble = print_insn_i960; |
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228 | break; |
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229 | #endif |
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230 | #ifdef ARCH_ia64 |
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231 | case bfd_arch_ia64: |
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232 | disassemble = print_insn_ia64; |
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233 | break; |
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234 | #endif |
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235 | #ifdef ARCH_ip2k |
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236 | case bfd_arch_ip2k: |
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237 | disassemble = print_insn_ip2k; |
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238 | break; |
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239 | #endif |
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240 | #ifdef ARCH_epiphany |
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241 | case bfd_arch_epiphany: |
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242 | disassemble = print_insn_epiphany; |
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243 | break; |
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244 | #endif |
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245 | #ifdef ARCH_fr30 |
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246 | case bfd_arch_fr30: |
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247 | disassemble = print_insn_fr30; |
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248 | break; |
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249 | #endif |
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250 | #ifdef ARCH_lm32 |
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251 | case bfd_arch_lm32: |
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252 | disassemble = print_insn_lm32; |
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253 | break; |
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254 | #endif |
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255 | #ifdef ARCH_m32r |
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256 | case bfd_arch_m32r: |
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257 | disassemble = print_insn_m32r; |
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258 | break; |
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259 | #endif |
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260 | #if defined(ARCH_m68hc11) || defined(ARCH_m68hc12) \ |
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261 | || defined(ARCH_9s12x) || defined(ARCH_m9s12xg) |
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262 | case bfd_arch_m68hc11: |
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263 | disassemble = print_insn_m68hc11; |
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264 | break; |
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265 | case bfd_arch_m68hc12: |
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266 | disassemble = print_insn_m68hc12; |
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267 | break; |
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268 | case bfd_arch_m9s12x: |
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269 | disassemble = print_insn_m9s12x; |
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270 | break; |
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271 | case bfd_arch_m9s12xg: |
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272 | disassemble = print_insn_m9s12xg; |
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273 | break; |
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274 | #endif |
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275 | #ifdef ARCH_m68k |
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276 | case bfd_arch_m68k: |
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277 | disassemble = print_insn_m68k; |
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278 | break; |
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279 | #endif |
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280 | #ifdef ARCH_m88k |
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281 | case bfd_arch_m88k: |
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282 | disassemble = print_insn_m88k; |
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283 | break; |
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284 | #endif |
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285 | #ifdef ARCH_mt |
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286 | case bfd_arch_mt: |
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287 | disassemble = print_insn_mt; |
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288 | break; |
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289 | #endif |
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290 | #ifdef ARCH_microblaze |
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291 | case bfd_arch_microblaze: |
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292 | disassemble = print_insn_microblaze; |
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293 | break; |
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294 | #endif |
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295 | #ifdef ARCH_msp430 |
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296 | case bfd_arch_msp430: |
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297 | disassemble = print_insn_msp430; |
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298 | break; |
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299 | #endif |
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6324 | serge | 300 | #ifdef ARCH_nds32 |
301 | case bfd_arch_nds32: |
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302 | disassemble = print_insn_nds32; |
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303 | break; |
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304 | #endif |
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5221 | serge | 305 | #ifdef ARCH_ns32k |
306 | case bfd_arch_ns32k: |
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307 | disassemble = print_insn_ns32k; |
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308 | break; |
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309 | #endif |
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310 | #ifdef ARCH_mcore |
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311 | case bfd_arch_mcore: |
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312 | disassemble = print_insn_mcore; |
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313 | break; |
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314 | #endif |
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315 | #ifdef ARCH_mep |
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316 | case bfd_arch_mep: |
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317 | disassemble = print_insn_mep; |
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318 | break; |
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319 | #endif |
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320 | #ifdef ARCH_metag |
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321 | case bfd_arch_metag: |
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322 | disassemble = print_insn_metag; |
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323 | break; |
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324 | #endif |
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325 | #ifdef ARCH_mips |
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326 | case bfd_arch_mips: |
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327 | if (bfd_big_endian (abfd)) |
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328 | disassemble = print_insn_big_mips; |
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329 | else |
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330 | disassemble = print_insn_little_mips; |
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331 | break; |
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332 | #endif |
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333 | #ifdef ARCH_mmix |
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334 | case bfd_arch_mmix: |
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335 | disassemble = print_insn_mmix; |
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336 | break; |
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337 | #endif |
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338 | #ifdef ARCH_mn10200 |
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339 | case bfd_arch_mn10200: |
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340 | disassemble = print_insn_mn10200; |
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341 | break; |
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342 | #endif |
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343 | #ifdef ARCH_mn10300 |
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344 | case bfd_arch_mn10300: |
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345 | disassemble = print_insn_mn10300; |
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346 | break; |
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347 | #endif |
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348 | #ifdef ARCH_nios2 |
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349 | case bfd_arch_nios2: |
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350 | if (bfd_big_endian (abfd)) |
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351 | disassemble = print_insn_big_nios2; |
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352 | else |
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353 | disassemble = print_insn_little_nios2; |
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354 | break; |
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355 | #endif |
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6324 | serge | 356 | #ifdef ARCH_or1k |
357 | case bfd_arch_or1k: |
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358 | disassemble = print_insn_or1k; |
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5221 | serge | 359 | break; |
360 | #endif |
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361 | #ifdef ARCH_pdp11 |
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362 | case bfd_arch_pdp11: |
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363 | disassemble = print_insn_pdp11; |
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364 | break; |
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365 | #endif |
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366 | #ifdef ARCH_pj |
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367 | case bfd_arch_pj: |
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368 | disassemble = print_insn_pj; |
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369 | break; |
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370 | #endif |
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371 | #ifdef ARCH_powerpc |
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372 | case bfd_arch_powerpc: |
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373 | if (bfd_big_endian (abfd)) |
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374 | disassemble = print_insn_big_powerpc; |
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375 | else |
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376 | disassemble = print_insn_little_powerpc; |
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377 | break; |
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378 | #endif |
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379 | #ifdef ARCH_rs6000 |
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380 | case bfd_arch_rs6000: |
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381 | if (bfd_get_mach (abfd) == bfd_mach_ppc_620) |
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382 | disassemble = print_insn_big_powerpc; |
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383 | else |
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384 | disassemble = print_insn_rs6000; |
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385 | break; |
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386 | #endif |
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387 | #ifdef ARCH_rl78 |
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388 | case bfd_arch_rl78: |
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6324 | serge | 389 | disassemble = rl78_get_disassembler (abfd); |
5221 | serge | 390 | break; |
391 | #endif |
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392 | #ifdef ARCH_rx |
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393 | case bfd_arch_rx: |
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394 | disassemble = print_insn_rx; |
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395 | break; |
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396 | #endif |
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397 | #ifdef ARCH_s390 |
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398 | case bfd_arch_s390: |
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399 | disassemble = print_insn_s390; |
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400 | break; |
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401 | #endif |
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402 | #ifdef ARCH_score |
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403 | case bfd_arch_score: |
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404 | if (bfd_big_endian (abfd)) |
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405 | disassemble = print_insn_big_score; |
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406 | else |
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407 | disassemble = print_insn_little_score; |
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408 | break; |
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409 | #endif |
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410 | #ifdef ARCH_sh |
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411 | case bfd_arch_sh: |
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412 | disassemble = print_insn_sh; |
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413 | break; |
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414 | #endif |
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415 | #ifdef ARCH_sparc |
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416 | case bfd_arch_sparc: |
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417 | disassemble = print_insn_sparc; |
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418 | break; |
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419 | #endif |
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420 | #ifdef ARCH_spu |
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421 | case bfd_arch_spu: |
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422 | disassemble = print_insn_spu; |
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423 | break; |
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424 | #endif |
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425 | #ifdef ARCH_tic30 |
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426 | case bfd_arch_tic30: |
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427 | disassemble = print_insn_tic30; |
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428 | break; |
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429 | #endif |
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430 | #ifdef ARCH_tic4x |
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431 | case bfd_arch_tic4x: |
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432 | disassemble = print_insn_tic4x; |
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433 | break; |
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434 | #endif |
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435 | #ifdef ARCH_tic54x |
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436 | case bfd_arch_tic54x: |
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437 | disassemble = print_insn_tic54x; |
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438 | break; |
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439 | #endif |
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440 | #ifdef ARCH_tic6x |
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441 | case bfd_arch_tic6x: |
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442 | disassemble = print_insn_tic6x; |
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443 | break; |
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444 | #endif |
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445 | #ifdef ARCH_tic80 |
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446 | case bfd_arch_tic80: |
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447 | disassemble = print_insn_tic80; |
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448 | break; |
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449 | #endif |
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6324 | serge | 450 | #ifdef ARCH_ft32 |
451 | case bfd_arch_ft32: |
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452 | disassemble = print_insn_ft32; |
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453 | break; |
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454 | #endif |
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5221 | serge | 455 | #ifdef ARCH_v850 |
456 | case bfd_arch_v850: |
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457 | case bfd_arch_v850_rh850: |
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458 | disassemble = print_insn_v850; |
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459 | break; |
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460 | #endif |
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461 | #ifdef ARCH_w65 |
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462 | case bfd_arch_w65: |
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463 | disassemble = print_insn_w65; |
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464 | break; |
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465 | #endif |
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466 | #ifdef ARCH_xgate |
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467 | case bfd_arch_xgate: |
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468 | disassemble = print_insn_xgate; |
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469 | break; |
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470 | #endif |
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471 | #ifdef ARCH_xstormy16 |
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472 | case bfd_arch_xstormy16: |
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473 | disassemble = print_insn_xstormy16; |
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474 | break; |
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475 | #endif |
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476 | #ifdef ARCH_xc16x |
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477 | case bfd_arch_xc16x: |
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478 | disassemble = print_insn_xc16x; |
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479 | break; |
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480 | #endif |
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481 | #ifdef ARCH_xtensa |
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482 | case bfd_arch_xtensa: |
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483 | disassemble = print_insn_xtensa; |
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484 | break; |
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485 | #endif |
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486 | #ifdef ARCH_z80 |
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487 | case bfd_arch_z80: |
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488 | disassemble = print_insn_z80; |
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489 | break; |
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490 | #endif |
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491 | #ifdef ARCH_z8k |
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492 | case bfd_arch_z8k: |
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493 | if (bfd_get_mach(abfd) == bfd_mach_z8001) |
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494 | disassemble = print_insn_z8001; |
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495 | else |
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496 | disassemble = print_insn_z8002; |
||
497 | break; |
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498 | #endif |
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499 | #ifdef ARCH_vax |
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500 | case bfd_arch_vax: |
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501 | disassemble = print_insn_vax; |
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502 | break; |
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503 | #endif |
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6324 | serge | 504 | #ifdef ARCH_visium |
505 | case bfd_arch_visium: |
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506 | disassemble = print_insn_visium; |
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507 | break; |
||
508 | #endif |
||
5221 | serge | 509 | #ifdef ARCH_frv |
510 | case bfd_arch_frv: |
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511 | disassemble = print_insn_frv; |
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512 | break; |
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513 | #endif |
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514 | #ifdef ARCH_moxie |
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515 | case bfd_arch_moxie: |
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516 | disassemble = print_insn_moxie; |
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517 | break; |
||
518 | #endif |
||
519 | #ifdef ARCH_iq2000 |
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520 | case bfd_arch_iq2000: |
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521 | disassemble = print_insn_iq2000; |
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522 | break; |
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523 | #endif |
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524 | #ifdef ARCH_m32c |
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525 | case bfd_arch_m32c: |
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526 | disassemble = print_insn_m32c; |
||
527 | break; |
||
528 | #endif |
||
529 | #ifdef ARCH_tilegx |
||
530 | case bfd_arch_tilegx: |
||
531 | disassemble = print_insn_tilegx; |
||
532 | break; |
||
533 | #endif |
||
534 | #ifdef ARCH_tilepro |
||
535 | case bfd_arch_tilepro: |
||
536 | disassemble = print_insn_tilepro; |
||
537 | break; |
||
538 | #endif |
||
539 | default: |
||
540 | return 0; |
||
541 | } |
||
542 | return disassemble; |
||
543 | } |
||
544 | |||
545 | void |
||
546 | disassembler_usage (stream) |
||
547 | FILE * stream ATTRIBUTE_UNUSED; |
||
548 | { |
||
549 | #ifdef ARCH_aarch64 |
||
550 | print_aarch64_disassembler_options (stream); |
||
551 | #endif |
||
552 | #ifdef ARCH_arm |
||
553 | print_arm_disassembler_options (stream); |
||
554 | #endif |
||
555 | #ifdef ARCH_mips |
||
556 | print_mips_disassembler_options (stream); |
||
557 | #endif |
||
558 | #ifdef ARCH_powerpc |
||
559 | print_ppc_disassembler_options (stream); |
||
560 | #endif |
||
561 | #ifdef ARCH_i386 |
||
562 | print_i386_disassembler_options (stream); |
||
563 | #endif |
||
564 | #ifdef ARCH_s390 |
||
565 | print_s390_disassembler_options (stream); |
||
566 | #endif |
||
567 | |||
568 | return; |
||
569 | } |
||
570 | |||
571 | void |
||
572 | disassemble_init_for_target (struct disassemble_info * info) |
||
573 | { |
||
574 | if (info == NULL) |
||
575 | return; |
||
576 | |||
577 | switch (info->arch) |
||
578 | { |
||
579 | #ifdef ARCH_aarch64 |
||
580 | case bfd_arch_aarch64: |
||
581 | info->symbol_is_valid = aarch64_symbol_is_valid; |
||
582 | info->disassembler_needs_relocs = TRUE; |
||
583 | break; |
||
584 | #endif |
||
585 | #ifdef ARCH_arm |
||
586 | case bfd_arch_arm: |
||
587 | info->symbol_is_valid = arm_symbol_is_valid; |
||
588 | info->disassembler_needs_relocs = TRUE; |
||
589 | break; |
||
590 | #endif |
||
591 | #ifdef ARCH_ia64 |
||
592 | case bfd_arch_ia64: |
||
593 | info->skip_zeroes = 16; |
||
594 | break; |
||
595 | #endif |
||
596 | #ifdef ARCH_tic4x |
||
597 | case bfd_arch_tic4x: |
||
598 | info->skip_zeroes = 32; |
||
599 | break; |
||
600 | #endif |
||
601 | #ifdef ARCH_mep |
||
602 | case bfd_arch_mep: |
||
603 | info->skip_zeroes = 256; |
||
604 | info->skip_zeroes_at_end = 0; |
||
605 | break; |
||
606 | #endif |
||
607 | #ifdef ARCH_metag |
||
608 | case bfd_arch_metag: |
||
609 | info->disassembler_needs_relocs = TRUE; |
||
610 | break; |
||
611 | #endif |
||
612 | #ifdef ARCH_m32c |
||
613 | case bfd_arch_m32c: |
||
614 | /* This processor in fact is little endian. The value set here |
||
615 | reflects the way opcodes are written in the cgen description. */ |
||
616 | info->endian = BFD_ENDIAN_BIG; |
||
617 | if (! info->insn_sets) |
||
618 | { |
||
619 | info->insn_sets = cgen_bitset_create (ISA_MAX); |
||
620 | if (info->mach == bfd_mach_m16c) |
||
621 | cgen_bitset_set (info->insn_sets, ISA_M16C); |
||
622 | else |
||
623 | cgen_bitset_set (info->insn_sets, ISA_M32C); |
||
624 | } |
||
625 | break; |
||
626 | #endif |
||
627 | #ifdef ARCH_powerpc |
||
628 | case bfd_arch_powerpc: |
||
629 | #endif |
||
630 | #ifdef ARCH_rs6000 |
||
631 | case bfd_arch_rs6000: |
||
632 | #endif |
||
633 | #if defined (ARCH_powerpc) || defined (ARCH_rs6000) |
||
634 | disassemble_init_powerpc (info); |
||
635 | break; |
||
636 | #endif |
||
637 | default: |
||
638 | break; |
||
639 | } |
||
640 | } |