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/* -*- mode: C; c-file-style: "k&r"; tab-width 4; indent-tabs-mode: t; -*- */
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/*
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 * Copyright (C) 2013 Rob Clark 
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
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 * SOFTWARE.
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 *
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 * Authors:
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 *    Rob Clark 
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 */
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#ifndef FD3_PROGRAM_H_
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#define FD3_PROGRAM_H_
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#include "pipe/p_context.h"
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#include "freedreno_context.h"
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#include "ir-a3xx.h"
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#include "disasm.h"
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struct fd3_shader_stateobj {
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	enum shader_t type;
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	struct fd_bo *bo;
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	struct ir3_shader_info info;
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	struct ir3_shader *ir;
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	/* is shader using (or more precisely, is color_regid) half-
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	 * precision register?
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	 */
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	bool half_precision;
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	/* special output register locations: */
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	uint8_t pos_regid, psize_regid, color_regid;
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	/* the instructions length is in units of instruction groups
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	 * (4 instructions, 8 dwords):
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	 */
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	unsigned instrlen;
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	/* the constants length is in units of vec4's, and is the sum of
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	 * the uniforms and the built-in compiler constants
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	 */
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	unsigned constlen;
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	/* About Linkage:
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	 *   + Let the frag shader determine the position/compmask for the
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	 *     varyings, since it is the place where we know if the varying
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	 *     is actually used, and if so, which components are used.  So
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	 *     what the hw calls "outloc" is taken from the "inloc" of the
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	 *     frag shader.
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	 *   + From the vert shader, we only need the output regid
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	 */
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	/* varyings/outputs: */
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	unsigned outputs_count;
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	struct {
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		uint8_t regid;
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	} outputs[16];
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	/* vertices/inputs: */
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	unsigned inputs_count;
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	struct {
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		uint8_t regid;
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		uint8_t compmask;
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		/* in theory inloc of fs should match outloc of vs: */
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		uint8_t inloc;
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	} inputs[16];
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	unsigned total_in;       /* sum of inputs (scalar) */
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	/* samplers: */
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	unsigned samplers_count;
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	/* const reg # of first immediate, ie. 1 == c1
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	 * (not regid, because TGSI thinks in terms of vec4 registers,
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	 * not scalar registers)
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	 */
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	unsigned first_immediate;
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	unsigned immediates_count;
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	struct {
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		uint32_t val[4];
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	} immediates[64];
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	/* so far, only used for blit_prog shader.. values for
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	 * VPC_VARYING_INTERP[i].MODE and VPC_VARYING_PS_REPL[i].MODE
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	 */
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	uint32_t vinterp[4], vpsrepl[4];
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};
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void fd3_program_emit(struct fd_ringbuffer *ring,
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		struct fd_program_stateobj *prog);
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void fd3_prog_init(struct pipe_context *pctx);
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void fd3_prog_fini(struct pipe_context *pctx);
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#endif /* FD3_PROGRAM_H_ */