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5564 | serge | 1 | /************************************************************************** |
2 | |||
3 | Copyright 2000, 2001 ATI Technologies Inc., Ontario, Canada, and |
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4 | VMware, Inc. |
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5 | |||
6 | All Rights Reserved. |
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7 | |||
8 | Permission is hereby granted, free of charge, to any person obtaining |
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9 | a copy of this software and associated documentation files (the |
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10 | "Software"), to deal in the Software without restriction, including |
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11 | without limitation the rights to use, copy, modify, merge, publish, |
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12 | distribute, sublicense, and/or sell copies of the Software, and to |
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13 | permit persons to whom the Software is furnished to do so, subject to |
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14 | the following conditions: |
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15 | |||
16 | The above copyright notice and this permission notice (including the |
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17 | next paragraph) shall be included in all copies or substantial |
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18 | portions of the Software. |
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19 | |||
20 | THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, |
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21 | EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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22 | MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. |
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23 | IN NO EVENT SHALL THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE |
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24 | LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION |
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25 | OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION |
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26 | WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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27 | |||
28 | **************************************************************************/ |
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29 | |||
30 | /* |
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31 | * Authors: |
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32 | * Keith Whitwell |
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33 | */ |
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34 | |||
35 | #include "main/glheader.h" |
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36 | #include "main/imports.h" |
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37 | #include "main/mtypes.h" |
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38 | #include "main/macros.h" |
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39 | |||
40 | #include "swrast_setup/swrast_setup.h" |
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41 | #include "math/m_translate.h" |
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42 | #include "tnl/tnl.h" |
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43 | |||
44 | #include "radeon_context.h" |
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45 | #include "radeon_ioctl.h" |
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46 | #include "radeon_state.h" |
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47 | #include "radeon_swtcl.h" |
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48 | #include "radeon_maos.h" |
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49 | #include "radeon_tcl.h" |
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50 | |||
51 | static void emit_s0_vec(uint32_t *out, GLvoid *data, int stride, int count) |
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52 | { |
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53 | int i; |
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54 | if (RADEON_DEBUG & RADEON_VERTS) |
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55 | fprintf(stderr, "%s count %d stride %d\n", |
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56 | __func__, count, stride); |
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57 | |||
58 | for (i = 0; i < count; i++) { |
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59 | out[0] = *(int *)data; |
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60 | out[1] = 0; |
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61 | out += 2; |
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62 | data += stride; |
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63 | } |
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64 | } |
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65 | |||
66 | static void emit_stq_vec(uint32_t *out, GLvoid *data, int stride, int count) |
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67 | { |
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68 | int i; |
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69 | |||
70 | if (RADEON_DEBUG & RADEON_VERTS) |
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71 | fprintf(stderr, "%s count %d stride %d\n", |
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72 | __func__, count, stride); |
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73 | |||
74 | for (i = 0; i < count; i++) { |
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75 | out[0] = *(int *)data; |
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76 | out[1] = *(int *)(data+4); |
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77 | out[2] = *(int *)(data+12); |
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78 | out += 3; |
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79 | data += stride; |
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80 | } |
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81 | } |
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82 | |||
83 | static void emit_tex_vector(struct gl_context *ctx, struct radeon_aos *aos, |
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84 | GLvoid *data, int size, int stride, int count) |
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85 | { |
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86 | radeonContextPtr rmesa = RADEON_CONTEXT(ctx); |
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87 | int emitsize; |
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88 | uint32_t *out; |
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89 | |||
90 | if (RADEON_DEBUG & RADEON_VERTS) |
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91 | fprintf(stderr, "%s %d/%d\n", __func__, count, size); |
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92 | |||
93 | switch (size) { |
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94 | case 4: emitsize = 3; break; |
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95 | case 3: emitsize = 3; break; |
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96 | default: emitsize = 2; break; |
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97 | } |
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98 | |||
99 | |||
100 | if (stride == 0) { |
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101 | radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * 4, 32); |
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102 | count = 1; |
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103 | aos->stride = 0; |
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104 | } |
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105 | else { |
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106 | radeonAllocDmaRegion(rmesa, &aos->bo, &aos->offset, emitsize * count * 4, 32); |
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107 | aos->stride = emitsize; |
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108 | } |
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109 | |||
110 | aos->components = emitsize; |
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111 | aos->count = count; |
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112 | |||
113 | /* Emit the data |
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114 | */ |
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115 | radeon_bo_map(aos->bo, 1); |
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116 | out = (uint32_t*)((char*)aos->bo->ptr + aos->offset); |
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117 | switch (size) { |
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118 | case 1: |
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119 | emit_s0_vec( out, data, stride, count ); |
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120 | break; |
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121 | case 2: |
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122 | radeonEmitVec8( out, data, stride, count ); |
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123 | break; |
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124 | case 3: |
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125 | radeonEmitVec12( out, data, stride, count ); |
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126 | break; |
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127 | case 4: |
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128 | emit_stq_vec( out, data, stride, count ); |
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129 | break; |
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130 | default: |
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131 | assert(0); |
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132 | exit(1); |
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133 | break; |
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134 | } |
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135 | radeon_bo_unmap(aos->bo); |
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136 | } |
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137 | |||
138 | |||
139 | |||
140 | |||
141 | /* Emit any changed arrays to new GART memory, re-emit a packet to |
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142 | * update the arrays. |
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143 | */ |
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144 | void radeonEmitArrays( struct gl_context *ctx, GLuint inputs ) |
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145 | { |
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146 | r100ContextPtr rmesa = R100_CONTEXT( ctx ); |
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147 | struct vertex_buffer *VB = &TNL_CONTEXT( ctx )->vb; |
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148 | GLuint nr = 0; |
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149 | GLuint vfmt = 0; |
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150 | GLuint count = VB->Count; |
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151 | GLuint vtx, unit; |
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152 | |||
153 | #if 0 |
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154 | if (RADEON_DEBUG & RADEON_VERTS) |
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155 | _tnl_print_vert_flags( __func__, inputs ); |
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156 | #endif |
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157 | |||
158 | if (1) { |
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159 | if (!rmesa->tcl.obj.buf) |
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160 | rcommon_emit_vector( ctx, |
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161 | &(rmesa->tcl.aos[nr]), |
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162 | (char *)VB->AttribPtr[_TNL_ATTRIB_POS]->data, |
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163 | VB->AttribPtr[_TNL_ATTRIB_POS]->size, |
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164 | VB->AttribPtr[_TNL_ATTRIB_POS]->stride, |
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165 | count); |
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166 | |||
167 | switch( VB->AttribPtr[_TNL_ATTRIB_POS]->size ) { |
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168 | case 4: vfmt |= RADEON_CP_VC_FRMT_W0; |
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169 | case 3: vfmt |= RADEON_CP_VC_FRMT_Z; |
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170 | case 2: vfmt |= RADEON_CP_VC_FRMT_XY; |
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171 | default: |
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172 | break; |
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173 | } |
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174 | nr++; |
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175 | } |
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176 | |||
177 | |||
178 | if (inputs & VERT_BIT_NORMAL) { |
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179 | if (!rmesa->tcl.norm.buf) |
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180 | rcommon_emit_vector( ctx, |
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181 | &(rmesa->tcl.aos[nr]), |
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182 | (char *)VB->AttribPtr[_TNL_ATTRIB_NORMAL]->data, |
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183 | 3, |
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184 | VB->AttribPtr[_TNL_ATTRIB_NORMAL]->stride, |
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185 | count); |
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186 | |||
187 | vfmt |= RADEON_CP_VC_FRMT_N0; |
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188 | nr++; |
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189 | } |
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190 | |||
191 | if (inputs & VERT_BIT_COLOR0) { |
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192 | int emitsize; |
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193 | if (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->size == 4 && |
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194 | (VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride != 0 || |
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195 | VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data[0][3] != 1.0)) { |
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196 | vfmt |= RADEON_CP_VC_FRMT_FPCOLOR | RADEON_CP_VC_FRMT_FPALPHA; |
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197 | emitsize = 4; |
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198 | } |
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199 | |||
200 | else { |
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201 | vfmt |= RADEON_CP_VC_FRMT_FPCOLOR; |
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202 | emitsize = 3; |
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203 | } |
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204 | |||
205 | if (!rmesa->tcl.rgba.buf) |
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206 | rcommon_emit_vector( ctx, |
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207 | &(rmesa->tcl.aos[nr]), |
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208 | (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR0]->data, |
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209 | emitsize, |
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210 | VB->AttribPtr[_TNL_ATTRIB_COLOR0]->stride, |
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211 | count); |
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212 | |||
213 | nr++; |
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214 | } |
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215 | |||
216 | |||
217 | if (inputs & VERT_BIT_COLOR1) { |
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218 | if (!rmesa->tcl.spec.buf) { |
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219 | |||
220 | rcommon_emit_vector( ctx, |
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221 | &(rmesa->tcl.aos[nr]), |
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222 | (char *)VB->AttribPtr[_TNL_ATTRIB_COLOR1]->data, |
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223 | 3, |
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224 | VB->AttribPtr[_TNL_ATTRIB_COLOR1]->stride, |
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225 | count); |
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226 | } |
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227 | |||
228 | vfmt |= RADEON_CP_VC_FRMT_FPSPEC; |
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229 | nr++; |
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230 | } |
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231 | |||
232 | /* FIXME: not sure if this is correct. May need to stitch this together with |
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233 | secondary color. It seems odd that for primary color color and alpha values |
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234 | are emitted together but for secondary color not. */ |
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235 | if (inputs & VERT_BIT_FOG) { |
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236 | if (!rmesa->tcl.fog.buf) |
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237 | rcommon_emit_vecfog( ctx, |
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238 | &(rmesa->tcl.aos[nr]), |
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239 | (char *)VB->AttribPtr[_TNL_ATTRIB_FOG]->data, |
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240 | VB->AttribPtr[_TNL_ATTRIB_FOG]->stride, |
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241 | count); |
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242 | |||
243 | vfmt |= RADEON_CP_VC_FRMT_FPFOG; |
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244 | nr++; |
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245 | } |
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246 | |||
247 | |||
248 | vtx = (rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] & |
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249 | ~(RADEON_TCL_VTX_Q0|RADEON_TCL_VTX_Q1|RADEON_TCL_VTX_Q2)); |
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250 | |||
251 | for (unit = 0; unit < ctx->Const.MaxTextureUnits; unit++) { |
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252 | if (inputs & VERT_BIT_TEX(unit)) { |
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253 | if (!rmesa->tcl.tex[unit].buf) |
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254 | emit_tex_vector( ctx, |
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255 | &(rmesa->tcl.aos[nr]), |
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256 | (char *)VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->data, |
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257 | VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size, |
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258 | VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->stride, |
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259 | count ); |
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260 | nr++; |
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261 | |||
262 | vfmt |= RADEON_ST_BIT(unit); |
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263 | /* assume we need the 3rd coord if texgen is active for r/q OR at least |
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264 | 3 coords are submitted. This may not be 100% correct */ |
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265 | if (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) { |
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266 | vtx |= RADEON_Q_BIT(unit); |
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267 | vfmt |= RADEON_Q_BIT(unit); |
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268 | } |
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269 | if ( (ctx->Texture.Unit[unit].TexGenEnabled & (R_BIT | Q_BIT)) ) |
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270 | vtx |= RADEON_Q_BIT(unit); |
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271 | else if ((VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size >= 3) && |
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272 | (!ctx->Texture.Unit[unit]._Current || |
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273 | ctx->Texture.Unit[unit]._Current->Target != GL_TEXTURE_CUBE_MAP)) { |
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274 | GLuint swaptexmatcol = (VB->AttribPtr[_TNL_ATTRIB_TEX0 + unit]->size - 3); |
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275 | if (((rmesa->NeedTexMatrix >> unit) & 1) && |
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276 | (swaptexmatcol != ((rmesa->TexMatColSwap >> unit) & 1))) |
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277 | radeonUploadTexMatrix( rmesa, unit, swaptexmatcol ) ; |
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278 | } |
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279 | } |
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280 | } |
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281 | |||
282 | if (vtx != rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT]) { |
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283 | RADEON_STATECHANGE( rmesa, tcl ); |
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284 | rmesa->hw.tcl.cmd[TCL_OUTPUT_VTXFMT] = vtx; |
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285 | } |
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286 | |||
287 | rmesa->tcl.nr_aos_components = nr; |
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288 | rmesa->tcl.vertex_format = vfmt; |
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289 | }>>> |
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290 |