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| Rev | Author | Line No. | Line |
|---|---|---|---|
| 5564 | serge | 1 | /* |
| 2 | * Copyright © 2015 Intel Corporation |
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| 3 | * |
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| 4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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| 5 | * copy of this software and associated documentation files (the "Software"), |
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| 6 | * to deal in the Software without restriction, including without limitation |
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| 7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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| 8 | * and/or sell copies of the Software, and to permit persons to whom the |
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| 9 | * Software is furnished to do so, subject to the following conditions: |
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| 10 | * |
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| 11 | * The above copyright notice and this permission notice (including the next |
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| 12 | * paragraph) shall be included in all copies or substantial portions of the |
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| 13 | * Software. |
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| 14 | * |
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| 15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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| 16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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| 17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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| 18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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| 19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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| 20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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| 21 | * IN THE SOFTWARE. |
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| 22 | */ |
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| 23 | |||
| 24 | #include |
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| 25 | #include "brw_fs.h" |
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| 26 | #include "brw_cfg.h" |
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| 27 | #include "program/program.h" |
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| 28 | |||
| 29 | class cmod_propagation_test : public ::testing::Test { |
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| 30 | virtual void SetUp(); |
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| 31 | |||
| 32 | public: |
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| 33 | struct brw_context *brw; |
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| 34 | struct brw_device_info *devinfo; |
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| 35 | struct gl_context *ctx; |
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| 36 | struct brw_wm_prog_data *prog_data; |
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| 37 | struct gl_shader_program *shader_prog; |
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| 38 | struct brw_fragment_program *fp; |
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| 39 | fs_visitor *v; |
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| 40 | }; |
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| 41 | |||
| 42 | class cmod_propagation_fs_visitor : public fs_visitor |
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| 43 | { |
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| 44 | public: |
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| 45 | cmod_propagation_fs_visitor(struct brw_context *brw, |
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| 46 | struct brw_wm_prog_data *prog_data, |
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| 47 | struct gl_shader_program *shader_prog) |
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| 48 | : fs_visitor(brw, NULL, MESA_SHADER_FRAGMENT, NULL, &prog_data->base, |
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| 49 | shader_prog, (struct gl_program *) NULL, 8) {} |
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| 50 | }; |
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| 51 | |||
| 52 | |||
| 53 | void cmod_propagation_test::SetUp() |
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| 54 | { |
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| 55 | brw = (struct brw_context *)calloc(1, sizeof(*brw)); |
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| 56 | devinfo = (struct brw_device_info *)calloc(1, sizeof(*brw)); |
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| 57 | brw->intelScreen = (struct intel_screen *)calloc(1, sizeof(*brw->intelScreen)); |
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| 58 | brw->intelScreen->devinfo = devinfo; |
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| 59 | ctx = &brw->ctx; |
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| 60 | |||
| 61 | fp = ralloc(NULL, struct brw_fragment_program); |
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| 62 | prog_data = ralloc(NULL, struct brw_wm_prog_data); |
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| 63 | shader_prog = ralloc(NULL, struct gl_shader_program); |
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| 64 | |||
| 65 | v = new cmod_propagation_fs_visitor(brw, prog_data, shader_prog); |
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| 66 | |||
| 67 | _mesa_init_fragment_program(ctx, &fp->program, GL_FRAGMENT_SHADER, 0); |
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| 68 | |||
| 69 | brw->gen = devinfo->gen = 4; |
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| 70 | } |
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| 71 | |||
| 72 | static fs_inst * |
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| 73 | instruction(bblock_t *block, int num) |
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| 74 | { |
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| 75 | fs_inst *inst = (fs_inst *)block->start(); |
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| 76 | for (int i = 0; i < num; i++) { |
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| 77 | inst = (fs_inst *)inst->next; |
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| 78 | } |
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| 79 | return inst; |
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| 80 | } |
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| 81 | |||
| 82 | static bool |
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| 83 | cmod_propagation(fs_visitor *v) |
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| 84 | { |
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| 85 | const bool print = false; |
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| 86 | |||
| 87 | if (print) { |
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| 88 | fprintf(stderr, "= Before =\n"); |
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| 89 | v->cfg->dump(v); |
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| 90 | } |
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| 91 | |||
| 92 | bool ret = v->opt_cmod_propagation(); |
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| 93 | |||
| 94 | if (print) { |
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| 95 | fprintf(stderr, "\n= After =\n"); |
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| 96 | v->cfg->dump(v); |
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| 97 | } |
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| 98 | |||
| 99 | return ret; |
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| 100 | } |
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| 101 | |||
| 102 | TEST_F(cmod_propagation_test, basic) |
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| 103 | { |
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| 104 | fs_reg dest = v->vgrf(glsl_type::float_type); |
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| 105 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 106 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 107 | fs_reg zero(0.0f); |
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| 108 | v->emit(BRW_OPCODE_ADD, dest, src0, src1); |
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| 109 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, zero) |
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| 110 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 111 | |||
| 112 | /* = Before = |
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| 113 | * |
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| 114 | * 0: add(8) dest src0 src1 |
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| 115 | * 1: cmp.ge.f0(8) null dest 0.0f |
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| 116 | * |
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| 117 | * = After = |
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| 118 | * 0: add.ge.f0(8) dest src0 src1 |
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| 119 | */ |
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| 120 | |||
| 121 | v->calculate_cfg(); |
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| 122 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 123 | |||
| 124 | EXPECT_EQ(0, block0->start_ip); |
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| 125 | EXPECT_EQ(1, block0->end_ip); |
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| 126 | |||
| 127 | EXPECT_TRUE(cmod_propagation(v)); |
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| 128 | EXPECT_EQ(0, block0->start_ip); |
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| 129 | EXPECT_EQ(0, block0->end_ip); |
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| 130 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 131 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod); |
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| 132 | } |
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| 133 | |||
| 134 | TEST_F(cmod_propagation_test, cmp_nonzero) |
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| 135 | { |
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| 136 | fs_reg dest = v->vgrf(glsl_type::float_type); |
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| 137 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 138 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 139 | fs_reg nonzero(1.0f); |
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| 140 | v->emit(BRW_OPCODE_ADD, dest, src0, src1); |
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| 141 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, nonzero) |
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| 142 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 143 | |||
| 144 | /* = Before = |
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| 145 | * |
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| 146 | * 0: add(8) dest src0 src1 |
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| 147 | * 1: cmp.ge.f0(8) null dest 1.0f |
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| 148 | * |
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| 149 | * = After = |
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| 150 | * (no changes) |
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| 151 | */ |
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| 152 | |||
| 153 | v->calculate_cfg(); |
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| 154 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 155 | |||
| 156 | EXPECT_EQ(0, block0->start_ip); |
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| 157 | EXPECT_EQ(1, block0->end_ip); |
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| 158 | |||
| 159 | EXPECT_FALSE(cmod_propagation(v)); |
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| 160 | EXPECT_EQ(0, block0->start_ip); |
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| 161 | EXPECT_EQ(1, block0->end_ip); |
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| 162 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 163 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode); |
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| 164 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); |
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| 165 | } |
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| 166 | |||
| 167 | TEST_F(cmod_propagation_test, non_cmod_instruction) |
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| 168 | { |
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| 169 | fs_reg dest = v->vgrf(glsl_type::uint_type); |
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| 170 | fs_reg src0 = v->vgrf(glsl_type::uint_type); |
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| 171 | fs_reg zero(0u); |
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| 172 | v->emit(BRW_OPCODE_FBL, dest, src0); |
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| 173 | v->emit(BRW_OPCODE_CMP, v->reg_null_ud, dest, zero) |
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| 174 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 175 | |||
| 176 | /* = Before = |
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| 177 | * |
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| 178 | * 0: fbl(8) dest src0 |
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| 179 | * 1: cmp.ge.f0(8) null dest 0u |
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| 180 | * |
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| 181 | * = After = |
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| 182 | * (no changes) |
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| 183 | */ |
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| 184 | |||
| 185 | v->calculate_cfg(); |
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| 186 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 187 | |||
| 188 | EXPECT_EQ(0, block0->start_ip); |
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| 189 | EXPECT_EQ(1, block0->end_ip); |
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| 190 | |||
| 191 | EXPECT_FALSE(cmod_propagation(v)); |
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| 192 | EXPECT_EQ(0, block0->start_ip); |
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| 193 | EXPECT_EQ(1, block0->end_ip); |
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| 194 | EXPECT_EQ(BRW_OPCODE_FBL, instruction(block0, 0)->opcode); |
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| 195 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode); |
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| 196 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); |
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| 197 | } |
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| 198 | |||
| 199 | TEST_F(cmod_propagation_test, intervening_flag_write) |
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| 200 | { |
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| 201 | fs_reg dest = v->vgrf(glsl_type::float_type); |
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| 202 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 203 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 204 | fs_reg src2 = v->vgrf(glsl_type::float_type); |
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| 205 | fs_reg zero(0.0f); |
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| 206 | v->emit(BRW_OPCODE_ADD, dest, src0, src1); |
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| 207 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, src2, zero) |
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| 208 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 209 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, zero) |
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| 210 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 211 | |||
| 212 | /* = Before = |
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| 213 | * |
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| 214 | * 0: add(8) dest src0 src1 |
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| 215 | * 1: cmp.ge.f0(8) null src2 0.0f |
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| 216 | * 2: cmp.ge.f0(8) null dest 0.0f |
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| 217 | * |
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| 218 | * = After = |
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| 219 | * (no changes) |
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| 220 | */ |
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| 221 | |||
| 222 | v->calculate_cfg(); |
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| 223 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 224 | |||
| 225 | EXPECT_EQ(0, block0->start_ip); |
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| 226 | EXPECT_EQ(2, block0->end_ip); |
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| 227 | |||
| 228 | EXPECT_FALSE(cmod_propagation(v)); |
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| 229 | EXPECT_EQ(0, block0->start_ip); |
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| 230 | EXPECT_EQ(2, block0->end_ip); |
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| 231 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 232 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode); |
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| 233 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); |
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| 234 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode); |
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| 235 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod); |
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| 236 | } |
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| 237 | |||
| 238 | TEST_F(cmod_propagation_test, intervening_flag_read) |
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| 239 | { |
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| 240 | fs_reg dest0 = v->vgrf(glsl_type::float_type); |
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| 241 | fs_reg dest1 = v->vgrf(glsl_type::float_type); |
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| 242 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 243 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 244 | fs_reg src2 = v->vgrf(glsl_type::float_type); |
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| 245 | fs_reg zero(0.0f); |
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| 246 | v->emit(BRW_OPCODE_ADD, dest0, src0, src1); |
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| 247 | v->emit(BRW_OPCODE_SEL, dest1, src2, zero) |
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| 248 | ->predicate = BRW_PREDICATE_NORMAL; |
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| 249 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest0, zero) |
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| 250 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 251 | |||
| 252 | /* = Before = |
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| 253 | * |
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| 254 | * 0: add(8) dest0 src0 src1 |
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| 255 | * 1: (+f0) sel(8) dest1 src2 0.0f |
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| 256 | * 2: cmp.ge.f0(8) null dest0 0.0f |
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| 257 | * |
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| 258 | * = After = |
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| 259 | * (no changes) |
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| 260 | */ |
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| 261 | |||
| 262 | v->calculate_cfg(); |
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| 263 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 264 | |||
| 265 | EXPECT_EQ(0, block0->start_ip); |
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| 266 | EXPECT_EQ(2, block0->end_ip); |
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| 267 | |||
| 268 | EXPECT_FALSE(cmod_propagation(v)); |
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| 269 | EXPECT_EQ(0, block0->start_ip); |
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| 270 | EXPECT_EQ(2, block0->end_ip); |
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| 271 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 272 | EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode); |
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| 273 | EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate); |
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| 274 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode); |
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| 275 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod); |
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| 276 | } |
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| 277 | |||
| 278 | TEST_F(cmod_propagation_test, intervening_dest_write) |
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| 279 | { |
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| 280 | fs_reg dest = v->vgrf(glsl_type::vec4_type); |
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| 281 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 282 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 283 | fs_reg src2 = v->vgrf(glsl_type::vec2_type); |
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| 284 | fs_reg zero(0.0f); |
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| 285 | v->emit(BRW_OPCODE_ADD, offset(dest, 2), src0, src1); |
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| 286 | v->emit(SHADER_OPCODE_TEX, dest, src2) |
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| 287 | ->regs_written = 4; |
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| 288 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, offset(dest, 2), zero) |
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| 289 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 290 | |||
| 291 | /* = Before = |
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| 292 | * |
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| 293 | * 0: add(8) dest+2 src0 src1 |
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| 294 | * 1: tex(8) rlen 4 dest+0 src2 |
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| 295 | * 2: cmp.ge.f0(8) null dest+2 0.0f |
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| 296 | * |
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| 297 | * = After = |
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| 298 | * (no changes) |
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| 299 | */ |
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| 300 | |||
| 301 | v->calculate_cfg(); |
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| 302 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 303 | |||
| 304 | EXPECT_EQ(0, block0->start_ip); |
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| 305 | EXPECT_EQ(2, block0->end_ip); |
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| 306 | |||
| 307 | EXPECT_FALSE(cmod_propagation(v)); |
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| 308 | EXPECT_EQ(0, block0->start_ip); |
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| 309 | EXPECT_EQ(2, block0->end_ip); |
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| 310 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 311 | EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod); |
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| 312 | EXPECT_EQ(SHADER_OPCODE_TEX, instruction(block0, 1)->opcode); |
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| 313 | EXPECT_EQ(BRW_CONDITIONAL_NONE, instruction(block0, 0)->conditional_mod); |
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| 314 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 2)->opcode); |
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| 315 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 2)->conditional_mod); |
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| 316 | } |
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| 317 | |||
| 318 | TEST_F(cmod_propagation_test, intervening_flag_read_same_value) |
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| 319 | { |
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| 320 | fs_reg dest0 = v->vgrf(glsl_type::float_type); |
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| 321 | fs_reg dest1 = v->vgrf(glsl_type::float_type); |
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| 322 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 323 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 324 | fs_reg src2 = v->vgrf(glsl_type::float_type); |
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| 325 | fs_reg zero(0.0f); |
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| 326 | v->emit(BRW_OPCODE_ADD, dest0, src0, src1) |
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| 327 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 328 | v->emit(BRW_OPCODE_SEL, dest1, src2, zero) |
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| 329 | ->predicate = BRW_PREDICATE_NORMAL; |
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| 330 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest0, zero) |
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| 331 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 332 | |||
| 333 | /* = Before = |
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| 334 | * |
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| 335 | * 0: add.ge.f0(8) dest0 src0 src1 |
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| 336 | * 1: (+f0) sel(8) dest1 src2 0.0f |
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| 337 | * 2: cmp.ge.f0(8) null dest0 0.0f |
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| 338 | * |
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| 339 | * = After = |
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| 340 | * 0: add.ge.f0(8) dest0 src0 src1 |
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| 341 | * 1: (+f0) sel(8) dest1 src2 0.0f |
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| 342 | */ |
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| 343 | |||
| 344 | v->calculate_cfg(); |
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| 345 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 346 | |||
| 347 | EXPECT_EQ(0, block0->start_ip); |
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| 348 | EXPECT_EQ(2, block0->end_ip); |
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| 349 | |||
| 350 | EXPECT_TRUE(cmod_propagation(v)); |
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| 351 | EXPECT_EQ(0, block0->start_ip); |
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| 352 | EXPECT_EQ(1, block0->end_ip); |
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| 353 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 354 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod); |
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| 355 | EXPECT_EQ(BRW_OPCODE_SEL, instruction(block0, 1)->opcode); |
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| 356 | EXPECT_EQ(BRW_PREDICATE_NORMAL, instruction(block0, 1)->predicate); |
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| 357 | } |
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| 358 | |||
| 359 | TEST_F(cmod_propagation_test, negate) |
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| 360 | { |
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| 361 | fs_reg dest = v->vgrf(glsl_type::float_type); |
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| 362 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 363 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 364 | fs_reg zero(0.0f); |
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| 365 | v->emit(BRW_OPCODE_ADD, dest, src0, src1); |
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| 366 | dest.negate = true; |
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| 367 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, dest, zero) |
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| 368 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 369 | |||
| 370 | /* = Before = |
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| 371 | * |
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| 372 | * 0: add(8) dest src0 src1 |
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| 373 | * 1: cmp.ge.f0(8) null -dest 0.0f |
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| 374 | * |
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| 375 | * = After = |
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| 376 | * 0: add.le.f0(8) dest src0 src1 |
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| 377 | */ |
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| 378 | |||
| 379 | v->calculate_cfg(); |
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| 380 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 381 | |||
| 382 | EXPECT_EQ(0, block0->start_ip); |
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| 383 | EXPECT_EQ(1, block0->end_ip); |
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| 384 | |||
| 385 | EXPECT_TRUE(cmod_propagation(v)); |
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| 386 | EXPECT_EQ(0, block0->start_ip); |
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| 387 | EXPECT_EQ(0, block0->end_ip); |
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| 388 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 389 | EXPECT_EQ(BRW_CONDITIONAL_LE, instruction(block0, 0)->conditional_mod); |
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| 390 | } |
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| 391 | |||
| 392 | TEST_F(cmod_propagation_test, movnz) |
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| 393 | { |
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| 394 | fs_reg dest = v->vgrf(glsl_type::float_type); |
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| 395 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 396 | fs_reg src1 = v->vgrf(glsl_type::float_type); |
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| 397 | v->emit(BRW_OPCODE_CMP, dest, src0, src1) |
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| 398 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 399 | v->emit(BRW_OPCODE_MOV, v->reg_null_f, dest) |
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| 400 | ->conditional_mod = BRW_CONDITIONAL_NZ; |
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| 401 | |||
| 402 | /* = Before = |
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| 403 | * |
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| 404 | * 0: cmp.ge.f0(8) dest src0 src1 |
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| 405 | * 1: mov.nz.f0(8) null dest |
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| 406 | * |
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| 407 | * = After = |
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| 408 | * 0: cmp.ge.f0(8) dest src0 src1 |
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| 409 | */ |
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| 410 | |||
| 411 | v->calculate_cfg(); |
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| 412 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 413 | |||
| 414 | EXPECT_EQ(0, block0->start_ip); |
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| 415 | EXPECT_EQ(1, block0->end_ip); |
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| 416 | |||
| 417 | EXPECT_TRUE(cmod_propagation(v)); |
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| 418 | EXPECT_EQ(0, block0->start_ip); |
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| 419 | EXPECT_EQ(0, block0->end_ip); |
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| 420 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode); |
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| 421 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 0)->conditional_mod); |
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| 422 | } |
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| 423 | |||
| 424 | TEST_F(cmod_propagation_test, different_types_cmod_with_zero) |
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| 425 | { |
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| 426 | fs_reg dest = v->vgrf(glsl_type::int_type); |
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| 427 | fs_reg src0 = v->vgrf(glsl_type::int_type); |
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| 428 | fs_reg src1 = v->vgrf(glsl_type::int_type); |
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| 429 | fs_reg zero(0.0f); |
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| 430 | v->emit(BRW_OPCODE_ADD, dest, src0, src1); |
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| 431 | v->emit(BRW_OPCODE_CMP, v->reg_null_f, retype(dest, BRW_REGISTER_TYPE_F), |
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| 432 | zero) |
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| 433 | ->conditional_mod = BRW_CONDITIONAL_GE; |
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| 434 | |||
| 435 | /* = Before = |
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| 436 | * |
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| 437 | * 0: add(8) dest:D src0:D src1:D |
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| 438 | * 1: cmp.ge.f0(8) null:F dest:F 0.0f |
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| 439 | * |
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| 440 | * = After = |
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| 441 | * (no changes) |
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| 442 | */ |
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| 443 | |||
| 444 | v->calculate_cfg(); |
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| 445 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 446 | |||
| 447 | EXPECT_EQ(0, block0->start_ip); |
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| 448 | EXPECT_EQ(1, block0->end_ip); |
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| 449 | |||
| 450 | EXPECT_FALSE(cmod_propagation(v)); |
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| 451 | EXPECT_EQ(0, block0->start_ip); |
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| 452 | EXPECT_EQ(1, block0->end_ip); |
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| 453 | EXPECT_EQ(BRW_OPCODE_ADD, instruction(block0, 0)->opcode); |
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| 454 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 1)->opcode); |
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| 455 | EXPECT_EQ(BRW_CONDITIONAL_GE, instruction(block0, 1)->conditional_mod); |
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| 456 | } |
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| 457 | |||
| 458 | TEST_F(cmod_propagation_test, andnz_one) |
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| 459 | { |
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| 460 | fs_reg dest = v->vgrf(glsl_type::int_type); |
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| 461 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 462 | fs_reg zero(0.0f); |
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| 463 | fs_reg one(1); |
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| 464 | |||
| 465 | v->emit(BRW_OPCODE_CMP, retype(dest, BRW_REGISTER_TYPE_F), src0, zero) |
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| 466 | ->conditional_mod = BRW_CONDITIONAL_L; |
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| 467 | v->emit(BRW_OPCODE_AND, v->reg_null_d, dest, one) |
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| 468 | ->conditional_mod = BRW_CONDITIONAL_NZ; |
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| 469 | |||
| 470 | /* = Before = |
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| 471 | * 0: cmp.l.f0(8) dest:F src0:F 0F |
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| 472 | * 1: and.nz.f0(8) null:D dest:D 1D |
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| 473 | * |
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| 474 | * = After = |
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| 475 | * 0: cmp.l.f0(8) dest:F src0:F 0F |
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| 476 | */ |
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| 477 | |||
| 478 | v->calculate_cfg(); |
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| 479 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 480 | |||
| 481 | EXPECT_EQ(0, block0->start_ip); |
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| 482 | EXPECT_EQ(1, block0->end_ip); |
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| 483 | |||
| 484 | EXPECT_TRUE(cmod_propagation(v)); |
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| 485 | EXPECT_EQ(0, block0->start_ip); |
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| 486 | EXPECT_EQ(0, block0->end_ip); |
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| 487 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode); |
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| 488 | EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod); |
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| 489 | EXPECT_TRUE(retype(dest, BRW_REGISTER_TYPE_F) |
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| 490 | .equals(instruction(block0, 0)->dst)); |
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| 491 | } |
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| 492 | |||
| 493 | TEST_F(cmod_propagation_test, andnz_non_one) |
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| 494 | { |
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| 495 | fs_reg dest = v->vgrf(glsl_type::int_type); |
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| 496 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 497 | fs_reg zero(0.0f); |
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| 498 | fs_reg nonone(38); |
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| 499 | |||
| 500 | v->emit(BRW_OPCODE_CMP, retype(dest, BRW_REGISTER_TYPE_F), src0, zero) |
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| 501 | ->conditional_mod = BRW_CONDITIONAL_L; |
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| 502 | v->emit(BRW_OPCODE_AND, v->reg_null_d, dest, nonone) |
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| 503 | ->conditional_mod = BRW_CONDITIONAL_NZ; |
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| 504 | |||
| 505 | /* = Before = |
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| 506 | * 0: cmp.l.f0(8) dest:F src0:F 0F |
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| 507 | * 1: and.nz.f0(8) null:D dest:D 38D |
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| 508 | * |
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| 509 | * = After = |
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| 510 | * (no changes) |
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| 511 | */ |
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| 512 | |||
| 513 | v->calculate_cfg(); |
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| 514 | bblock_t *block0 = v->cfg->blocks[0]; |
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| 515 | |||
| 516 | EXPECT_EQ(0, block0->start_ip); |
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| 517 | EXPECT_EQ(1, block0->end_ip); |
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| 518 | |||
| 519 | EXPECT_FALSE(cmod_propagation(v)); |
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| 520 | EXPECT_EQ(0, block0->start_ip); |
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| 521 | EXPECT_EQ(1, block0->end_ip); |
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| 522 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode); |
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| 523 | EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod); |
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| 524 | EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); |
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| 525 | EXPECT_EQ(BRW_CONDITIONAL_NZ, instruction(block0, 1)->conditional_mod); |
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| 526 | } |
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| 527 | |||
| 528 | TEST_F(cmod_propagation_test, andz_one) |
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| 529 | { |
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| 530 | fs_reg dest = v->vgrf(glsl_type::int_type); |
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| 531 | fs_reg src0 = v->vgrf(glsl_type::float_type); |
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| 532 | fs_reg zero(0.0f); |
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| 533 | fs_reg one(1); |
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| 534 | |||
| 535 | v->emit(BRW_OPCODE_CMP, retype(dest, BRW_REGISTER_TYPE_F), src0, zero) |
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| 536 | ->conditional_mod = BRW_CONDITIONAL_L; |
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| 537 | v->emit(BRW_OPCODE_AND, v->reg_null_d, dest, one) |
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| 538 | ->conditional_mod = BRW_CONDITIONAL_Z; |
||
| 539 | |||
| 540 | /* = Before = |
||
| 541 | * 0: cmp.l.f0(8) dest:F src0:F 0F |
||
| 542 | * 1: and.z.f0(8) null:D dest:D 1D |
||
| 543 | * |
||
| 544 | * = After = |
||
| 545 | * (no changes) |
||
| 546 | */ |
||
| 547 | |||
| 548 | v->calculate_cfg(); |
||
| 549 | bblock_t *block0 = v->cfg->blocks[0]; |
||
| 550 | |||
| 551 | EXPECT_EQ(0, block0->start_ip); |
||
| 552 | EXPECT_EQ(1, block0->end_ip); |
||
| 553 | |||
| 554 | EXPECT_FALSE(cmod_propagation(v)); |
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| 555 | EXPECT_EQ(0, block0->start_ip); |
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| 556 | EXPECT_EQ(1, block0->end_ip); |
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| 557 | EXPECT_EQ(BRW_OPCODE_CMP, instruction(block0, 0)->opcode); |
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| 558 | EXPECT_EQ(BRW_CONDITIONAL_L, instruction(block0, 0)->conditional_mod); |
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| 559 | EXPECT_EQ(BRW_OPCODE_AND, instruction(block0, 1)->opcode); |
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| 560 | EXPECT_EQ(BRW_CONDITIONAL_EQ, instruction(block0, 1)->conditional_mod); |
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| 561 | } |