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5564 | serge | 1 | /* |
2 | * Copyright © 2012 Intel Corporation |
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3 | * |
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4 | * Permission is hereby granted, free of charge, to any person obtaining a |
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5 | * copy of this software and associated documentation files (the "Software"), |
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6 | * to deal in the Software without restriction, including without limitation |
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7 | * the rights to use, copy, modify, merge, publish, distribute, sublicense, |
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8 | * and/or sell copies of the Software, and to permit persons to whom the |
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9 | * Software is furnished to do so, subject to the following conditions: |
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10 | * |
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11 | * The above copyright notice and this permission notice (including the next |
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12 | * paragraph) shall be included in all copies or substantial portions of the |
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13 | * Software. |
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14 | * |
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15 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR |
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16 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, |
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17 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL |
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18 | * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER |
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19 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING |
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20 | * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS |
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21 | * IN THE SOFTWARE. |
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22 | */ |
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23 | |||
24 | #include "main/glheader.h" |
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25 | #include "main/bufferobj.h" |
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26 | #include "main/context.h" |
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27 | #include "main/enums.h" |
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28 | #include "main/macros.h" |
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29 | |||
30 | #include "brw_draw.h" |
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31 | #include "brw_defines.h" |
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32 | #include "brw_context.h" |
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33 | #include "brw_state.h" |
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34 | |||
35 | #include "intel_batchbuffer.h" |
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36 | #include "intel_buffer_objects.h" |
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37 | |||
38 | static void |
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39 | gen8_emit_vertices(struct brw_context *brw) |
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40 | { |
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41 | struct gl_context *ctx = &brw->ctx; |
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42 | uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; |
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43 | |||
44 | brw_prepare_vertices(brw); |
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45 | brw_prepare_shader_draw_parameters(brw); |
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46 | |||
47 | if (brw->vs.prog_data->uses_vertexid || brw->vs.prog_data->uses_instanceid) { |
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48 | unsigned vue = brw->vb.nr_enabled; |
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49 | |||
50 | WARN_ONCE(brw->vs.prog_data->inputs_read & VERT_BIT_EDGEFLAG, |
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51 | "Using VID/IID with edgeflags, need to reorder the " |
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52 | "vertex attributes"); |
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53 | WARN_ONCE(vue >= 33, |
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54 | "Trying to insert VID/IID past 33rd vertex element, " |
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55 | "need to reorder the vertex attrbutes."); |
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56 | |||
57 | unsigned dw1 = 0; |
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58 | if (brw->vs.prog_data->uses_vertexid) { |
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59 | dw1 |= GEN8_SGVS_ENABLE_VERTEX_ID | |
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60 | (2 << GEN8_SGVS_VERTEX_ID_COMPONENT_SHIFT) | /* .z channel */ |
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61 | (vue << GEN8_SGVS_VERTEX_ID_ELEMENT_OFFSET_SHIFT); |
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62 | } |
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63 | |||
64 | if (brw->vs.prog_data->uses_instanceid) { |
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65 | dw1 |= GEN8_SGVS_ENABLE_INSTANCE_ID | |
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66 | (3 << GEN8_SGVS_INSTANCE_ID_COMPONENT_SHIFT) | /* .w channel */ |
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67 | (vue << GEN8_SGVS_INSTANCE_ID_ELEMENT_OFFSET_SHIFT); |
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68 | } |
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69 | |||
70 | BEGIN_BATCH(2); |
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71 | OUT_BATCH(_3DSTATE_VF_SGVS << 16 | (2 - 2)); |
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72 | OUT_BATCH(dw1); |
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73 | ADVANCE_BATCH(); |
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74 | |||
75 | BEGIN_BATCH(3); |
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76 | OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2)); |
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77 | OUT_BATCH(brw->vb.nr_buffers | GEN8_VF_INSTANCING_ENABLE); |
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78 | OUT_BATCH(0); |
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79 | ADVANCE_BATCH(); |
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80 | } else { |
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81 | BEGIN_BATCH(2); |
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82 | OUT_BATCH(_3DSTATE_VF_SGVS << 16 | (2 - 2)); |
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83 | OUT_BATCH(0); |
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84 | ADVANCE_BATCH(); |
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85 | } |
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86 | |||
87 | /* If the VS doesn't read any inputs (calculating vertex position from |
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88 | * a state variable for some reason, for example), emit a single pad |
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89 | * VERTEX_ELEMENT struct and bail. |
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90 | * |
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91 | * The stale VB state stays in place, but they don't do anything unless |
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92 | * a VE loads from them. |
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93 | */ |
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94 | if (brw->vb.nr_enabled == 0) { |
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95 | BEGIN_BATCH(3); |
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96 | OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (3 - 2)); |
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97 | OUT_BATCH((0 << GEN6_VE0_INDEX_SHIFT) | |
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98 | GEN6_VE0_VALID | |
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99 | (BRW_SURFACEFORMAT_R32G32B32A32_FLOAT << BRW_VE0_FORMAT_SHIFT) | |
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100 | (0 << BRW_VE0_SRC_OFFSET_SHIFT)); |
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101 | OUT_BATCH((BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_0_SHIFT) | |
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102 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) | |
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103 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) | |
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104 | (BRW_VE1_COMPONENT_STORE_1_FLT << BRW_VE1_COMPONENT_3_SHIFT)); |
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105 | ADVANCE_BATCH(); |
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106 | return; |
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107 | } |
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108 | |||
109 | /* Now emit 3DSTATE_VERTEX_BUFFERS and 3DSTATE_VERTEX_ELEMENTS packets. */ |
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110 | unsigned nr_buffers = brw->vb.nr_buffers + brw->vs.prog_data->uses_vertexid; |
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111 | if (nr_buffers) { |
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112 | assert(nr_buffers <= 33); |
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113 | |||
114 | BEGIN_BATCH(1 + 4 * nr_buffers); |
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115 | OUT_BATCH((_3DSTATE_VERTEX_BUFFERS << 16) | (4 * nr_buffers - 1)); |
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116 | for (unsigned i = 0; i < brw->vb.nr_buffers; i++) { |
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117 | struct brw_vertex_buffer *buffer = &brw->vb.buffers[i]; |
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118 | uint32_t dw0 = 0; |
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119 | |||
120 | dw0 |= i << GEN6_VB0_INDEX_SHIFT; |
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121 | dw0 |= GEN7_VB0_ADDRESS_MODIFYENABLE; |
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122 | dw0 |= buffer->stride << BRW_VB0_PITCH_SHIFT; |
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123 | dw0 |= mocs_wb << 16; |
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124 | |||
125 | OUT_BATCH(dw0); |
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126 | OUT_RELOC64(buffer->bo, I915_GEM_DOMAIN_VERTEX, 0, buffer->offset); |
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127 | OUT_BATCH(buffer->bo->size); |
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128 | } |
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129 | |||
130 | if (brw->vs.prog_data->uses_vertexid) { |
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131 | OUT_BATCH(brw->vb.nr_buffers << GEN6_VB0_INDEX_SHIFT | |
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132 | GEN7_VB0_ADDRESS_MODIFYENABLE | |
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133 | mocs_wb << 16); |
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134 | OUT_RELOC64(brw->draw.draw_params_bo, I915_GEM_DOMAIN_VERTEX, 0, |
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135 | brw->draw.draw_params_offset); |
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136 | OUT_BATCH(brw->draw.draw_params_bo->size); |
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137 | } |
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138 | ADVANCE_BATCH(); |
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139 | } |
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140 | |||
141 | unsigned nr_elements = brw->vb.nr_enabled + brw->vs.prog_data->uses_vertexid; |
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142 | |||
143 | /* The hardware allows one more VERTEX_ELEMENTS than VERTEX_BUFFERS, |
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144 | * presumably for VertexID/InstanceID. |
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145 | */ |
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146 | assert(nr_elements <= 34); |
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147 | |||
148 | struct brw_vertex_element *gen6_edgeflag_input = NULL; |
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149 | |||
150 | BEGIN_BATCH(1 + nr_elements * 2); |
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151 | OUT_BATCH((_3DSTATE_VERTEX_ELEMENTS << 16) | (2 * nr_elements - 1)); |
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152 | for (unsigned i = 0; i < brw->vb.nr_enabled; i++) { |
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153 | struct brw_vertex_element *input = brw->vb.enabled[i]; |
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154 | uint32_t format = brw_get_vertex_surface_type(brw, input->glarray); |
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155 | uint32_t comp0 = BRW_VE1_COMPONENT_STORE_SRC; |
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156 | uint32_t comp1 = BRW_VE1_COMPONENT_STORE_SRC; |
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157 | uint32_t comp2 = BRW_VE1_COMPONENT_STORE_SRC; |
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158 | uint32_t comp3 = BRW_VE1_COMPONENT_STORE_SRC; |
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159 | |||
160 | /* The gen4 driver expects edgeflag to come in as a float, and passes |
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161 | * that float on to the tests in the clipper. Mesa's current vertex |
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162 | * attribute value for EdgeFlag is stored as a float, which works out. |
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163 | * glEdgeFlagPointer, on the other hand, gives us an unnormalized |
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164 | * integer ubyte. Just rewrite that to convert to a float. |
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165 | */ |
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166 | if (input == &brw->vb.inputs[VERT_ATTRIB_EDGEFLAG]) { |
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167 | /* Gen6+ passes edgeflag as sideband along with the vertex, instead |
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168 | * of in the VUE. We have to upload it sideband as the last vertex |
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169 | * element according to the B-Spec. |
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170 | */ |
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171 | gen6_edgeflag_input = input; |
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172 | continue; |
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173 | } |
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174 | |||
175 | switch (input->glarray->Size) { |
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176 | case 0: comp0 = BRW_VE1_COMPONENT_STORE_0; |
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177 | case 1: comp1 = BRW_VE1_COMPONENT_STORE_0; |
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178 | case 2: comp2 = BRW_VE1_COMPONENT_STORE_0; |
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179 | case 3: comp3 = input->glarray->Integer ? BRW_VE1_COMPONENT_STORE_1_INT |
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180 | : BRW_VE1_COMPONENT_STORE_1_FLT; |
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181 | break; |
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182 | } |
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183 | |||
184 | OUT_BATCH((input->buffer << GEN6_VE0_INDEX_SHIFT) | |
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185 | GEN6_VE0_VALID | |
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186 | (format << BRW_VE0_FORMAT_SHIFT) | |
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187 | (input->offset << BRW_VE0_SRC_OFFSET_SHIFT)); |
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188 | |||
189 | OUT_BATCH((comp0 << BRW_VE1_COMPONENT_0_SHIFT) | |
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190 | (comp1 << BRW_VE1_COMPONENT_1_SHIFT) | |
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191 | (comp2 << BRW_VE1_COMPONENT_2_SHIFT) | |
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192 | (comp3 << BRW_VE1_COMPONENT_3_SHIFT)); |
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193 | } |
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194 | |||
195 | if (gen6_edgeflag_input) { |
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196 | uint32_t format = |
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197 | brw_get_vertex_surface_type(brw, gen6_edgeflag_input->glarray); |
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198 | |||
199 | OUT_BATCH((gen6_edgeflag_input->buffer << GEN6_VE0_INDEX_SHIFT) | |
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200 | GEN6_VE0_VALID | |
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201 | GEN6_VE0_EDGE_FLAG_ENABLE | |
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202 | (format << BRW_VE0_FORMAT_SHIFT) | |
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203 | (gen6_edgeflag_input->offset << BRW_VE0_SRC_OFFSET_SHIFT)); |
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204 | OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) | |
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205 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) | |
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206 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) | |
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207 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT)); |
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208 | } |
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209 | |||
210 | if (brw->vs.prog_data->uses_vertexid) { |
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211 | OUT_BATCH(GEN6_VE0_VALID | |
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212 | brw->vb.nr_buffers << GEN6_VE0_INDEX_SHIFT | |
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213 | BRW_SURFACEFORMAT_R32_UINT << BRW_VE0_FORMAT_SHIFT); |
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214 | OUT_BATCH((BRW_VE1_COMPONENT_STORE_SRC << BRW_VE1_COMPONENT_0_SHIFT) | |
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215 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_1_SHIFT) | |
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216 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_2_SHIFT) | |
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217 | (BRW_VE1_COMPONENT_STORE_0 << BRW_VE1_COMPONENT_3_SHIFT)); |
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218 | } |
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219 | ADVANCE_BATCH(); |
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220 | |||
221 | for (unsigned i = 0; i < brw->vb.nr_enabled; i++) { |
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222 | const struct brw_vertex_element *input = brw->vb.enabled[i]; |
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223 | const struct brw_vertex_buffer *buffer = &brw->vb.buffers[input->buffer]; |
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224 | |||
225 | BEGIN_BATCH(3); |
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226 | OUT_BATCH(_3DSTATE_VF_INSTANCING << 16 | (3 - 2)); |
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227 | OUT_BATCH(i | (buffer->step_rate ? GEN8_VF_INSTANCING_ENABLE : 0)); |
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228 | OUT_BATCH(buffer->step_rate); |
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229 | ADVANCE_BATCH(); |
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230 | } |
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231 | } |
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232 | |||
233 | const struct brw_tracked_state gen8_vertices = { |
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234 | .dirty = { |
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235 | .mesa = _NEW_POLYGON, |
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236 | .brw = BRW_NEW_BATCH | |
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237 | BRW_NEW_VERTICES | |
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238 | BRW_NEW_VS_PROG_DATA, |
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239 | }, |
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240 | .emit = gen8_emit_vertices, |
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241 | }; |
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242 | |||
243 | static void |
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244 | gen8_emit_index_buffer(struct brw_context *brw) |
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245 | { |
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246 | const struct _mesa_index_buffer *index_buffer = brw->ib.ib; |
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247 | uint32_t mocs_wb = brw->gen >= 9 ? SKL_MOCS_WB : BDW_MOCS_WB; |
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248 | |||
249 | if (index_buffer == NULL) |
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250 | return; |
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251 | |||
252 | BEGIN_BATCH(5); |
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253 | OUT_BATCH(CMD_INDEX_BUFFER << 16 | (5 - 2)); |
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254 | OUT_BATCH(brw_get_index_type(index_buffer->type) | mocs_wb); |
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255 | OUT_RELOC64(brw->ib.bo, I915_GEM_DOMAIN_VERTEX, 0, 0); |
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256 | OUT_BATCH(brw->ib.bo->size); |
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257 | ADVANCE_BATCH(); |
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258 | } |
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259 | |||
260 | const struct brw_tracked_state gen8_index_buffer = { |
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261 | .dirty = { |
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262 | .mesa = 0, |
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263 | .brw = BRW_NEW_BATCH | |
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264 | BRW_NEW_INDEX_BUFFER, |
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265 | }, |
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266 | .emit = gen8_emit_index_buffer, |
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267 | }; |
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268 | |||
269 | static void |
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270 | gen8_emit_vf_topology(struct brw_context *brw) |
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271 | { |
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272 | BEGIN_BATCH(2); |
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273 | OUT_BATCH(_3DSTATE_VF_TOPOLOGY << 16 | (2 - 2)); |
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274 | OUT_BATCH(brw->primitive); |
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275 | ADVANCE_BATCH(); |
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276 | } |
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277 | |||
278 | const struct brw_tracked_state gen8_vf_topology = { |
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279 | .dirty = { |
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280 | .mesa = 0, |
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281 | .brw = BRW_NEW_PRIMITIVE, |
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282 | }, |
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283 | .emit = gen8_emit_vf_topology, |
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284 | };><>><>><>>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><>>><>=>><>><>><>><>><>>><>=>><>><>><>><>><>><>><>><>><>><>><>><>><>><>><> |