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5564 | serge | 1 | /************************************************************************** |
2 | * |
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3 | * Copyright 2003 VMware, Inc. |
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4 | * All Rights Reserved. |
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5 | * |
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6 | * Permission is hereby granted, free of charge, to any person obtaining a |
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7 | * copy of this software and associated documentation files (the |
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8 | * "Software"), to deal in the Software without restriction, including |
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9 | * without limitation the rights to use, copy, modify, merge, publish, |
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10 | * distribute, sub license, and/or sell copies of the Software, and to |
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11 | * permit persons to whom the Software is furnished to do so, subject to |
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12 | * the following conditions: |
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13 | * |
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14 | * The above copyright notice and this permission notice (including the |
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15 | * next paragraph) shall be included in all copies or substantial portions |
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16 | * of the Software. |
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17 | * |
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18 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS |
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19 | * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF |
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20 | * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND NON-INFRINGEMENT. |
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21 | * IN NO EVENT SHALL VMWARE AND/OR ITS SUPPLIERS BE LIABLE FOR |
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22 | * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, |
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23 | * TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE |
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24 | * SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE. |
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25 | * |
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26 | **************************************************************************/ |
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27 | |||
28 | #define CMD_MI (0x0 << 29) |
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29 | #define CMD_2D (0x2 << 29) |
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30 | #define CMD_3D (0x3 << 29) |
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31 | |||
32 | #define MI_NOOP (CMD_MI | 0) |
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33 | |||
34 | #define MI_BATCH_BUFFER_END (CMD_MI | 0xA << 23) |
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35 | |||
36 | #define MI_FLUSH (CMD_MI | (4 << 23)) |
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37 | #define FLUSH_MAP_CACHE (1 << 0) |
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38 | #define INHIBIT_FLUSH_RENDER_CACHE (1 << 2) |
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39 | |||
40 | #define MI_LOAD_REGISTER_IMM (CMD_MI | (0x22 << 23)) |
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41 | |||
42 | #define MI_FLUSH_DW (CMD_MI | (0x26 << 23) | 2) |
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43 | |||
44 | /* Stalls command execution waiting for the given events to have occurred. */ |
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45 | #define MI_WAIT_FOR_EVENT (CMD_MI | (0x3 << 23)) |
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46 | #define MI_WAIT_FOR_PLANE_B_FLIP (1<<6) |
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47 | #define MI_WAIT_FOR_PLANE_A_FLIP (1<<2) |
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48 | |||
49 | #define MI_STORE_REGISTER_MEM (CMD_MI | (0x24 << 23)) |
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50 | # define MI_STORE_REGISTER_MEM_USE_GGTT (1 << 22) |
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51 | |||
52 | /* p189 */ |
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53 | #define _3DSTATE_LOAD_STATE_IMMEDIATE_1 (CMD_3D | (0x1d<<24) | (0x04<<16)) |
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54 | #define I1_LOAD_S(n) (1<<(4+n)) |
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55 | |||
56 | #define _3DSTATE_DRAWRECT_INFO (CMD_3D | (0x1d<<24) | (0x80<<16) | 0x3) |
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57 | |||
58 | /** @} */ |
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59 | |||
60 | /** @{ |
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61 | * 915 definitions |
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62 | * |
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63 | * 915 documents say that bits 31:28 and 1 are "undefined, must be zero." |
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64 | */ |
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65 | #define S0_VB_OFFSET_MASK 0x0ffffffc |
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66 | #define S0_AUTO_CACHE_INV_DISABLE (1<<0) |
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67 | /** @} */ |
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68 | |||
69 | /** @{ |
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70 | * 830 definitions |
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71 | */ |
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72 | #define S0_VB_OFFSET_MASK_830 0xffffff80 |
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73 | #define S0_VB_PITCH_SHIFT_830 1 |
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74 | #define S0_VB_ENABLE_830 (1<<0) |
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75 | /** @} */ |
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76 | |||
77 | #define S1_VERTEX_WIDTH_SHIFT 24 |
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78 | #define S1_VERTEX_WIDTH_MASK (0x3f<<24) |
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79 | #define S1_VERTEX_PITCH_SHIFT 16 |
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80 | #define S1_VERTEX_PITCH_MASK (0x3f<<16) |
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81 | |||
82 | #define TEXCOORDFMT_2D 0x0 |
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83 | #define TEXCOORDFMT_3D 0x1 |
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84 | #define TEXCOORDFMT_4D 0x2 |
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85 | #define TEXCOORDFMT_1D 0x3 |
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86 | #define TEXCOORDFMT_2D_16 0x4 |
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87 | #define TEXCOORDFMT_4D_16 0x5 |
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88 | #define TEXCOORDFMT_NOT_PRESENT 0xf |
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89 | #define S2_TEXCOORD_FMT0_MASK 0xf |
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90 | #define S2_TEXCOORD_FMT1_SHIFT 4 |
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91 | #define S2_TEXCOORD_FMT(unit, type) ((type)<<(unit*4)) |
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92 | #define S2_TEXCOORD_NONE (~0) |
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93 | #define S2_TEX_COUNT_SHIFT_830 12 |
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94 | #define S2_VERTEX_1_WIDTH_SHIFT_830 0 |
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95 | #define S2_VERTEX_0_WIDTH_SHIFT_830 6 |
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96 | /* S3 not interesting */ |
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97 | |||
98 | #define S4_POINT_WIDTH_SHIFT 23 |
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99 | #define S4_POINT_WIDTH_MASK (0x1ff<<23) |
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100 | #define S4_LINE_WIDTH_SHIFT 19 |
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101 | #define S4_LINE_WIDTH_ONE (0x2<<19) |
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102 | #define S4_LINE_WIDTH_MASK (0xf<<19) |
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103 | #define S4_FLATSHADE_ALPHA (1<<18) |
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104 | #define S4_FLATSHADE_FOG (1<<17) |
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105 | #define S4_FLATSHADE_SPECULAR (1<<16) |
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106 | #define S4_FLATSHADE_COLOR (1<<15) |
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107 | #define S4_CULLMODE_BOTH (0<<13) |
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108 | #define S4_CULLMODE_NONE (1<<13) |
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109 | #define S4_CULLMODE_CW (2<<13) |
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110 | #define S4_CULLMODE_CCW (3<<13) |
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111 | #define S4_CULLMODE_MASK (3<<13) |
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112 | #define S4_VFMT_POINT_WIDTH (1<<12) |
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113 | #define S4_VFMT_SPEC_FOG (1<<11) |
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114 | #define S4_VFMT_COLOR (1<<10) |
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115 | #define S4_VFMT_DEPTH_OFFSET (1<<9) |
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116 | #define S4_VFMT_XYZ (1<<6) |
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117 | #define S4_VFMT_XYZW (2<<6) |
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118 | #define S4_VFMT_XY (3<<6) |
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119 | #define S4_VFMT_XYW (4<<6) |
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120 | #define S4_VFMT_XYZW_MASK (7<<6) |
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121 | #define S4_FORCE_DEFAULT_DIFFUSE (1<<5) |
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122 | #define S4_FORCE_DEFAULT_SPECULAR (1<<4) |
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123 | #define S4_LOCAL_DEPTH_OFFSET_ENABLE (1<<3) |
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124 | #define S4_VFMT_FOG_PARAM (1<<2) |
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125 | #define S4_SPRITE_POINT_ENABLE (1<<1) |
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126 | #define S4_LINE_ANTIALIAS_ENABLE (1<<0) |
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127 | |||
128 | #define S4_VFMT_MASK (S4_VFMT_POINT_WIDTH | \ |
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129 | S4_VFMT_SPEC_FOG | \ |
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130 | S4_VFMT_COLOR | \ |
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131 | S4_VFMT_DEPTH_OFFSET | \ |
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132 | S4_VFMT_XYZW_MASK | \ |
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133 | S4_VFMT_FOG_PARAM) |
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134 | |||
135 | |||
136 | #define S5_WRITEDISABLE_ALPHA (1<<31) |
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137 | #define S5_WRITEDISABLE_RED (1<<30) |
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138 | #define S5_WRITEDISABLE_GREEN (1<<29) |
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139 | #define S5_WRITEDISABLE_BLUE (1<<28) |
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140 | #define S5_WRITEDISABLE_MASK (0xf<<28) |
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141 | #define S5_FORCE_DEFAULT_POINT_SIZE (1<<27) |
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142 | #define S5_LAST_PIXEL_ENABLE (1<<26) |
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143 | #define S5_GLOBAL_DEPTH_OFFSET_ENABLE (1<<25) |
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144 | #define S5_FOG_ENABLE (1<<24) |
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145 | #define S5_STENCIL_REF_SHIFT 16 |
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146 | #define S5_STENCIL_REF_MASK (0xff<<16) |
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147 | #define S5_STENCIL_TEST_FUNC_SHIFT 13 |
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148 | #define S5_STENCIL_TEST_FUNC_MASK (0x7<<13) |
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149 | #define S5_STENCIL_FAIL_SHIFT 10 |
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150 | #define S5_STENCIL_FAIL_MASK (0x7<<10) |
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151 | #define S5_STENCIL_PASS_Z_FAIL_SHIFT 7 |
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152 | #define S5_STENCIL_PASS_Z_FAIL_MASK (0x7<<7) |
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153 | #define S5_STENCIL_PASS_Z_PASS_SHIFT 4 |
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154 | #define S5_STENCIL_PASS_Z_PASS_MASK (0x7<<4) |
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155 | #define S5_STENCIL_WRITE_ENABLE (1<<3) |
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156 | #define S5_STENCIL_TEST_ENABLE (1<<2) |
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157 | #define S5_COLOR_DITHER_ENABLE (1<<1) |
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158 | #define S5_LOGICOP_ENABLE (1<<0) |
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159 | |||
160 | |||
161 | #define S6_ALPHA_TEST_ENABLE (1<<31) |
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162 | #define S6_ALPHA_TEST_FUNC_SHIFT 28 |
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163 | #define S6_ALPHA_TEST_FUNC_MASK (0x7<<28) |
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164 | #define S6_ALPHA_REF_SHIFT 20 |
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165 | #define S6_ALPHA_REF_MASK (0xff<<20) |
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166 | #define S6_DEPTH_TEST_ENABLE (1<<19) |
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167 | #define S6_DEPTH_TEST_FUNC_SHIFT 16 |
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168 | #define S6_DEPTH_TEST_FUNC_MASK (0x7<<16) |
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169 | #define S6_CBUF_BLEND_ENABLE (1<<15) |
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170 | #define S6_CBUF_BLEND_FUNC_SHIFT 12 |
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171 | #define S6_CBUF_BLEND_FUNC_MASK (0x7<<12) |
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172 | #define S6_CBUF_SRC_BLEND_FACT_SHIFT 8 |
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173 | #define S6_CBUF_SRC_BLEND_FACT_MASK (0xf<<8) |
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174 | #define S6_CBUF_DST_BLEND_FACT_SHIFT 4 |
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175 | #define S6_CBUF_DST_BLEND_FACT_MASK (0xf<<4) |
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176 | #define S6_DEPTH_WRITE_ENABLE (1<<3) |
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177 | #define S6_COLOR_WRITE_ENABLE (1<<2) |
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178 | #define S6_TRISTRIP_PV_SHIFT 0 |
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179 | #define S6_TRISTRIP_PV_MASK (0x3<<0) |
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180 | |||
181 | #define S7_DEPTH_OFFSET_CONST_MASK ~0 |
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182 | |||
183 | /* p143 */ |
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184 | #define _3DSTATE_BUF_INFO_CMD (CMD_3D | (0x1d<<24) | (0x8e<<16) | 1) |
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185 | /* Dword 1 */ |
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186 | #define BUF_3D_ID_COLOR_BACK (0x3<<24) |
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187 | #define BUF_3D_ID_DEPTH (0x7<<24) |
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188 | #define BUF_3D_USE_FENCE (1<<23) |
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189 | #define BUF_3D_TILED_SURFACE (1<<22) |
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190 | #define BUF_3D_TILE_WALK_X 0 |
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191 | #define BUF_3D_TILE_WALK_Y (1<<21) |
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192 | #define BUF_3D_PITCH(x) (((x)/4)<<2) |
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193 | /* Dword 2 */ |
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194 | #define BUF_3D_ADDR(x) ((x) & ~0x3) |
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195 | |||
196 | /* Primitive dispatch on 830-945 */ |
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197 | #define _3DPRIMITIVE (CMD_3D | (0x1f << 24)) |
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198 | #define PRIM_INDIRECT (1<<23) |
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199 | #define PRIM_INLINE (0<<23) |
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200 | #define PRIM_INDIRECT_SEQUENTIAL (0<<17) |
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201 | #define PRIM_INDIRECT_ELTS (1<<17) |
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202 | |||
203 | #define PRIM3D_TRILIST (0x0<<18) |
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204 | #define PRIM3D_TRISTRIP (0x1<<18) |
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205 | #define PRIM3D_TRISTRIP_RVRSE (0x2<<18) |
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206 | #define PRIM3D_TRIFAN (0x3<<18) |
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207 | #define PRIM3D_POLY (0x4<<18) |
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208 | #define PRIM3D_LINELIST (0x5<<18) |
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209 | #define PRIM3D_LINESTRIP (0x6<<18) |
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210 | #define PRIM3D_RECTLIST (0x7<<18) |
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211 | #define PRIM3D_POINTLIST (0x8<<18) |
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212 | #define PRIM3D_DIB (0x9<<18) |
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213 | #define PRIM3D_MASK (0x1f<<18) |
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214 | |||
215 | #define XY_SETUP_BLT_CMD (CMD_2D | (0x01 << 22)) |
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216 | |||
217 | #define XY_COLOR_BLT_CMD (CMD_2D | (0x50 << 22)) |
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218 | |||
219 | #define XY_SRC_COPY_BLT_CMD (CMD_2D | (0x53 << 22)) |
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220 | |||
221 | #define XY_TEXT_IMMEDIATE_BLIT_CMD (CMD_2D | (0x31 << 22)) |
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222 | # define XY_TEXT_BYTE_PACKED (1 << 16) |
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223 | |||
224 | /* BR00 */ |
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225 | #define XY_BLT_WRITE_ALPHA (1 << 21) |
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226 | #define XY_BLT_WRITE_RGB (1 << 20) |
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227 | #define XY_SRC_TILED (1 << 15) |
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228 | #define XY_DST_TILED (1 << 11) |
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229 | |||
230 | /* BR13 */ |
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231 | #define BR13_8 (0x0 << 24) |
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232 | #define BR13_565 (0x1 << 24) |
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233 | #define BR13_8888 (0x3 << 24)><>><>><>><>><>><>><>><>><>><>><>><>18) |