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5564 serge 1 
/*
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 * Copyright © 2014 Intel Corporation
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 *
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 * Permission is hereby granted, free of charge, to any person obtaining a
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 * copy of this software and associated documentation files (the "Software"),
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 * to deal in the Software without restriction, including without limitation
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 * the rights to use, copy, modify, merge, publish, distribute, sublicense,
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 * and/or sell copies of the Software, and to permit persons to whom the
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 * Software is furnished to do so, subject to the following conditions:
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 *
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 * The above copyright notice and this permission notice (including the next
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 * paragraph) shall be included in all copies or substantial portions of the
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 * Software.
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 *
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 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
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 * THE AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
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 * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS
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 * IN THE SOFTWARE.
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 *
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 * Authors:
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 *    Jason Ekstrand (jason@jlekstrand.net)
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 *
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 */
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#include "nir.h"
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/*
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 * Implements a simple pass that lowers vecN instructions to a series of
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 * moves with partial writes.
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 */
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static bool
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src_matches_dest_reg(nir_dest *dest, nir_src *src)
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{
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   if (dest->is_ssa || src->is_ssa)
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      return false;
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   return (dest->reg.reg == src->reg.reg &&
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           dest->reg.base_offset == src->reg.base_offset &&
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           !dest->reg.indirect &&
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           !src->reg.indirect);
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}
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/**
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 * For a given starting writemask channel and corresponding source index in
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 * the vec instruction, insert a MOV to the vec instruction's dest of all the
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 * writemask channels that get read from the same src reg.
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 *
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 * Returns the writemask of our MOV, so the parent loop calling this knows
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 * which ones have been processed.
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 */
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static unsigned
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insert_mov(nir_alu_instr *vec, unsigned start_channel,
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            unsigned start_src_idx, void *mem_ctx)
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{
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   unsigned src_idx = start_src_idx;
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   assert(src_idx < nir_op_infos[vec->op].num_inputs);
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   nir_alu_instr *mov = nir_alu_instr_create(mem_ctx, nir_op_imov);
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   nir_alu_src_copy(&mov->src[0], &vec->src[src_idx], mem_ctx);
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   nir_alu_dest_copy(&mov->dest, &vec->dest, mem_ctx);
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   mov->dest.write_mask = (1u << start_channel);
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   mov->src[0].swizzle[start_channel] = vec->src[src_idx].swizzle[0];
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   src_idx++;
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   for (unsigned i = start_channel + 1; i < 4; i++) {
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      if (!(vec->dest.write_mask & (1 << i)))
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         continue;
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      if (nir_srcs_equal(vec->src[src_idx].src, vec->src[start_src_idx].src)) {
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         mov->dest.write_mask |= (1 << i);
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         mov->src[0].swizzle[i] = vec->src[src_idx].swizzle[0];
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      }
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      src_idx++;
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   }
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   nir_instr_insert_before(&vec->instr, &mov->instr);
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   return mov->dest.write_mask;
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}
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static bool
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lower_vec_to_movs_block(nir_block *block, void *mem_ctx)
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{
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   nir_foreach_instr_safe(block, instr) {
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      if (instr->type != nir_instr_type_alu)
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         continue;
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      nir_alu_instr *vec = (nir_alu_instr *)instr;
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      switch (vec->op) {
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      case nir_op_vec2:
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      case nir_op_vec3:
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      case nir_op_vec4:
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         break;
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      default:
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         continue; /* The loop */
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      }
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      /* Since we insert multiple MOVs, we have to be non-SSA. */
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      assert(!vec->dest.dest.is_ssa);
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      unsigned finished_write_mask = 0;
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      /* First, emit a MOV for all the src channels that are in the
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       * destination reg, in case other values we're populating in the dest
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       * might overwrite them.
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       */
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      for (unsigned i = 0, src_idx = 0; i < 4; i++) {
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         if (!(vec->dest.write_mask & (1 << i)))
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            continue;
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         if (src_matches_dest_reg(&vec->dest.dest, &vec->src[src_idx].src)) {
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            finished_write_mask |= insert_mov(vec, i, src_idx, mem_ctx);
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            break;
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         }
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         src_idx++;
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      }
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      /* Now, emit MOVs for all the other src channels. */
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      for (unsigned i = 0, src_idx = 0; i < 4; i++) {
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         if (!(vec->dest.write_mask & (1 << i)))
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            continue;
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         if (!(finished_write_mask & (1 << i)))
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            finished_write_mask |= insert_mov(vec, i, src_idx, mem_ctx);
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         src_idx++;
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      }
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      nir_instr_remove(&vec->instr);
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      ralloc_free(vec);
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   }
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   return true;
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}
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static void
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nir_lower_vec_to_movs_impl(nir_function_impl *impl)
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{
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   nir_foreach_block(impl, lower_vec_to_movs_block, ralloc_parent(impl));
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}
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void
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nir_lower_vec_to_movs(nir_shader *shader)
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{
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   nir_foreach_overload(shader, overload) {
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      if (overload->impl)
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         nir_lower_vec_to_movs_impl(overload->impl);
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   }
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}